1:
9:
10:
14:
15:
16:
#include <stdio.h>
17:
#include "vid/vidprm.h"
18:
#include "vid/vidmgr.h"
19:
#include "pgp/pgpprm.h"
20:
21:
22:
#define PGP_IDLE (0)
23:
24:
25:
static struct {
26: _Bool used_in_ports[
AG903_VID_MGR_MAX_IN_PORTS];
27:
AG903_VidMgrInputHandle in_ports[
AG903_VID_MGR_MAX_IN_PORTS];
28: _Bool used_out_ports[
AG903_VID_MGR_MAX_OUT_PORTS];
29:
AG903_VidMgrOutputHandle out_ports[
AG903_VID_MGR_MAX_OUT_PORTS];
30: _Bool vid_enable;
31: int32_t vid_format;
32: } VidContext = {
33: {
false,
false},
34: {{0}},
35: {
false,
false,
false,
false},
36: {{0}},
37:
false,
38: 0
39: };
40:
41:
49: int32_t
AG903_VidMgrEnable(_Bool enable)
50: {
51: VidContext.vid_enable = enable;
52:
53:
return AG903_ENONE;
54: }
55:
56:
57:
static _Bool CheckFormatCompatibility(uint32_t format)
58: {
59:
switch (format) {
60:
case AG903_VID_MGR_24BIT_TO_CH0:
61:
case AG903_VID_MGR_8BITCH0_TO_CH0:
62:
if (VidContext.used_in_ports[0] ==
false || VidContext.used_out_ports[0] ==
false ||
63: VidContext.used_in_ports[1] ==
true || VidContext.used_out_ports[1] ==
true ||
64: VidContext.used_out_ports[2] ==
true || VidContext.used_out_ports[3] ==
true) {
65:
return false;
66: }
67:
break;
68:
case AG903_VID_MGR_8BITCH1_TO_CH1:
69:
if (VidContext.used_in_ports[0] ==
true || VidContext.used_out_ports[0] ==
true ||
70: VidContext.used_in_ports[1] ==
false || VidContext.used_out_ports[1] ==
false ||
71: VidContext.used_out_ports[2] ==
true || VidContext.used_out_ports[3] ==
true) {
72:
return false;
73: }
74:
break;
75:
case AG903_VID_MGR_8BITCH01_TO_CH01:
76:
if (((VidContext.used_in_ports[0] ==
false || VidContext.used_out_ports[0] ==
false) &&
77: (VidContext.used_in_ports[1] ==
false || VidContext.used_out_ports[1] ==
false)) ||
78: VidContext.used_out_ports[2] ==
true || VidContext.used_out_ports[3] ==
true) {
79:
return false;
80: }
81:
break;
82:
case AG903_VID_MGR_8BITCH0_TO_CH0123:
83:
default:
84:
if (VidContext.used_in_ports[0] ==
false || VidContext.used_in_ports[1] ==
true ||
85: (VidContext.used_out_ports[0] ==
false && VidContext.used_out_ports[1] ==
false &&
86: VidContext.used_out_ports[2] ==
false && VidContext.used_out_ports[3] ==
false)) {
87:
return false;
88: }
89:
break;
90: }
91:
92:
return true;
93: }
94:
95:
96:
108: int32_t
AG903_VidMgrSetInputFormat(uint32_t format)
109: {
110:
switch (format) {
111:
case AG903_VID_MGR_24BIT_TO_CH0:
112:
case AG903_VID_MGR_8BITCH0_TO_CH0:
113:
case AG903_VID_MGR_8BITCH1_TO_CH1:
114:
case AG903_VID_MGR_8BITCH01_TO_CH01:
115:
case AG903_VID_MGR_8BITCH0_TO_CH0123:
116:
break;
117:
default:
118:
return -
AG903_EINVAL;
119: }
120:
121:
if (CheckFormatCompatibility(format) !=
true) {
122:
return -
AG903_EINVAL;
123: }
124:
125: VidContext.vid_format = format;
126:
127:
return AG903_ENONE;
128: }
129:
130:
131:
144: int32_t
AG903_VidMgrGetInputHandle(int32_t *ports, int32_t num_ports,
AG903_VidMgrInputHandle **handles)
145: {
146: int32_t i;
147: _Bool num_check[
AG903_VID_MGR_MAX_IN_PORTS] = {
false};
148:
149:
if (num_ports >
AG903_VID_MGR_MAX_IN_PORTS) {
150:
return -
AG903_EINVAL;
151: }
152:
if ((ports == NULL) || (handles == NULL)) {
153:
return -
AG903_EINVAL;
154: }
155:
for (i = 0; i < num_ports; i++) {
156:
if ((ports[i] < 0) || (ports[i] >=
AG903_VID_MGR_MAX_IN_PORTS)) {
157:
return -
AG903_EINVAL;
158: }
159:
if (VidContext.used_in_ports[ports[i]] !=
false) {
160:
return -
AG903_ENOMEM;
161: }
162:
163:
if (num_check[ports[i]] ==
true) {
164:
return -
AG903_EINVAL;
165: }
166: num_check[ports[i]] =
true;
167: }
168:
169:
for (i = 0; i < num_ports; i++) {
170:
171: handles[i] = (
AG903_VidMgrInputHandle *)&VidContext.in_ports[ports[i]];
172: handles[i]->id =
AG903_VID_MGR_INPUT_HANDLE_ID;
173: handles[i]->port_no = ports[i];
174: handles[i]->is_dirty =
false;
175: handles[i]->sync_signal = 0;
176: handles[i]->inout_vsync_pol = 0;
177: handles[i]->inout_hsync_pol = 0;
178: handles[i]->in_de_pol = 0;
179: handles[i]->in_field_pol = 0;
180: handles[i]->in_clk_pol = 0;
181: handles[i]->h_pulse_width = 0x60;
182: handles[i]->h_front_porch = 0x10;
183: handles[i]->h_back_porch = 0x30;
184: handles[i]->h_frame_size = 0x280;
185: handles[i]->v_pulse_width = 0x2;
186: handles[i]->v_front_porch = 0xA;
187: handles[i]->v_back_porch = 0x21;
188: handles[i]->v_frame_size = 0x1E0;
189:
190: VidContext.used_in_ports[ports[i]] =
true;
191: }
192:
return AG903_ENONE;
193: }
194:
195:
196:
206: int32_t
AG903_VidMgrReleaseInputHandle(
AG903_VidMgrInputHandle *handle)
207: {
208:
209:
if ((handle == NULL) || (handle->id !=
AG903_VID_MGR_INPUT_HANDLE_ID)) {
210:
return -
AG903_EINVAL;
211: }
212:
213:
214: VidContext.used_in_ports[handle->port_no] =
false;
215:
216:
217: handle->id = 0;
218: handle->is_dirty =
false;
219: handle->sync_signal = 0;
220: handle->inout_vsync_pol = 0;
221: handle->inout_hsync_pol = 0;
222: handle->in_de_pol = 0;
223: handle->in_field_pol = 0;
224: handle->in_clk_pol = 0;
225: handle->h_pulse_width = 0;
226: handle->h_front_porch = 0;
227: handle->h_back_porch = 0;
228: handle->h_frame_size = 0;
229: handle->v_pulse_width = 0;
230: handle->v_front_porch = 0;
231: handle->v_back_porch = 0;
232: handle->v_frame_size = 0;
233:
234:
return AG903_ENONE;
235: }
236:
237:
238:
253: int32_t
AG903_VidMgrGetOutputHandle(int32_t *ports, int32_t num_ports,
AG903_VidMgrOutputHandle **handles)
254: {
255: int32_t i;
256: _Bool num_check[
AG903_VID_MGR_MAX_OUT_PORTS] = {
false};
257:
258:
if (num_ports >
AG903_VID_MGR_MAX_OUT_PORTS) {
259:
return -
AG903_EINVAL;
260: }
261:
if ((ports == NULL) || (handles == NULL)) {
262:
return -
AG903_EINVAL;
263: }
264:
for (i = 0; i < num_ports; i++) {
265:
if ((ports[i] < 0) || (ports[i] >=
AG903_VID_MGR_MAX_OUT_PORTS)) {
266:
return -
AG903_EINVAL;
267: }
268:
if (VidContext.used_out_ports[ports[i]] !=
false) {
269:
return -
AG903_ENOMEM;
270: }
271:
272:
if (num_check[ports[i]] ==
true) {
273:
return -
AG903_EINVAL;
274: }
275: num_check[ports[i]] =
true;
276: }
277:
278:
for (i = 0; i < num_ports; i++) {
279:
280: handles[i] = (
AG903_VidMgrOutputHandle *)&VidContext.out_ports[ports[i]];
281: handles[i]->id =
AG903_VID_MGR_OUTPUT_HANDLE_ID;
282: handles[i]->port_no = ports[i];
283: handles[i]->is_dirty =
false;
284: handles[i]->tdm = 0;
285: handles[i]->delay =
false;
286: handles[i]->trs_dec_enable =
false;
287: handles[i]->trs_efp = 0;
288: handles[i]->trs_ofp = 0;
289: handles[i]->trs_vfp = 0x4;
290: handles[i]->trs_href = 0;
291: handles[i]->trs_hfp = 0;
292: handles[i]->v_max = 8192;
293: handles[i]->h_max = 8192;
294:
295: VidContext.used_out_ports[ports[i]] =
true;
296: }
297:
return AG903_ENONE;
298: }
299:
300:
301:
310: int32_t
AG903_VidMgrReleaseOutputHandle(
AG903_VidMgrOutputHandle *handle)
311: {
312:
313:
if ((handle == NULL) || (handle->id !=
AG903_VID_MGR_OUTPUT_HANDLE_ID)) {
314:
return -
AG903_EINVAL;
315: }
316:
317:
318: VidContext.used_out_ports[handle->port_no] =
false;
319:
320:
321: handle->id = 0;
322: handle->is_dirty =
false;
323: handle->tdm = 0;
324: handle->delay =
false;
325: handle->trs_dec_enable =
false;
326: handle->trs_efp = 0;
327: handle->trs_ofp = 0;
328: handle->trs_vfp = 0;
329: handle->trs_href = 0;
330: handle->trs_hfp = 0;
331: handle->v_max = 0;
332: handle->h_max = 0;
333:
334:
return AG903_ENONE;
335: }
336:
337:
338:
#define GET_TDMBLK(v) ((v) & 0x1)
339:
#define GET_TDMTRS(v) (((v) >> 1) & 0x1)
340:
341:
342:
#define GET_H_PULSE(v) ((v) ==
AG903_VID_MGR_MAX_OUT_HORIZONTAL_PULSE_WIDTH ? 0 : (v))
343:
#define GET_H_FPORCH(v) ((v) ==
AG903_VID_MGR_MAX_OUT_HORIZONTAL_FRONT_PORCH ? 0 : (v))
344:
#define GET_H_BPORCH(v) ((v) ==
AG903_VID_MGR_MAX_OUT_HORIZONTAL_BACK_PORCH ? 0 : (v))
345:
#define GET_H_FSIZE(v) ((v) ==
AG903_VID_MGR_MAX_OUT_HORIZONTAL_FRAME_SIZE ? 0 : (v))
346:
#define GET_V_PULSE(v) ((v) ==
AG903_VID_MGR_MAX_OUT_VERTICAL_PULSE_WIDTH ? 0 : (v))
347:
#define GET_V_FPORCH(v) ((v) ==
AG903_VID_MGR_MAX_OUT_VERTICAL_FRONT_PORCH ? 0 : (v))
348:
#define GET_V_BPORCH(v) ((v) ==
AG903_VID_MGR_MAX_OUT_VERTICAL_BACK_PORCH ? 0 : (v))
349:
#define GET_V_FSIZE(v) ((v) ==
AG903_VID_MGR_MAX_OUT_VERTICAL_FRAME_SIZE ? 0 : (v))
350:
351:
352:
#define GET_TRS_VFP(v) ((v) ==
AG903_VID_MGR_MAX_TRS_VFP ? 0 : (v))
353:
#define GET_TRS_HFP(v) (v)
354:
355:
356:
#define GET_VMAX(v) ((v) ==
AG903_VID_MGR_MAX_SD_VERTICAL_CYCLE ? 0 : (v))
357:
#define GET_HMAX(v) ((v) ==
AG903_VID_MGR_MAX_SD_HORIZONTAL_CYCLE ? 0 : (v))
358:
359:
370: int32_t
AG903_VidMgrCommitSetting(
void)
371: {
372: int32_t i;
373:
374:
375:
if (CheckFormatCompatibility(VidContext.vid_format) !=
true) {
376:
return -
AG903_EINVAL;
377: }
378:
379:
384:
for (i = 0; i <
AG903_VID_MGR_MAX_IN_PORTS; i++) {
385:
AG903_VidMgrInputHandle *handle = (
AG903_VidMgrInputHandle *)&VidContext.in_ports[i];
386:
if (VidContext.used_in_ports[i] ==
true && handle->is_dirty ==
true) {
387:
AG903_VidPrmSetVIDIOnCTRL(i, handle->sync_signal);
388:
389:
VIDPrmParamVIDIOnMOD mod;
390: mod.vpol = handle->inout_vsync_pol;
391: mod.hpol = handle->inout_hsync_pol;
392: mod.dpol = handle->in_de_pol;
393: mod.fpol = handle->in_field_pol;
394: mod.cpol = handle->in_clk_pol;
395:
AG903_VidPrmSetVIDIOnMOD(i, &mod);
396:
397:
AG903_VidPrmSetVIDIOnOHPRM0(i, GET_H_PULSE(handle->h_pulse_width));
398:
AG903_VidPrmSetVIDIOnOHPRM1(i, GET_H_FPORCH(handle->h_front_porch), GET_H_BPORCH(handle->h_back_porch));
399:
AG903_VidPrmSetVIDIOnOVPRM0(i, GET_V_PULSE(handle->v_pulse_width));
400:
AG903_VidPrmSetVIDIOnOVPRM1(i, GET_V_FPORCH(handle->v_front_porch), GET_V_BPORCH(handle->v_back_porch));
401:
AG903_VidPrmSetVIDIOnOSIZE(i, GET_H_FSIZE(handle->v_frame_size), GET_V_FSIZE(handle->h_frame_size));
402: }
403: }
404:
405:
for (i = 0; i <
AG903_VID_MGR_MAX_OUT_PORTS; i++) {
406:
AG903_VidMgrOutputHandle *handle = (
AG903_VidMgrOutputHandle *)&VidContext.out_ports[i];
407:
if (VidContext.used_out_ports[i] ==
true && handle->is_dirty ==
true) {
408:
409:
VIDPrmParamVIDCOnMOD mod;
410: mod.tdmblk = GET_TDMBLK(handle->tdm);
411: mod.tdmtrs = GET_TDMTRS(handle->tdm);
412: mod.delay = handle->delay;
413: mod.trsdec = handle->trs_dec_enable;
414:
AG903_VidPrmSetVIDCOnMOD(i, &mod);
415:
416:
VIDPrmParamVIDCOnTRSPRM trsprm;
417: trsprm.efp = handle->trs_efp;
418: trsprm.ofp = handle->trs_ofp;
419: trsprm.vfp = GET_TRS_VFP(handle->trs_vfp);
420: trsprm.href = handle->trs_href;
421: trsprm.hfp = GET_TRS_HFP(handle->trs_hfp);
422:
AG903_VidPrmSetVIDCOnTRSPRM(i, &trsprm);
423:
424:
AG903_VidPrmSetVIDCOnSDPRM(i, GET_VMAX(handle->v_max), GET_HMAX(handle->h_max));
425: }
426: }
427:
428:
return AG903_ENONE;
429: }
430:
431:
432:
444: int32_t
AG903_VidMgrCheckHandleValidation(
void *handle, int32_t handle_type)
445: {
446: uint32_t port_no;
447:
AG903_VidMgrInputHandle *input_handle = (
AG903_VidMgrInputHandle *)handle;
448:
AG903_VidMgrOutputHandle *output_handle = (
AG903_VidMgrOutputHandle *)handle;
449:
450:
switch (handle_type) {
451:
case AG903_VID_MGR_INPUT_HANDLE:
452:
if ((handle == NULL) || (input_handle->id !=
AG903_VID_MGR_INPUT_HANDLE_ID)) {
453:
return -
AG903_EINVAL;
454: }
455: port_no = input_handle->port_no;
456:
break;
457:
case AG903_VID_MGR_OUTPUT_HANDLE:
458:
if ((handle == NULL) || (output_handle->id !=
AG903_VID_MGR_OUTPUT_HANDLE_ID)) {
459:
return -
AG903_EINVAL;
460: }
461: port_no = output_handle->port_no;
462:
break;
463:
default:
464:
return -
AG903_EINVAL;
465: }
466:
467:
468:
switch (VidContext.vid_format) {
469:
case AG903_VID_MGR_24BIT_TO_CH0:
470:
case AG903_VID_MGR_8BITCH0_TO_CH0:
471:
if ((handle_type ==
AG903_VID_MGR_INPUT_HANDLE && port_no != 0) ||
472: (handle_type ==
AG903_VID_MGR_OUTPUT_HANDLE && port_no != 0)){
473:
return -
AG903_EINVAL;
474: }
475:
break;
476:
case AG903_VID_MGR_8BITCH1_TO_CH1:
477:
if ((handle_type ==
AG903_VID_MGR_INPUT_HANDLE && port_no != 1) ||
478: (handle_type ==
AG903_VID_MGR_OUTPUT_HANDLE && port_no != 1)){
479:
return -
AG903_EINVAL;
480: }
481:
break;
482:
case AG903_VID_MGR_8BITCH01_TO_CH01:
483:
if ((handle_type ==
AG903_VID_MGR_OUTPUT_HANDLE && (port_no != 0 && port_no != 1))) {
484:
return -
AG903_EINVAL;
485: }
486:
break;
487:
case AG903_VID_MGR_8BITCH0_TO_CH0123:
488:
default:
489:
if ((handle_type ==
AG903_VID_MGR_INPUT_HANDLE && port_no != 0)) {
490:
return -
AG903_EINVAL;
491: }
492:
break;
493: }
494:
return AG903_ENONE;
495: }
496:
497:
498:
508: int32_t
AG903_VidMgrSetIOSignal(
AG903_VidMgrInputHandle *handle, uint32_t inout)
509: {
510:
511:
if ((handle == NULL) || (handle->id !=
AG903_VID_MGR_INPUT_HANDLE_ID)) {
512:
return -
AG903_EINVAL;
513: }
514:
515:
516:
switch (inout) {
517:
case AG903_VID_MGR_IO_SIGNAL_INPUT:
518:
case AG903_VID_MGR_IO_SIGNAL_OUTPUT:
519:
break;
520:
default:
521:
return -
AG903_EINVAL;
522: }
523:
524:
525: handle->sync_signal = inout;
526: handle->is_dirty =
true;
527:
528:
return AG903_ENONE;
529: }
530:
531:
532:
555: int32_t
AG903_VidMgrSetIOMode(
AG903_VidMgrInputHandle *handle, uint32_t v_pol, uint32_t h_pol, uint32_t d_pol, uint32_t f_pol, uint32_t c_pol)
556: {
557:
558:
if ((handle == NULL) || (handle->id !=
AG903_VID_MGR_INPUT_HANDLE_ID)) {
559:
return -
AG903_EINVAL;
560: }
561:
562:
563:
switch (v_pol) {
564:
case AG903_VID_MGR_IO_VSYNC_POL_MINUS:
565:
case AG903_VID_MGR_IO_VSYNC_POL_PLUS:
566:
break;
567:
default:
568:
return -
AG903_EINVAL;
569: }
570:
571:
switch (h_pol) {
572:
case AG903_VID_MGR_IO_HSYNC_POL_MINUS:
573:
case AG903_VID_MGR_IO_HSYNC_POL_PLUS:
574:
break;
575:
default:
576:
return -
AG903_EINVAL;
577: }
578:
579:
switch (d_pol) {
580:
case AG903_VID_MGR_IN_DE_POL_MINUS:
581:
case AG903_VID_MGR_IN_DE_POL_PLUS:
582:
break;
583:
default:
584:
return -
AG903_EINVAL;
585: }
586:
587:
switch (f_pol) {
588:
case AG903_VID_MGR_IN_FIELD_POL_MINUS:
589:
case AG903_VID_MGR_IN_FIELD_POL_PLUS:
590:
break;
591:
default:
592:
return -
AG903_EINVAL;
593: }
594:
595:
switch (c_pol) {
596:
case AG903_VID_MGR_IN_CLK_POL_MINUS:
597:
case AG903_VID_MGR_IN_CLK_POL_PLUS:
598:
break;
599:
default:
600:
return -
AG903_EINVAL;
601: }
602:
603:
604: handle->inout_vsync_pol = v_pol;
605: handle->inout_hsync_pol = h_pol;
606: handle->in_de_pol = d_pol;
607: handle->in_field_pol = f_pol;
608: handle->in_clk_pol = c_pol;
609: handle->is_dirty =
true;
610:
611:
return AG903_ENONE;
612: }
613:
614:
615:
643: int32_t
AG903_VidMgrSetIOParameter(
AG903_VidMgrInputHandle *handle, uint32_t h_pw, uint32_t h_fp, uint32_t h_bp, uint32_t h_fs, uint32_t v_pw, uint32_t v_fp, uint32_t v_bp, uint32_t v_fs)
644: {
645:
646:
if ((handle == NULL) || (handle->id !=
AG903_VID_MGR_INPUT_HANDLE_ID)) {
647:
return -
AG903_EINVAL;
648: }
649:
650:
651:
if (h_pw == 0 || h_pw >
AG903_VID_MGR_MAX_OUT_HORIZONTAL_PULSE_WIDTH) {
652:
return -
AG903_EINVAL;
653: }
654:
655:
if (h_fp == 0 || h_fp >
AG903_VID_MGR_MAX_OUT_HORIZONTAL_FRONT_PORCH) {
656:
return -
AG903_EINVAL;
657: }
658:
659:
if (h_bp == 0 || h_bp >
AG903_VID_MGR_MAX_OUT_HORIZONTAL_BACK_PORCH) {
660:
return -
AG903_EINVAL;
661: }
662:
663:
if (h_fs == 0 || h_fs >
AG903_VID_MGR_MAX_OUT_HORIZONTAL_FRAME_SIZE) {
664:
return -
AG903_EINVAL;
665: }
666:
667:
if (v_pw == 0 || v_pw >
AG903_VID_MGR_MAX_OUT_VERTICAL_PULSE_WIDTH) {
668:
return -
AG903_EINVAL;
669: }
670:
671:
if (v_fp == 0 || v_fp >
AG903_VID_MGR_MAX_OUT_VERTICAL_FRONT_PORCH) {
672:
return -
AG903_EINVAL;
673: }
674:
675:
if (v_bp == 0 || v_bp >
AG903_VID_MGR_MAX_OUT_VERTICAL_BACK_PORCH) {
676:
return -
AG903_EINVAL;
677: }
678:
679:
if (v_fs == 0 || v_fs >
AG903_VID_MGR_MAX_OUT_VERTICAL_FRAME_SIZE) {
680:
return -
AG903_EINVAL;
681: }
682:
683:
684: handle->h_pulse_width = h_pw;
685: handle->h_front_porch = h_fp;
686: handle->h_back_porch = h_bp;
687: handle->h_frame_size = h_fs;
688: handle->v_pulse_width = v_pw;
689: handle->v_front_porch = v_fp;
690: handle->v_back_porch = v_bp;
691: handle->v_frame_size = v_fs;
692: handle->is_dirty =
true;
693:
694:
return AG903_ENONE;
695: }
696:
697:
698:
709: int32_t
AG903_VidMgrGetIODotClk(
AG903_VidMgrInputHandle *handle, uint32_t *cwt)
710: {
711:
712:
if ((handle == NULL) || (handle->id !=
AG903_VID_MGR_INPUT_HANDLE_ID)) {
713:
return -
AG903_EINVAL;
714: }
715:
716:
717:
if (cwt != NULL) {
718:
AG903_VidPrmGetVIDIOnSTAT(handle->port_no, cwt);
719: }
720:
721:
return AG903_ENONE;
722: }
723:
724:
725:
736: int32_t
AG903_VidMgrSetCaptureTDMMode(
AG903_VidMgrOutputHandle *handle, uint32_t tdm)
737: {
738:
739:
if ((handle == NULL) || (handle->id !=
AG903_VID_MGR_OUTPUT_HANDLE_ID)) {
740:
return -
AG903_EINVAL;
741: }
742:
743:
744:
switch (tdm) {
745:
case AG903_VID_MGR_TDM_NONE:
746:
case AG903_VID_MGR_TDM_FIT_BLANK_SIGNAL:
747:
case AG903_VID_MGR_TDM_FIT_TRS_SIGNAL:
748:
break;
749:
default:
750:
return -
AG903_EINVAL;
751: }
752:
753:
754: handle->tdm = tdm;
755: handle->is_dirty =
true;
756:
757:
return AG903_ENONE;
758: }
759:
760:
761:
771: int32_t
AG903_VidMgrEnableCaptureDelay(
AG903_VidMgrOutputHandle *handle, _Bool delay)
772: {
773:
774:
if ((handle == NULL) || (handle->id !=
AG903_VID_MGR_OUTPUT_HANDLE_ID)) {
775:
return -
AG903_EINVAL;
776: }
777:
778:
779: handle->delay = delay;
780: handle->is_dirty =
true;
781:
782:
return AG903_ENONE;
783: }
784:
785:
786:
796: int32_t
AG903_VidMgrEnableTRSDecode(
AG903_VidMgrOutputHandle *handle, _Bool trs_dec)
797: {
798:
799:
if ((handle == NULL) || (handle->id !=
AG903_VID_MGR_OUTPUT_HANDLE_ID)) {
800:
return -
AG903_EINVAL;
801: }
802:
803:
804: handle->trs_dec_enable = trs_dec;
805: handle->is_dirty =
true;
806:
807:
return AG903_ENONE;
808: }
809:
810:
811:
835: int32_t
AG903_VidMgrSetTRSParameter(
AG903_VidMgrOutputHandle *handle, uint32_t efp, uint32_t ofp, uint32_t vfp, uint32_t href, uint32_t hfp)
836: {
837:
838:
if ((handle == NULL) || (handle->id !=
AG903_VID_MGR_OUTPUT_HANDLE_ID)) {
839:
return -
AG903_EINVAL;
840: }
841:
842:
843:
switch (efp) {
844:
case AG903_VID_MGR_TRS_EFP_ZERO:
845:
case AG903_VID_MGR_TRS_EFP_ONE:
846:
break;
847:
default:
848:
return -
AG903_EINVAL;
849: }
850:
851:
switch (ofp) {
852:
case AG903_VID_MGR_TRS_OFP_ZERO:
853:
case AG903_VID_MGR_TRS_OFP_ONE:
854:
break;
855:
default:
856:
return -
AG903_EINVAL;
857: }
858:
859:
if (vfp == 0 || vfp >
AG903_VID_MGR_MAX_TRS_VFP) {
860:
return -
AG903_EINVAL;
861: }
862:
863:
switch (href) {
864:
case AG903_VID_MGR_TRS_HREF_EAV:
865:
case AG903_VID_MGR_TRS_HREF_SAV:
866:
break;
867:
default:
868:
return -
AG903_EINVAL;
869: }
870:
871:
if (hfp >
AG903_VID_MGR_MAX_TRS_HFP) {
872:
return -
AG903_EINVAL;
873: }
874:
875:
876: handle->trs_efp = efp;
877: handle->trs_ofp = ofp;
878: handle->trs_vfp = vfp;
879: handle->trs_href = href;
880: handle->trs_hfp = hfp;
881: handle->is_dirty =
true;
882:
883:
return AG903_ENONE;
884: }
885:
886:
887:
904: int32_t
AG903_VidMgrSetDetectionCycle(
AG903_VidMgrOutputHandle *handle, uint32_t v_max, uint32_t h_max)
905: {
906:
907:
if ((handle == NULL) || (handle->id !=
AG903_VID_MGR_OUTPUT_HANDLE_ID)) {
908:
return -
AG903_EINVAL;
909: }
910:
911:
912:
if (v_max == 0 || v_max >
AG903_VID_MGR_MAX_SD_VERTICAL_CYCLE) {
913:
return -
AG903_EINVAL;
914: }
915:
916:
if (h_max == 0 || h_max >
AG903_VID_MGR_MAX_SD_HORIZONTAL_CYCLE) {
917:
return -
AG903_EINVAL;
918: }
919:
920:
921: handle->v_max = v_max;
922: handle->h_max = h_max;
923: handle->is_dirty =
true;
924:
925:
return AG903_ENONE;
926: }
927:
928:
929:
944: int32_t
AG903_VidMgrGetOutputState(
AG903_VidMgrOutputHandle *handle, uint32_t *blk_val, uint32_t *trs_val, uint32_t *v_blank, uint32_t *h_blank, uint32_t *tdm_ch)
945: {
946:
VIDPrmParamVIDCOnSTAT stat;
947:
948:
949:
if ((handle == NULL) || (handle->id !=
AG903_VID_MGR_OUTPUT_HANDLE_ID)) {
950:
return -
AG903_EINVAL;
951: }
952:
953:
954:
AG903_VidPrmGetVIDCOnSTAT(handle->port_no, &stat);
955:
956:
957:
if (blk_val != NULL) {
958: *blk_val = stat.blkval;
959: }
960:
if (trs_val != NULL) {
961: *trs_val = stat.trsval;
962: }
963:
if (v_blank != NULL) {
964: *v_blank = stat.vblank;
965: }
966:
if (h_blank != NULL) {
967: *h_blank = stat.hblank;
968: }
969:
if (tdm_ch != NULL) {
970: *tdm_ch = stat.tdmch;
971: }
972:
973:
return AG903_ENONE;
974: }
975:
976: