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AG903_bscreg.h

BSC Register Definition

BSC Register Definition

none

AXELL CORPORATION

2017_10_20 Auto-generated.

1: 8: 9: 13: 14: #ifndef _AG903_BSC_REGMAP_H_ 15: #define _AG903_BSC_REGMAP_H_ 16: 17: 18: #include "AG903_regmap.h" 19: 20: #ifndef __I 21: 22: #define __I volatile const 23: #endif 24: #ifndef __O 25: 26: #define __O volatile 27: #endif 28: #ifndef __IO 29: 30: #define __IO volatile 31: #endif 32: 33: 34: typedef struct { 35: 36: union { 37: __I uint32_t PBSTAT; 38: 39: struct { 40: __I uint32_t MDSRM32 : 1; 41: __I uint32_t MDDV : 1; 42: __I uint32_t BSGRT : 1; 43: __I uint32_t BSRQ : 1; 44: __I uint32_t PCC : 1; 45: __I uint32_t IDE : 1; 46: } PBSTAT_bits; 47: }; 48: 49: union { 50: __IO uint32_t PBINTMASK; 51: 52: struct { 53: __IO uint32_t INT0 : 1; 54: __IO uint32_t INT1 : 1; 55: __IO uint32_t INT2 : 1; 56: __IO uint32_t INT3 : 1; 57: } PBINTMASK_bits; 58: }; 59: 60: union { 61: __IO uint32_t PBINTMODE; 62: 63: struct { 64: __IO uint32_t INT0 : 1; 65: __IO uint32_t INT1 : 1; 66: __IO uint32_t INT2 : 1; 67: __IO uint32_t INT3 : 1; 68: } PBINTMODE_bits; 69: }; 70: 71: union { 72: __IO uint32_t PBINTPOL; 73: 74: struct { 75: __IO uint32_t INT0 : 1; 76: __IO uint32_t INT1 : 1; 77: __IO uint32_t INT2 : 1; 78: __IO uint32_t INT3 : 1; 79: } PBINTPOL_bits; 80: }; 81: 82: union { 83: __O uint32_t PBINTCLR; 84: 85: struct { 86: __O uint32_t INT0 : 1; 87: __O uint32_t INT1 : 1; 88: __O uint32_t INT2 : 1; 89: __O uint32_t INT3 : 1; 90: } PBINTCLR_bits; 91: }; 92: 93: __I uint32_t RESERVED1[4]; 94: 95: union { 96: __IO uint32_t CFMODE; 97: 98: struct { 99: __IO uint32_t MDCF : 2; 100: } CFMODE_bits; 101: }; 102: 103: __I uint32_t RESERVED2[2]; 104: 105: union { 106: __IO uint32_t PBDMAPOL; 107: 108: struct { 109: __IO uint32_t DCK : 1; 110: __IO uint32_t DRQ : 1; 111: } PBDMAPOL_bits; 112: }; 113: 114: union { 115: __IO uint32_t CFPMCMD; 116: 117: struct { 118: __IO uint32_t CMD : 3; 119: uint32_t : 5; 120: __IO uint32_t ACT : 1; 121: __IO uint32_t SLP : 1; 122: } CFPMCMD_bits; 123: }; 124: 125: __I uint32_t RESERVED3[1]; 126: 127: union { 128: __I uint32_t CFPMSTAT; 129: 130: struct { 131: __I uint32_t STAT : 3; 132: uint32_t : 5; 133: __I uint32_t CD : 1; 134: } CFPMSTAT_bits; 135: }; 136: 137: union { 138: __IO uint32_t CFPMTON; 139: }; 140: 141: union { 142: __IO uint32_t CFPMTR0; 143: }; 144: 145: union { 146: __IO uint32_t CFPMTR1; 147: }; 148: 149: union { 150: __IO uint32_t CFPMTR2; 151: }; 152: 153: union { 154: __IO uint32_t CFPMTPR; 155: }; 156: 157: 158: }AG903_BSC_Type; 159: 160: #define AG903_BSC ((volatile AG903_BSC_Type *) AG903_BSC_BASE) 161: 162: 163: #define AG903_BSC_PBSTAT_MDSRM32_POS 0 164: #define AG903_BSC_PBSTAT_MDSRM32_MSK (0x1UL << AG903_BSC_PBSTAT_MDSRM32_POS) 165: #define AG903_BSC_PBSTAT_MDDV_POS 1 166: #define AG903_BSC_PBSTAT_MDDV_MSK (0x1UL << AG903_BSC_PBSTAT_MDDV_POS) 167: #define AG903_BSC_PBSTAT_BSGRT_POS 2 168: #define AG903_BSC_PBSTAT_BSGRT_MSK (0x1UL << AG903_BSC_PBSTAT_BSGRT_POS) 169: #define AG903_BSC_PBSTAT_BSRQ_POS 3 170: #define AG903_BSC_PBSTAT_BSRQ_MSK (0x1UL << AG903_BSC_PBSTAT_BSRQ_POS) 171: #define AG903_BSC_PBSTAT_PCC_POS 4 172: #define AG903_BSC_PBSTAT_PCC_MSK (0x1UL << AG903_BSC_PBSTAT_PCC_POS) 173: #define AG903_BSC_PBSTAT_IDE_POS 5 174: #define AG903_BSC_PBSTAT_IDE_MSK (0x1UL << AG903_BSC_PBSTAT_IDE_POS) 175: 176: #define AG903_BSC_PBINTMASK_INT0_POS 0 177: #define AG903_BSC_PBINTMASK_INT0_MSK (0x1UL << AG903_BSC_PBINTMASK_INT0_POS) 178: #define AG903_BSC_PBINTMASK_INT1_POS 1 179: #define AG903_BSC_PBINTMASK_INT1_MSK (0x1UL << AG903_BSC_PBINTMASK_INT1_POS) 180: #define AG903_BSC_PBINTMASK_INT2_POS 2 181: #define AG903_BSC_PBINTMASK_INT2_MSK (0x1UL << AG903_BSC_PBINTMASK_INT2_POS) 182: #define AG903_BSC_PBINTMASK_INT3_POS 3 183: #define AG903_BSC_PBINTMASK_INT3_MSK (0x1UL << AG903_BSC_PBINTMASK_INT3_POS) 184: 185: #define AG903_BSC_PBINTMODE_INT0_POS 0 186: #define AG903_BSC_PBINTMODE_INT0_MSK (0x1UL << AG903_BSC_PBINTMODE_INT0_POS) 187: #define AG903_BSC_PBINTMODE_INT1_POS 1 188: #define AG903_BSC_PBINTMODE_INT1_MSK (0x1UL << AG903_BSC_PBINTMODE_INT1_POS) 189: #define AG903_BSC_PBINTMODE_INT2_POS 2 190: #define AG903_BSC_PBINTMODE_INT2_MSK (0x1UL << AG903_BSC_PBINTMODE_INT2_POS) 191: #define AG903_BSC_PBINTMODE_INT3_POS 3 192: #define AG903_BSC_PBINTMODE_INT3_MSK (0x1UL << AG903_BSC_PBINTMODE_INT3_POS) 193: 194: #define AG903_BSC_PBINTPOL_INT0_POS 0 195: #define AG903_BSC_PBINTPOL_INT0_MSK (0x1UL << AG903_BSC_PBINTPOL_INT0_POS) 196: #define AG903_BSC_PBINTPOL_INT1_POS 1 197: #define AG903_BSC_PBINTPOL_INT1_MSK (0x1UL << AG903_BSC_PBINTPOL_INT1_POS) 198: #define AG903_BSC_PBINTPOL_INT2_POS 2 199: #define AG903_BSC_PBINTPOL_INT2_MSK (0x1UL << AG903_BSC_PBINTPOL_INT2_POS) 200: #define AG903_BSC_PBINTPOL_INT3_POS 3 201: #define AG903_BSC_PBINTPOL_INT3_MSK (0x1UL << AG903_BSC_PBINTPOL_INT3_POS) 202: 203: #define AG903_BSC_PBINTCLR_INT0_POS 0 204: #define AG903_BSC_PBINTCLR_INT0_MSK (0x1UL << AG903_BSC_PBINTCLR_INT0_POS) 205: #define AG903_BSC_PBINTCLR_INT1_POS 1 206: #define AG903_BSC_PBINTCLR_INT1_MSK (0x1UL << AG903_BSC_PBINTCLR_INT1_POS) 207: #define AG903_BSC_PBINTCLR_INT2_POS 2 208: #define AG903_BSC_PBINTCLR_INT2_MSK (0x1UL << AG903_BSC_PBINTCLR_INT2_POS) 209: #define AG903_BSC_PBINTCLR_INT3_POS 3 210: #define AG903_BSC_PBINTCLR_INT3_MSK (0x1UL << AG903_BSC_PBINTCLR_INT3_POS) 211: 212: #define AG903_BSC_CFMODE_MDCF_POS 0 213: #define AG903_BSC_CFMODE_MDCF_MSK (0x3UL << AG903_BSC_CFMODE_MDCF_POS) 214: 215: #define AG903_BSC_PBDMAPOL_DCK_POS 0 216: #define AG903_BSC_PBDMAPOL_DCK_MSK (0x1UL << AG903_BSC_PBDMAPOL_DCK_POS) 217: #define AG903_BSC_PBDMAPOL_DRQ_POS 1 218: #define AG903_BSC_PBDMAPOL_DRQ_MSK (0x1UL << AG903_BSC_PBDMAPOL_DRQ_POS) 219: 220: #define AG903_BSC_CFPMCMD_CMD_POS 0 221: #define AG903_BSC_CFPMCMD_CMD_MSK (0x7UL << AG903_BSC_CFPMCMD_CMD_POS) 222: #define AG903_BSC_CFPMCMD_ACT_POS 8 223: #define AG903_BSC_CFPMCMD_ACT_MSK (0x1UL << AG903_BSC_CFPMCMD_ACT_POS) 224: #define AG903_BSC_CFPMCMD_SLP_POS 9 225: #define AG903_BSC_CFPMCMD_SLP_MSK (0x1UL << AG903_BSC_CFPMCMD_SLP_POS) 226: 227: #define AG903_BSC_CFPMSTAT_STAT_POS 0 228: #define AG903_BSC_CFPMSTAT_STAT_MSK (0x7UL << AG903_BSC_CFPMSTAT_STAT_POS) 229: #define AG903_BSC_CFPMSTAT_CD_POS 8 230: #define AG903_BSC_CFPMSTAT_CD_MSK (0x1UL << AG903_BSC_CFPMSTAT_CD_POS) 231: 232: #define AG903_BSC_CFPMTON_CYCLE_POS 0 233: #define AG903_BSC_CFPMTON_CYCLE_MSK (0xffffffffUL << AG903_BSC_CFPMTON_CYCLE_POS) 234: 235: #define AG903_BSC_CFPMTR0_CYCLE_POS 0 236: #define AG903_BSC_CFPMTR0_CYCLE_MSK (0xffffffffUL << AG903_BSC_CFPMTR0_CYCLE_POS) 237: 238: #define AG903_BSC_CFPMTR1_CYCLE_POS 0 239: #define AG903_BSC_CFPMTR1_CYCLE_MSK (0xffffffffUL << AG903_BSC_CFPMTR1_CYCLE_POS) 240: 241: #define AG903_BSC_CFPMTR2_CYCLE_POS 0 242: #define AG903_BSC_CFPMTR2_CYCLE_MSK (0xffffffffUL << AG903_BSC_CFPMTR2_CYCLE_POS) 243: 244: #define AG903_BSC_CFPMTPR_CYCLE_POS 0 245: #define AG903_BSC_CFPMTPR_CYCLE_MSK (0xffffffffUL << AG903_BSC_CFPMTPR_CYCLE_POS) 246: 247: #endif 248:
名前 
説明 
BSC Base Address 
BSCCFMODE MDCF-bit mask 
BSCCFMODE MDCF-bit position 
BSCCFPMCMD ACT-bit mask 
BSCCFPMCMD ACT-bit position 
BSCCFPMCMD CMD-bit mask 
BSCCFPMCMD CMD-bit position 
BSCCFPMCMD SLP-bit mask 
BSCCFPMCMD SLP-bit position 
BSCCFPMSTAT CD-bit mask 
BSCCFPMSTAT CD-bit position 
BSCCFPMSTAT STAT-bit mask 
BSCCFPMSTAT STAT-bit position 
BSCCFPMTON CYCLE-bit mask 
BSCCFPMTON CYCLE-bit position 
BSCCFPMTPR CYCLE-bit mask 
BSCCFPMTPR CYCLE-bit position 
BSCCFPMTR0 CYCLE-bit mask 
BSCCFPMTR0 CYCLE-bit position 
BSCCFPMTR1 CYCLE-bit mask 
BSCCFPMTR1 CYCLE-bit position 
BSCCFPMTR2 CYCLE-bit mask 
BSCCFPMTR2 CYCLE-bit position 
BSCPBDMAPOL DCK-bit mask 
BSCPBDMAPOL DCK-bit position 
BSCPBDMAPOL DRQ-bit mask 
BSCPBDMAPOL DRQ-bit position 
BSCPBINTCLR INT0-bit mask 
BSCPBINTCLR INT0-bit position 
BSCPBINTCLR INT1-bit mask 
BSCPBINTCLR INT1-bit position 
BSCPBINTCLR INT2-bit mask 
BSCPBINTCLR INT2-bit position 
BSCPBINTCLR INT3-bit mask 
BSCPBINTCLR INT3-bit position 
BSCPBINTMASK INT0-bit mask 
BSCPBINTMASK INT0-bit position 
BSCPBINTMASK INT1-bit mask 
BSCPBINTMASK INT1-bit position 
BSCPBINTMASK INT2-bit mask 
BSCPBINTMASK INT2-bit position 
BSCPBINTMASK INT3-bit mask 
BSCPBINTMASK INT3-bit position 
BSCPBINTMODE INT0-bit mask 
BSCPBINTMODE INT0-bit position 
BSCPBINTMODE INT1-bit mask 
BSCPBINTMODE INT1-bit position 
BSCPBINTMODE INT2-bit mask 
BSCPBINTMODE INT2-bit position 
BSCPBINTMODE INT3-bit mask 
BSCPBINTMODE INT3-bit position 
BSCPBINTPOL INT0-bit mask 
BSCPBINTPOL INT0-bit position 
BSCPBINTPOL INT1-bit mask 
BSCPBINTPOL INT1-bit position 
BSCPBINTPOL INT2-bit mask 
BSCPBINTPOL INT2-bit position 
BSCPBINTPOL INT3-bit mask 
BSCPBINTPOL INT3-bit position 
BSCPBSTAT BSGRT-bit mask 
BSCPBSTAT BSGRT-bit position 
BSCPBSTAT BSRQ-bit mask 
BSCPBSTAT BSRQ-bit position 
BSCPBSTAT IDE-bit mask 
BSCPBSTAT IDE-bit position 
BSCPBSTAT MDDV-bit mask 
BSCPBSTAT MDDV-bit position 
BSCPBSTAT MDSRM32-bit mask 
BSCPBSTAT MDSRM32-bit position 
BSCPBSTAT PCC-bit mask 
BSCPBSTAT PCC-bit position 
名前 
説明 
BSC Type 
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