AG903ライブラリリファレンス
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AG903_SSPPrmSetControl 関数

SSPnSSPCR0,SSPnSSPCR1のレジスタWrite

Syntax
C++
void AG903_SSPPrmSetControl(uint8_t ch, AG903_SSPPrmCtrl* param);
引数 
説明 
uint8_t ch 
[in] SSPチャネル 
AG903_SSPPrmCtrl* param 
[in] 制御パラメータ 

void

SSPnSSPCR0,SSPnSSPCR1のレジスタWrite

1: void AG903_SSPPrmSetControl(uint8_t ch, AG903_SSPPrmCtrl* param) 2: { 3: uint32_t ctrl_0=0; 4: uint32_t ctrl_1=0; 5: 6: ASSERT(AG903_SSP_CH_NUM > ch); 7: 8: if (AG903_SSP_OPM_MASTER == param->opm || 9: AG903_SSP_OPM_MASTER_STEREO == param->opm) { 10: ctrl_0 |= (uint32_t)(1 << AG903_SSPn_SSPCR0_FSFDBK_POS); 11: ctrl_0 |= (uint32_t)(1 << AG903_SSPn_SSPCR0_SCLKFDBK_POS); 12: } 13: 14: if(0 != param->spi_fspo) { 15: ctrl_0 |= (uint32_t)(1 << AG903_SSPn_SSPCR0_SPIFSPO_POS); 16: } 17: 18: ctrl_0 |= (uint32_t)((param->format << AG903_SSPn_SSPCR0_FFMT_POS) & AG903_SSPn_SSPCR0_FFMT_MSK); 19: 20: if(0 != param->spi_flash) { 21: ctrl_0 |= (uint32_t)(1 << AG903_SSPn_SSPCR0_FLASH_POS); 22: } 23: if(0 != param->validity) { 24: ctrl_0 |= (uint32_t)(1 << AG903_SSPn_SSPCR0_Validity_POS); 25: } 26: 27: ctrl_0 |= (uint32_t)((param->fsdist << AG903_SSPn_SSPCR0_FSDIST_POS) & AG903_SSPn_SSPCR0_FSDIST_MSK); 28: 29: if(0 != param->lsb) { 30: ctrl_0 |= (uint32_t)(1 << AG903_SSPn_SSPCR0_LSB_POS); 31: } 32: if(0 != param->fspo) { 33: ctrl_0 |= (uint32_t)(1 << AG903_SSPn_SSPCR0_FSPO_POS); 34: } 35: if(0 != param->fsjstfy) { 36: ctrl_0 |= (uint32_t)(1 << AG903_SSPn_SSPCR0_FSJSTFY_POS); 37: } 38: 39: ctrl_0 |= (uint32_t)((param->opm << AG903_SSPn_SSPCR0_OPM_POS) & AG903_SSPn_SSPCR0_OPM_MSK); 40: 41: if(0 != param->sclkpo) { 42: ctrl_0 |= (uint32_t)(1 << AG903_SSPn_SSPCR0_SCLKPO_POS); 43: } 44: if(0 != param->sclkph) { 45: ctrl_0 |= (uint32_t)(1 << AG903_SSPn_SSPCR0_SCLKPH_POS); 46: } 47: 48: ctrl_1 |= (uint32_t)((param->pdl << AG903_SSPn_SSPCR1_PDL_POS) & AG903_SSPn_SSPCR1_PDL_MSK); 49: ctrl_1 |= (uint32_t)((param->sdl << AG903_SSPn_SSPCR1_SDL_POS) & AG903_SSPn_SSPCR1_SDL_MSK); 50: ctrl_1 |= (uint32_t)((param->sclk_div << AG903_SSPn_SSPCR1_SCLKDIV_POS) & AG903_SSPn_SSPCR1_SCLKDIV_MSK); 51: 52: AG903_SSP_WRITE_REG(ch,SSPCR0,ctrl_0); 53: AG903_SSP_WRITE_REG(ch,SSPCR1,ctrl_1); 54: return; 55: }
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