AG903ライブラリリファレンス
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1: 9: 10: 14: 15: 16: #include <stdio.h> 17: #include "via/viaprm.h" 18: #include "register/AG903_viareg.h" 19: #include "sys/sscprm.h" 20: #include "AG903_common.h" 21: 22: 29: void AG903_ViaPrmSetVIASRCSELECT(uint32_t id, VIAPrmParamVIASRCSELECT *select) 30: { 31: uint16_t val; 32: 33: ASSERT(id < AG903_VIA_PRM_MAX_PORTS); 34: ASSERT(select != NULL); 35: ASSERT(!(select->gcat & ~(0x1))); 36: ASSERT(!(select->nsck & ~(0x1))); 37: ASSERT(!(select->nsns & ~(0x1))); 38: ASSERT(!(select->nons & ~(0x1))); 39: 40: val = (select->gcat << AG903_VIA_SRC_SELECT_GCAT_POS) 41: | (select->nsck << AG903_VIA_SRC_SELECT_NSCK_POS) 42: | (select->nsns << AG903_VIA_SRC_SELECT_NSNS_POS) 43: | (select->nons << AG903_VIA_SRC_SELECT_NONS_POS); 44: 45: AG903_SSCPrmWriteCmpstVideoDec(id, AG903_VIA_SRC_SELECT, val); 46: } 47: 48: 49: 56: void AG903_ViaPrmGetVIASRCSELECT(uint32_t id, VIAPrmParamVIASRCSELECT *select) 57: { 58: uint16_t val; 59: 60: ASSERT(id < AG903_VIA_PRM_MAX_PORTS); 61: ASSERT(select != NULL); 62: 63: AG903_SSCPrmReadCmpstVideoDec(id, AG903_VIA_SRC_SELECT, &val); 64: 65: select->gcat = (val & AG903_VIA_SRC_SELECT_GCAT_MSK) >> AG903_VIA_SRC_SELECT_GCAT_POS; 66: select->nsck = (val & AG903_VIA_SRC_SELECT_NSCK_MSK) >> AG903_VIA_SRC_SELECT_NSCK_POS; 67: select->nsns = (val & AG903_VIA_SRC_SELECT_NSNS_MSK) >> AG903_VIA_SRC_SELECT_NSNS_POS; 68: select->nons = (val & AG903_VIA_SRC_SELECT_NONS_MSK) >> AG903_VIA_SRC_SELECT_NONS_POS; 69: } 70: 71: 72: 79: void AG903_ViaPrmSetVIASRCFORMAT(uint32_t id, uint16_t fmt) 80: { 81: uint16_t val; 82: 83: ASSERT(id < AG903_VIA_PRM_MAX_PORTS); 84: ASSERT(!(fmt & ~(0xF))); 85: 86: val = (fmt << AG903_VIA_SRC_FORMAT_FMT_POS); 87: 88: AG903_SSCPrmWriteCmpstVideoDec(id, AG903_VIA_SRC_FORMAT, val); 89: } 90: 91: 92: 99: void AG903_ViaPrmGetVIASRCFORMAT(uint32_t id, uint16_t *fmt) 100: { 101: uint16_t val; 102: 103: ASSERT(id < AG903_VIA_PRM_MAX_PORTS); 104: ASSERT(fmt != NULL); 105: 106: AG903_SSCPrmReadCmpstVideoDec(id, AG903_VIA_SRC_FORMAT, &val); 107: 108: *fmt = (val & AG903_VIA_SRC_FORMAT_FMT_MSK) >> AG903_VIA_SRC_FORMAT_FMT_POS; 109: } 110: 111: 112: 119: void AG903_ViaPrmSetVIASRCHCYCLE(uint32_t id, uint16_t hcycle) 120: { 121: uint16_t val; 122: 123: ASSERT(id < AG903_VIA_PRM_MAX_PORTS); 124: ASSERT(!(hcycle & ~(0xFFF))); 125: 126: val = (hcycle << AG903_VIA_SRC_HCYCLE_HCYCLE_POS); 127: 128: AG903_SSCPrmWriteCmpstVideoDec(id, AG903_VIA_SRC_HCYCLE, val); 129: } 130: 131: 132: 139: void AG903_ViaPrmGetVIASRCHCYCLE(uint32_t id, uint16_t *hcycle) 140: { 141: uint16_t val; 142: 143: ASSERT(id < AG903_VIA_PRM_MAX_PORTS); 144: ASSERT(hcycle != NULL); 145: 146: AG903_SSCPrmReadCmpstVideoDec(id, AG903_VIA_SRC_HCYCLE, &val); 147: 148: *hcycle = (val & AG903_VIA_SRC_HCYCLE_HCYCLE_MSK) >> AG903_VIA_SRC_HCYCLE_HCYCLE_POS; 149: } 150: 151: 152: 159: void AG903_ViaPrmSetVIASRCHVALID(uint32_t id, uint16_t hvalid) 160: { 161: uint16_t val; 162: 163: ASSERT(id < AG903_VIA_PRM_MAX_PORTS); 164: ASSERT(!(hvalid & ~(0xFFF))); 165: 166: val = (hvalid << AG903_VIA_SRC_HVALID_HVALID_POS); 167: 168: AG903_SSCPrmWriteCmpstVideoDec(id, AG903_VIA_SRC_HVALID, val); 169: } 170: 171: 172: 179: void AG903_ViaPrmGetVIASRCHVALID(uint32_t id, uint16_t *hvalid) 180: { 181: uint16_t val; 182: 183: ASSERT(id < AG903_VIA_PRM_MAX_PORTS); 184: ASSERT(hvalid != NULL); 185: 186: AG903_SSCPrmReadCmpstVideoDec(id, AG903_VIA_SRC_HVALID, &val); 187: 188: *hvalid = (val & AG903_VIA_SRC_HVALID_HVALID_MSK) >> AG903_VIA_SRC_HVALID_HVALID_POS; 189: } 190: 191: 192: 199: void AG903_ViaPrmSetVIASRCHDELAY(uint32_t id, uint16_t hdelay) 200: { 201: uint16_t val; 202: 203: ASSERT(id < AG903_VIA_PRM_MAX_PORTS); 204: ASSERT(!(hdelay & ~(0x7FF))); 205: 206: val = (hdelay << AG903_VIA_SRC_HDELAY_HDELAY_POS); 207: 208: AG903_SSCPrmWriteCmpstVideoDec(id, AG903_VIA_SRC_HDELAY, val); 209: } 210: 211: 212: 219: void AG903_ViaPrmGetVIASRCHDELAY(uint32_t id, uint16_t *hdelay) 220: { 221: uint16_t val; 222: 223: ASSERT(id < AG903_VIA_PRM_MAX_PORTS); 224: ASSERT(hdelay != NULL); 225: 226: AG903_SSCPrmReadCmpstVideoDec(id, AG903_VIA_SRC_HDELAY, &val); 227: 228: *hdelay = (val & AG903_VIA_SRC_HDELAY_HDELAY_MSK) >> AG903_VIA_SRC_HDELAY_HDELAY_POS; 229: } 230: 231: 232: 239: void AG903_ViaPrmSetVIASRCVCYCLE(uint32_t id, uint16_t vcycle) 240: { 241: uint16_t val; 242: 243: ASSERT(id < AG903_VIA_PRM_MAX_PORTS); 244: ASSERT(!(vcycle & ~(0x3FF))); 245: 246: val = (vcycle << AG903_VIA_SRC_VCYCLE_VCYCLE_POS); 247: 248: AG903_SSCPrmWriteCmpstVideoDec(id, AG903_VIA_SRC_VCYCLE, val); 249: } 250: 251: 252: 259: void AG903_ViaPrmGetVIASRCVCYCLE(uint32_t id, uint16_t *vcycle) 260: { 261: uint16_t val; 262: 263: ASSERT(id < AG903_VIA_PRM_MAX_PORTS); 264: ASSERT(vcycle != NULL); 265: 266: AG903_SSCPrmReadCmpstVideoDec(id, AG903_VIA_SRC_VCYCLE, &val); 267: 268: *vcycle = (val & AG903_VIA_SRC_VCYCLE_VCYCLE_MSK) >> AG903_VIA_SRC_VCYCLE_VCYCLE_POS; 269: } 270: 271: 272: 279: void AG903_ViaPrmSetVIASRCVVALID(uint32_t id, uint16_t vvalid) 280: { 281: uint16_t val; 282: 283: ASSERT(id < AG903_VIA_PRM_MAX_PORTS); 284: ASSERT(!(vvalid & ~(0x3FF))); 285: 286: val = (vvalid << AG903_VIA_SRC_VVALID_VVALID_POS); 287: 288: AG903_SSCPrmWriteCmpstVideoDec(id, AG903_VIA_SRC_VVALID, val); 289: } 290: 291: 292: 299: void AG903_ViaPrmGetVIASRCVVALID(uint32_t id, uint16_t *vvalid) 300: { 301: uint16_t val; 302: 303: ASSERT(id < AG903_VIA_PRM_MAX_PORTS); 304: ASSERT(vvalid != NULL); 305: 306: AG903_SSCPrmReadCmpstVideoDec(id, AG903_VIA_SRC_VVALID, &val); 307: 308: *vvalid = (val & AG903_VIA_SRC_VVALID_VVALID_MSK) >> AG903_VIA_SRC_VVALID_VVALID_POS; 309: } 310: 311: 312: 319: void AG903_ViaPrmSetVIASRCVDELAY(uint32_t id, uint16_t vdelay) 320: { 321: uint16_t val; 322: 323: ASSERT(id < AG903_VIA_PRM_MAX_PORTS); 324: ASSERT(!(vdelay & ~(0x3FF))); 325: 326: val = (vdelay << AG903_VIA_SRC_VDELAY_VDELAY_POS); 327: 328: AG903_SSCPrmWriteCmpstVideoDec(id, AG903_VIA_SRC_VDELAY, val); 329: } 330: 331: 332: 339: void AG903_ViaPrmGetVIASRCVDELAY(uint32_t id, uint16_t *vdelay) 340: { 341: uint16_t val; 342: 343: ASSERT(id < AG903_VIA_PRM_MAX_PORTS); 344: ASSERT(vdelay != NULL); 345: 346: AG903_SSCPrmReadCmpstVideoDec(id, AG903_VIA_SRC_VDELAY, &val); 347: 348: *vdelay = (val & AG903_VIA_SRC_VDELAY_VDELAY_MSK) >> AG903_VIA_SRC_VDELAY_VDELAY_POS; 349: } 350: 351: 352: 359: void AG903_ViaPrmSetVIASRCFRMFREQ(uint32_t id, uint16_t frm) 360: { 361: uint16_t val; 362: 363: ASSERT(id < AG903_VIA_PRM_MAX_PORTS); 364: ASSERT(!(frm & ~(0x1))); 365: 366: val = (frm << AG903_VIA_SRC_FRMFREQ_FRM_POS); 367: 368: AG903_SSCPrmWriteCmpstVideoDec(id, AG903_VIA_SRC_FRMFREQ, val); 369: } 370: 371: 372: 379: void AG903_ViaPrmGetVIASRCFRMFREQ(uint32_t id, uint16_t *frm) 380: { 381: uint16_t val; 382: 383: ASSERT(id < AG903_VIA_PRM_MAX_PORTS); 384: ASSERT(frm != NULL); 385: 386: AG903_SSCPrmReadCmpstVideoDec(id, AG903_VIA_SRC_FRMFREQ, &val); 387: 388: *frm = (val & AG903_VIA_SRC_FRMFREQ_FRM_MSK) >> AG903_VIA_SRC_FRMFREQ_FRM_POS; 389: } 390: 391: 392: 400: void AG903_ViaPrmSetVIASIGYCS(uint32_t id, uint16_t trap, uint16_t mono) 401: { 402: uint16_t val; 403: 404: ASSERT(id < AG903_VIA_PRM_MAX_PORTS); 405: ASSERT(!(trap & ~(0x1))); 406: ASSERT(!(mono & ~(0x1))); 407: 408: val = (trap << AG903_VIA_SIG_YCS_TRAP_POS) 409: | (mono << AG903_VIA_SIG_YCS_MONO_POS); 410: 411: AG903_SSCPrmWriteCmpstVideoDec(id, AG903_VIA_SIG_YCS, val); 412: } 413: 414: 415: 423: void AG903_ViaPrmGetVIASIGYCS(uint32_t id, uint16_t *trap, uint16_t *mono) 424: { 425: uint16_t val; 426: 427: ASSERT(id < AG903_VIA_PRM_MAX_PORTS); 428: ASSERT(trap != NULL); 429: ASSERT(mono != NULL); 430: 431: AG903_SSCPrmReadCmpstVideoDec(id, AG903_VIA_SIG_YCS, &val); 432: 433: *trap = (val & AG903_VIA_SIG_YCS_TRAP_MSK) >> AG903_VIA_SIG_YCS_TRAP_POS; 434: *mono = (val & AG903_VIA_SIG_YCS_MONO_MSK) >> AG903_VIA_SIG_YCS_MONO_POS; 435: } 436: 437: 438: 446: void AG903_ViaPrmSetVIACHDSETUP2(uint32_t id, uint16_t bpf, uint16_t hue) 447: { 448: uint16_t val; 449: 450: ASSERT(id < AG903_VIA_PRM_MAX_PORTS); 451: ASSERT(!(bpf & ~(0x1))); 452: ASSERT(!(hue & ~(0xFF))); 453: 454: val = (bpf << AG903_VIA_CHD_SETUP2_BPF_POS) 455: | (hue << AG903_VIA_CHD_SETUP2_HUE_POS); 456: 457: AG903_SSCPrmWriteCmpstVideoDec(id, AG903_VIA_CHD_SETUP2, val); 458: } 459: 460: 461: 469: void AG903_ViaPrmGetVIACHDSETUP2(uint32_t id, uint16_t *bpf, uint16_t *hue) 470: { 471: uint16_t val; 472: 473: ASSERT(id < AG903_VIA_PRM_MAX_PORTS); 474: ASSERT(bpf != NULL); 475: ASSERT(hue != NULL); 476: 477: AG903_SSCPrmReadCmpstVideoDec(id, AG903_VIA_CHD_SETUP2, &val); 478: 479: *bpf = (val & AG903_VIA_CHD_SETUP2_BPF_MSK) >> AG903_VIA_CHD_SETUP2_BPF_POS; 480: *hue = (val & AG903_VIA_CHD_SETUP2_HUE_MSK) >> AG903_VIA_CHD_SETUP2_HUE_POS; 481: } 482: 483: 484: 491: void AG903_ViaPrmSetVIACHDSETUP3(uint32_t id, VIAPrmParamVIACHDSETUP3 *setup) 492: { 493: uint16_t val; 494: 495: ASSERT(id < AG903_VIA_PRM_MAX_PORTS); 496: ASSERT(setup != NULL); 497: ASSERT(!(setup->agcen & ~(0x1))); 498: ASSERT(!(setup->accov & ~(0x3F))); 499: ASSERT(!(setup->acctc & ~(0x3))); 500: ASSERT(!(setup->accmark & ~(0x3F))); 501: 502: val = (setup->agcen << AG903_VIA_CHD_SETUP3_AGCEN_POS) 503: | (setup->accov << AG903_VIA_CHD_SETUP3_ACCOV_POS) 504: | (setup->acctc << AG903_VIA_CHD_SETUP3_ACCTC_POS) 505: | (setup->accmark << AG903_VIA_CHD_SETUP3_ACCMARK_POS); 506: 507: AG903_SSCPrmWriteCmpstVideoDec(id, AG903_VIA_CHD_SETUP3, val); 508: } 509: 510: 511: 518: void AG903_ViaPrmGetVIACHDSETUP3(uint32_t id, VIAPrmParamVIACHDSETUP3 *setup) 519: { 520: uint16_t val; 521: 522: ASSERT(id < AG903_VIA_PRM_MAX_PORTS); 523: ASSERT(setup != NULL); 524: 525: AG903_SSCPrmReadCmpstVideoDec(id, AG903_VIA_CHD_SETUP3, &val); 526: 527: setup->agcen = (val & AG903_VIA_CHD_SETUP3_AGCEN_MSK) >> AG903_VIA_CHD_SETUP3_AGCEN_POS; 528: setup->accov = (val & AG903_VIA_CHD_SETUP3_ACCOV_MSK) >> AG903_VIA_CHD_SETUP3_ACCOV_POS; 529: setup->acctc = (val & AG903_VIA_CHD_SETUP3_ACCTC_MSK) >> AG903_VIA_CHD_SETUP3_ACCTC_POS; 530: setup->accmark = (val & AG903_VIA_CHD_SETUP3_ACCMARK_MSK) >> AG903_VIA_CHD_SETUP3_ACCMARK_POS; 531: } 532: 533: 534: 541: void AG903_ViaPrmSetVIACHDSETUP5(uint32_t id, VIAPrmParamVIACHDSETUP5 *setup) 542: { 543: uint16_t val; 544: 545: ASSERT(id < AG903_VIA_PRM_MAX_PORTS); 546: ASSERT(setup != NULL); 547: ASSERT(!(setup->cbpllulth & ~(0x3F))); 548: ASSERT(!(setup->cbpllulsv & ~(0x3))); 549: ASSERT(!(setup->agcgainspd & ~(0x3))); 550: ASSERT(!(setup->agcofstspd & ~(0x3))); 551: ASSERT(!(setup->agcpos & ~(0x1))); 552: ASSERT(!(setup->agcpal & ~(0x1))); 553: ASSERT(!(setup->agcgainen & ~(0x1))); 554: ASSERT(!(setup->agcofsten & ~(0x1))); 555: 556: val = (setup->cbpllulth << AG903_VIA_CHD_SETUP5_CBPLLULTH_POS) 557: | (setup->cbpllulsv << AG903_VIA_CHD_SETUP5_CBPLLULSV_POS) 558: | (setup->agcgainspd << AG903_VIA_CHD_SETUP5_AGCGAINSPD_POS) 559: | (setup->agcofstspd << AG903_VIA_CHD_SETUP5_AGCOFSTSPD_POS) 560: | (setup->agcpos << AG903_VIA_CHD_SETUP5_AGCPOS_POS) 561: | (setup->agcpal << AG903_VIA_CHD_SETUP5_AGCPAL_POS) 562: | (setup->agcgainen << AG903_VIA_CHD_SETUP5_AGCGAINEN_POS) 563: | (setup->agcofsten << AG903_VIA_CHD_SETUP5_AGCOFSTEN_POS); 564: 565: AG903_SSCPrmWriteCmpstVideoDec(id, AG903_VIA_CHD_SETUP5, val); 566: } 567: 568: 569: 576: void AG903_ViaPrmGetVIACHDSETUP5(uint32_t id, VIAPrmParamVIACHDSETUP5 *setup) 577: { 578: uint16_t val; 579: 580: ASSERT(id < AG903_VIA_PRM_MAX_PORTS); 581: ASSERT(setup != NULL); 582: 583: AG903_SSCPrmReadCmpstVideoDec(id, AG903_VIA_CHD_SETUP5, &val); 584: 585: setup->cbpllulth = (val & AG903_VIA_CHD_SETUP5_CBPLLULTH_MSK) >> AG903_VIA_CHD_SETUP5_CBPLLULTH_POS; 586: setup->cbpllulsv = (val & AG903_VIA_CHD_SETUP5_CBPLLULSV_MSK) >> AG903_VIA_CHD_SETUP5_CBPLLULSV_POS; 587: setup->agcgainspd = (val & AG903_VIA_CHD_SETUP5_AGCGAINSPD_MSK) >> AG903_VIA_CHD_SETUP5_AGCGAINSPD_POS; 588: setup->agcofstspd = (val & AG903_VIA_CHD_SETUP5_AGCOFSTSPD_MSK) >> AG903_VIA_CHD_SETUP5_AGCOFSTSPD_POS; 589: setup->agcpos = (val & AG903_VIA_CHD_SETUP5_AGCPOS_MSK) >> AG903_VIA_CHD_SETUP5_AGCPOS_POS; 590: setup->agcpal = (val & AG903_VIA_CHD_SETUP5_AGCPAL_MSK) >> AG903_VIA_CHD_SETUP5_AGCPAL_POS; 591: setup->agcgainen = (val & AG903_VIA_CHD_SETUP5_AGCGAINEN_MSK) >> AG903_VIA_CHD_SETUP5_AGCGAINEN_POS; 592: setup->agcofsten = (val & AG903_VIA_CHD_SETUP5_AGCOFSTEN_MSK) >> AG903_VIA_CHD_SETUP5_AGCOFSTEN_POS; 593: } 594: 595: 596: 604: void AG903_ViaPrmSetVIAOUTLEVELY(uint32_t id, uint16_t yofst, uint16_t ygain) 605: { 606: uint16_t val; 607: 608: ASSERT(id < AG903_VIA_PRM_MAX_PORTS); 609: ASSERT(!(yofst & ~(0xFF))); 610: ASSERT(!(ygain & ~(0xFF))); 611: 612: val = (yofst << AG903_VIA_OUT_LEVELY_YOFST_POS) 613: | (ygain << AG903_VIA_OUT_LEVELY_YGAIN_POS); 614: 615: AG903_SSCPrmWriteCmpstVideoDec(id, AG903_VIA_OUT_LEVELY, val); 616: } 617: 618: 619: 627: void AG903_ViaPrmGetVIAOUTLEVELY(uint32_t id, uint16_t *yofst, uint16_t *ygain) 628: { 629: uint16_t val; 630: 631: ASSERT(id < AG903_VIA_PRM_MAX_PORTS); 632: ASSERT(yofst != NULL); 633: ASSERT(ygain != NULL); 634: 635: AG903_SSCPrmReadCmpstVideoDec(id, AG903_VIA_OUT_LEVELY, &val); 636: 637: *yofst = (val & AG903_VIA_OUT_LEVELY_YOFST_MSK) >> AG903_VIA_OUT_LEVELY_YOFST_POS; 638: *ygain = (val & AG903_VIA_OUT_LEVELY_YGAIN_MSK) >> AG903_VIA_OUT_LEVELY_YGAIN_POS; 639: } 640: 641: 642: 650: void AG903_ViaPrmSetVIAOUTLEVELCB(uint32_t id, uint16_t cbofst, uint16_t cbgain) 651: { 652: uint16_t val; 653: 654: ASSERT(id < AG903_VIA_PRM_MAX_PORTS); 655: ASSERT(!(cbofst & ~(0xFF))); 656: ASSERT(!(cbgain & ~(0xFF))); 657: 658: val = (cbofst << AG903_VIA_OUT_LEVELCB_CBOFST_POS) 659: | (cbgain << AG903_VIA_OUT_LEVELCB_CBGAIN_POS); 660: 661: AG903_SSCPrmWriteCmpstVideoDec(id, AG903_VIA_OUT_LEVELCB, val); 662: } 663: 664: 665: 673: void AG903_ViaPrmGetVIAOUTLEVELCB(uint32_t id, uint16_t *cbofst, uint16_t *cbgain) 674: { 675: uint16_t val; 676: 677: ASSERT(id < AG903_VIA_PRM_MAX_PORTS); 678: ASSERT(cbofst != NULL); 679: ASSERT(cbgain != NULL); 680: 681: AG903_SSCPrmReadCmpstVideoDec(id, AG903_VIA_OUT_LEVELCB, &val); 682: 683: *cbofst = (val & AG903_VIA_OUT_LEVELCB_CBOFST_MSK) >> AG903_VIA_OUT_LEVELCB_CBOFST_POS; 684: *cbgain = (val & AG903_VIA_OUT_LEVELCB_CBGAIN_MSK) >> AG903_VIA_OUT_LEVELCB_CBGAIN_POS; 685: } 686: 687: 688: 696: void AG903_ViaPrmSetVIAOUTLEVELCR(uint32_t id, uint16_t crofst, uint16_t crgain) 697: { 698: uint16_t val; 699: 700: ASSERT(id < AG903_VIA_PRM_MAX_PORTS); 701: ASSERT(!(crofst & ~(0xFF))); 702: ASSERT(!(crgain & ~(0xFF))); 703: 704: val = (crofst << AG903_VIA_OUT_LEVELCR_CROFST_POS) 705: | (crgain << AG903_VIA_OUT_LEVELCR_CRGAIN_POS); 706: 707: AG903_SSCPrmWriteCmpstVideoDec(id, AG903_VIA_OUT_LEVELCR, val); 708: } 709: 710: 711: 719: void AG903_ViaPrmGetVIAOUTLEVELCR(uint32_t id, uint16_t *crofst, uint16_t *crgain) 720: { 721: uint16_t val; 722: 723: ASSERT(id < AG903_VIA_PRM_MAX_PORTS); 724: ASSERT(crofst != NULL); 725: ASSERT(crgain != NULL); 726: 727: AG903_SSCPrmReadCmpstVideoDec(id, AG903_VIA_OUT_LEVELCR, &val); 728: 729: *crofst = (val & AG903_VIA_OUT_LEVELCR_CROFST_MSK) >> AG903_VIA_OUT_LEVELCR_CROFST_POS; 730: *crgain = (val & AG903_VIA_OUT_LEVELCR_CRGAIN_MSK) >> AG903_VIA_OUT_LEVELCR_CRGAIN_POS; 731: } 732: 733: 734: 741: void AG903_ViaPrmSetVIACLAMPLEVEL(uint32_t id, uint16_t clampofs) 742: { 743: uint16_t val; 744: 745: ASSERT(id < AG903_VIA_PRM_MAX_PORTS); 746: ASSERT(!(clampofs & ~(0x3FF))); 747: 748: val = (clampofs << AG903_VIA_CLAMP_LEVEL_CLAMPOFS_POS); 749: 750: AG903_SSCPrmWriteCmpstVideoDec(id, AG903_VIA_CLAMP_LEVEL, val); 751: } 752: 753: 754: 761: void AG903_ViaPrmGetVIACLAMPLEVEL(uint32_t id, uint16_t *clampofs) 762: { 763: uint16_t val; 764: 765: ASSERT(id < AG903_VIA_PRM_MAX_PORTS); 766: ASSERT(clampofs != NULL); 767: 768: AG903_SSCPrmReadCmpstVideoDec(id, AG903_VIA_CLAMP_LEVEL, &val); 769: 770: *clampofs = (val & AG903_VIA_CLAMP_LEVEL_CLAMPOFS_MSK) >> AG903_VIA_CLAMP_LEVEL_CLAMPOFS_POS; 771: } 772: 773: 774: 781: void AG903_ViaPrmGetVIADETSTATUS(uint32_t id, VIAPrmParamVIADETSTATUS *status) 782: { 783: uint16_t val; 784: 785: ASSERT(id < AG903_VIA_PRM_MAX_PORTS); 786: ASSERT(status != NULL); 787: 788: AG903_SSCPrmReadCmpstVideoDec(id, AG903_VIA_DET_STATUS, &val); 789: 790: status->fmt = (val & AG903_VIA_DET_STATUS_FMT_MSK) >> AG903_VIA_DET_STATUS_FMT_POS; 791: status->tbcno = (val & AG903_VIA_DET_STATUS_TBCNO_MSK) >> AG903_VIA_DET_STATUS_TBCNO_POS; 792: status->std = (val & AG903_VIA_DET_STATUS_STD_MSK) >> AG903_VIA_DET_STATUS_STD_POS; 793: status->ckill = (val & AG903_VIA_DET_STATUS_CKILL_MSK) >> AG903_VIA_DET_STATUS_CKILL_POS; 794: status->trick = (val & AG903_VIA_DET_STATUS_TRICK_MSK) >> AG903_VIA_DET_STATUS_TRICK_POS; 795: status->normal = (val & AG903_VIA_DET_STATUS_NORMAL_MSK) >> AG903_VIA_DET_STATUS_NORMAL_POS; 796: status->vtr = (val & AG903_VIA_DET_STATUS_VTR_MSK) >> AG903_VIA_DET_STATUS_VTR_POS; 797: status->prog = (val & AG903_VIA_DET_STATUS_PROG_MSK) >> AG903_VIA_DET_STATUS_PROG_POS; 798: status->nosync = (val & AG903_VIA_DET_STATUS_NOSYNC_MSK) >> AG903_VIA_DET_STATUS_NOSYNC_POS; 799: } 800: 801: 802: 809: void AG903_ViaPrmGetVIADETHCYCLE(uint32_t id, uint16_t *hcycle) 810: { 811: uint16_t val; 812: 813: ASSERT(id < AG903_VIA_PRM_MAX_PORTS); 814: ASSERT(hcycle != NULL); 815: 816: AG903_SSCPrmReadCmpstVideoDec(id, AG903_VIA_DET_HCYCLE, &val); 817: 818: *hcycle = (val & AG903_VIA_DET_HCYCLE_HCYCLE_MSK) >> AG903_VIA_DET_HCYCLE_HCYCLE_POS; 819: } 820: 821: 822: 829: void AG903_ViaPrmGetVIADETVCYCLE(uint32_t id, uint16_t *vcycle) 830: { 831: uint16_t val; 832: 833: ASSERT(id < AG903_VIA_PRM_MAX_PORTS); 834: ASSERT(vcycle != NULL); 835: 836: AG903_SSCPrmReadCmpstVideoDec(id, AG903_VIA_DET_VCYCLE, &val); 837: 838: *vcycle = (val & AG903_VIA_DET_VCYCLE_VCYCLE_MSK) >> AG903_VIA_DET_VCYCLE_VCYCLE_POS; 839: }
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