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AG903_DSPMgrSetLVDSParam 関数

LVDS出力パラメータ設定

Syntax
C++
int32_t AG903_DSPMgrSetLVDSParam(AG903_DSPMgrHandle * handle, AG903_DSPMgrCtrlParam * ctrl, AG903_DSPMgrLVDSParam * param);
引数 
説明 
AG903_DSPMgrHandle * handle 
[in] DSPハンドル 
AG903_DSPMgrCtrlParam * ctrl 
[in] 表示回路パラメータ 
AG903_DSPMgrLVDSParam * param 
[in] LVDS出力パラメータ 

エラーコード

返値の詳細 
説明 
正常終了 
-AG903_EINVAL 
パラメータ異常 
-AG903_EILLEGAL 
ドットクロック用PLL未設定 

LVDS出力パラメータの設定を変更します.

LVDSデュアルリンクの場合はCh1のハンドラを取得しそれに対して設定して下さい.

1: int32_t AG903_DSPMgrSetLVDSParam(AG903_DSPMgrHandle *handle, AG903_DSPMgrCtrlParam *ctrl, AG903_DSPMgrLVDSParam *param) 2: { 3: int32_t rc = AG903_ENONE; 4: uint8_t ch; 5: 6: if ((handle == NULL) || (ctrl == NULL) || (param == NULL)) 7: return -AG903_EINVAL; 8: 9: rc = DSPMgrCheckHandle(handle, &ch); 10: 11: if (rc == AG903_ENONE) { 12: rc = AG903_DSPMgrCheckStopped(handle); 13: } 14: 15: if (rc == AG903_ENONE) { 16: DSPPrmParamMOD mod; 17: DSPPrmParamSYNC sync; 18: DSPPrmParamVTPRM0 vtprm0; 19: 20: AG903_DSPPrmGetMOD(ch, &mod); 21: if (NULL != ctrl->syncparam) { 22: mod.de = ctrl->syncparam->rgbde_sel; 23: } 24: mod.ip = ctrl->ip_sel; 25: AG903_DSPPrmSetMOD(ch, &mod); 26: 27: if (NULL != ctrl->syncparam) { 28: AG903_DSPPrmGetSYNC(ch, &sync); 29: sync.vp = ctrl->syncparam->vsync_polarity; 30: sync.fp = ctrl->syncparam->field_hsync_polarity; 31: AG903_DSPPrmSetSYNC(ch, &sync); 32: 33: vtprm0.vpw = ctrl->syncparam->vt_pulsewidth; 34: vtprm0.ofp = ctrl->syncparam->odd_frontporch_plus1; 35: vtprm0.obp = ctrl->syncparam->odd_backporch_plus1; 36: vtprm0.efp = ctrl->syncparam->even_frontporch_plus1; 37: vtprm0.ebp = ctrl->syncparam->even_backporch_plus1; 38: AG903_DSPPrmSetVTPRM0(ch, &vtprm0); 39: 40: AG903_DSPPrmSetHRZPRM0(ch, ctrl->syncparam->hrz_pulsewidth); 41: AG903_DSPPrmSetHRZPRM1(ch, ctrl->syncparam->hrz_frontporch, 42: ctrl->syncparam->hrz_backporch); 43: AG903_DSPPrmSetVTPRM1(ch, ctrl->syncparam->vt_frontporch, 44: ctrl->syncparam->vt_backporch); 45: } 46: AG903_DSPPrmSetFRMSIZE(ch, ctrl->vt_framesize, ctrl->hrz_framesize); 47: } 48: 49: if (rc == AG903_ENONE) { 50: VODPrmParamMOD mod; 51: uint32_t portsel; 52: AG903_VODPrmGetMOD(ch, &mod); 53: mod.dp = param->rgbde_polarity; 54: mod.vp = param->vsync_polarity; 55: mod.hp = param->hsync_polarity; 56: mod.fp = param->field_polarity; 57: mod.cdp = param->colordetect_polarity; 58: mod.dex = param->rgbde_en ? AG903_DSP_SIGNAL_ENABLE : AG903_DSP_SIGNAL_DISABLE; 59: mod.vex = param->vsync_en ? AG903_DSP_SIGNAL_ENABLE : AG903_DSP_SIGNAL_DISABLE; 60: mod.hex = param->hsync_en ? AG903_DSP_SIGNAL_ENABLE : AG903_DSP_SIGNAL_DISABLE; 61: mod.fex = param->field_en ? AG903_DSP_SIGNAL_ENABLE : AG903_DSP_SIGNAL_DISABLE; 62: mod.cdex = param->colordetect_en ? AG903_DSP_SIGNAL_ENABLE : AG903_DSP_SIGNAL_DISABLE; 63: mod.pex = param->pixeldata_en ? AG903_DSP_SIGNAL_ENABLE : AG903_DSP_SIGNAL_DISABLE; 64: mod.fmt = param->format; 65: mod.ct0 = param->ctrl0; 66: mod.ct1 = param->ctrl1; 67: AG903_VODPrmSetMOD(ch, &mod); 68: AG903_VODPrmGetPORTSEL(1, &portsel); 69: if (portsel == 0 || ch == 0) { 70: AG903_VODPrmSetMACRO0(param->freq_range, 71: param->auto_powermanage, 72: param->macro_power); 73: } 74: if (ch == 1) { 75: AG903_VODPrmSetMACRO1(param->freq_range, 76: param->auto_powermanage, 77: param->macro_power); 78: } 79: } 80: 81: return rc; 82: }
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