AG903ライブラリリファレンス
内容インデックスホーム
前へ上へ次へ
AG903_viareg.h

VIA Register Definition

VIA Register Definition

none

AXELL CORPORATION

2017_10_20 Auto-generated.

1: 8: 9: 13: 14: #ifndef _AG903_VIA_REGMAP_H_ 15: #define _AG903_VIA_REGMAP_H_ 16: 17: 18: #include "AG903_regmap.h" 19: 20: #define AG903_VIA_SRC_SELECT (AG903_VIA_BASE + 0x100) 21: #define AG903_VIA_SRC_FORMAT (AG903_VIA_BASE + 0x118) 22: #define AG903_VIA_SRC_HCYCLE (AG903_VIA_BASE + 0x119) 23: #define AG903_VIA_SRC_HVALID (AG903_VIA_BASE + 0x11A) 24: #define AG903_VIA_SRC_HDELAY (AG903_VIA_BASE + 0x11B) 25: #define AG903_VIA_SRC_VCYCLE (AG903_VIA_BASE + 0x11C) 26: #define AG903_VIA_SRC_VVALID (AG903_VIA_BASE + 0x11D) 27: #define AG903_VIA_SRC_VDELAY (AG903_VIA_BASE + 0x11E) 28: #define AG903_VIA_SRC_FRMFREQ (AG903_VIA_BASE + 0x11F) 29: #define AG903_VIA_SIG_YCS (AG903_VIA_BASE + 0x146) 30: #define AG903_VIA_CHD_SETUP2 (AG903_VIA_BASE + 0x14D) 31: #define AG903_VIA_CHD_SETUP3 (AG903_VIA_BASE + 0x14E) 32: #define AG903_VIA_CHD_SETUP5 (AG903_VIA_BASE + 0x150) 33: #define AG903_VIA_OUT_LEVELY (AG903_VIA_BASE + 0x152) 34: #define AG903_VIA_OUT_LEVELCB (AG903_VIA_BASE + 0x153) 35: #define AG903_VIA_OUT_LEVELCR (AG903_VIA_BASE + 0x154) 36: #define AG903_VIA_CLAMP_LEVEL (AG903_VIA_BASE + 0x157) 37: #define AG903_VIA_DET_STATUS (AG903_VIA_BASE + 0xE94) 38: #define AG903_VIA_DET_HCYCLE (AG903_VIA_BASE + 0xE95) 39: #define AG903_VIA_DET_VCYCLE (AG903_VIA_BASE + 0xE96) 40: 41: 42: #define AG903_VIA_SRC_SELECT_NONS_POS 0 43: #define AG903_VIA_SRC_SELECT_NONS_MSK (0x1U << AG903_VIA_SRC_SELECT_NONS_POS) 44: #define AG903_VIA_SRC_SELECT_NSNS_POS 1 45: #define AG903_VIA_SRC_SELECT_NSNS_MSK (0x1U << AG903_VIA_SRC_SELECT_NSNS_POS) 46: #define AG903_VIA_SRC_SELECT_NSCK_POS 2 47: #define AG903_VIA_SRC_SELECT_NSCK_MSK (0x1U << AG903_VIA_SRC_SELECT_NSCK_POS) 48: #define AG903_VIA_SRC_SELECT_GCAT_POS 4 49: #define AG903_VIA_SRC_SELECT_GCAT_MSK (0x1U << AG903_VIA_SRC_SELECT_GCAT_POS) 50: 51: #define AG903_VIA_SRC_FORMAT_FMT_POS 0 52: #define AG903_VIA_SRC_FORMAT_FMT_MSK (0xfU << AG903_VIA_SRC_FORMAT_FMT_POS) 53: 54: #define AG903_VIA_SRC_HCYCLE_HCYCLE_POS 0 55: #define AG903_VIA_SRC_HCYCLE_HCYCLE_MSK (0xfffU << AG903_VIA_SRC_HCYCLE_HCYCLE_POS) 56: 57: #define AG903_VIA_SRC_HVALID_HVALID_POS 0 58: #define AG903_VIA_SRC_HVALID_HVALID_MSK (0xfffU << AG903_VIA_SRC_HVALID_HVALID_POS) 59: 60: #define AG903_VIA_SRC_HDELAY_HDELAY_POS 0 61: #define AG903_VIA_SRC_HDELAY_HDELAY_MSK (0x7ffU << AG903_VIA_SRC_HDELAY_HDELAY_POS) 62: 63: #define AG903_VIA_SRC_VCYCLE_VCYCLE_POS 0 64: #define AG903_VIA_SRC_VCYCLE_VCYCLE_MSK (0x3ffU << AG903_VIA_SRC_VCYCLE_VCYCLE_POS) 65: 66: #define AG903_VIA_SRC_VVALID_VVALID_POS 0 67: #define AG903_VIA_SRC_VVALID_VVALID_MSK (0x3ffU << AG903_VIA_SRC_VVALID_VVALID_POS) 68: 69: #define AG903_VIA_SRC_VDELAY_VDELAY_POS 0 70: #define AG903_VIA_SRC_VDELAY_VDELAY_MSK (0x3ffU << AG903_VIA_SRC_VDELAY_VDELAY_POS) 71: 72: #define AG903_VIA_SRC_FRMFREQ_FRM_POS 0 73: #define AG903_VIA_SRC_FRMFREQ_FRM_MSK (0x1U << AG903_VIA_SRC_FRMFREQ_FRM_POS) 74: 75: #define AG903_VIA_SIG_YCS_MONO_POS 0 76: #define AG903_VIA_SIG_YCS_MONO_MSK (0x1U << AG903_VIA_SIG_YCS_MONO_POS) 77: #define AG903_VIA_SIG_YCS_TRAP_POS 6 78: #define AG903_VIA_SIG_YCS_TRAP_MSK (0x1U << AG903_VIA_SIG_YCS_TRAP_POS) 79: 80: #define AG903_VIA_CHD_SETUP2_HUE_POS 0 81: #define AG903_VIA_CHD_SETUP2_HUE_MSK (0xffU << AG903_VIA_CHD_SETUP2_HUE_POS) 82: #define AG903_VIA_CHD_SETUP2_BPF_POS 8 83: #define AG903_VIA_CHD_SETUP2_BPF_MSK (0x1U << AG903_VIA_CHD_SETUP2_BPF_POS) 84: 85: #define AG903_VIA_CHD_SETUP3_ACCMARK_POS 0 86: #define AG903_VIA_CHD_SETUP3_ACCMARK_MSK (0x3fU << AG903_VIA_CHD_SETUP3_ACCMARK_POS) 87: #define AG903_VIA_CHD_SETUP3_ACCTC_POS 6 88: #define AG903_VIA_CHD_SETUP3_ACCTC_MSK (0x3U << AG903_VIA_CHD_SETUP3_ACCTC_POS) 89: #define AG903_VIA_CHD_SETUP3_ACCOV_POS 8 90: #define AG903_VIA_CHD_SETUP3_ACCOV_MSK (0x3fU << AG903_VIA_CHD_SETUP3_ACCOV_POS) 91: #define AG903_VIA_CHD_SETUP3_AGCEN_POS 14 92: #define AG903_VIA_CHD_SETUP3_AGCEN_MSK (0x1U << AG903_VIA_CHD_SETUP3_AGCEN_POS) 93: 94: #define AG903_VIA_CHD_SETUP5_AGCOFSTEN_POS 0 95: #define AG903_VIA_CHD_SETUP5_AGCOFSTEN_MSK (0x1U << AG903_VIA_CHD_SETUP5_AGCOFSTEN_POS) 96: #define AG903_VIA_CHD_SETUP5_AGCGAINEN_POS 1 97: #define AG903_VIA_CHD_SETUP5_AGCGAINEN_MSK (0x1U << AG903_VIA_CHD_SETUP5_AGCGAINEN_POS) 98: #define AG903_VIA_CHD_SETUP5_AGCPAL_POS 2 99: #define AG903_VIA_CHD_SETUP5_AGCPAL_MSK (0x1U << AG903_VIA_CHD_SETUP5_AGCPAL_POS) 100: #define AG903_VIA_CHD_SETUP5_AGCPOS_POS 3 101: #define AG903_VIA_CHD_SETUP5_AGCPOS_MSK (0x1U << AG903_VIA_CHD_SETUP5_AGCPOS_POS) 102: #define AG903_VIA_CHD_SETUP5_AGCOFSTSPD_POS 4 103: #define AG903_VIA_CHD_SETUP5_AGCOFSTSPD_MSK (0x3U << AG903_VIA_CHD_SETUP5_AGCOFSTSPD_POS) 104: #define AG903_VIA_CHD_SETUP5_AGCGAINSPD_POS 6 105: #define AG903_VIA_CHD_SETUP5_AGCGAINSPD_MSK (0x3U << AG903_VIA_CHD_SETUP5_AGCGAINSPD_POS) 106: #define AG903_VIA_CHD_SETUP5_CBPLLULSV_POS 8 107: #define AG903_VIA_CHD_SETUP5_CBPLLULSV_MSK (0x3U << AG903_VIA_CHD_SETUP5_CBPLLULSV_POS) 108: #define AG903_VIA_CHD_SETUP5_CBPLLULTH_POS 10 109: #define AG903_VIA_CHD_SETUP5_CBPLLULTH_MSK (0x3fU << AG903_VIA_CHD_SETUP5_CBPLLULTH_POS) 110: 111: #define AG903_VIA_OUT_LEVELY_YGAIN_POS 0 112: #define AG903_VIA_OUT_LEVELY_YGAIN_MSK (0xffU << AG903_VIA_OUT_LEVELY_YGAIN_POS) 113: #define AG903_VIA_OUT_LEVELY_YOFST_POS 8 114: #define AG903_VIA_OUT_LEVELY_YOFST_MSK (0xffU << AG903_VIA_OUT_LEVELY_YOFST_POS) 115: 116: #define AG903_VIA_OUT_LEVELCB_CBGAIN_POS 0 117: #define AG903_VIA_OUT_LEVELCB_CBGAIN_MSK (0xffU << AG903_VIA_OUT_LEVELCB_CBGAIN_POS) 118: #define AG903_VIA_OUT_LEVELCB_CBOFST_POS 8 119: #define AG903_VIA_OUT_LEVELCB_CBOFST_MSK (0xffU << AG903_VIA_OUT_LEVELCB_CBOFST_POS) 120: 121: #define AG903_VIA_OUT_LEVELCR_CRGAIN_POS 0 122: #define AG903_VIA_OUT_LEVELCR_CRGAIN_MSK (0xffU << AG903_VIA_OUT_LEVELCR_CRGAIN_POS) 123: #define AG903_VIA_OUT_LEVELCR_CROFST_POS 8 124: #define AG903_VIA_OUT_LEVELCR_CROFST_MSK (0xffU << AG903_VIA_OUT_LEVELCR_CROFST_POS) 125: 126: #define AG903_VIA_CLAMP_LEVEL_CLAMPOFS_POS 0 127: #define AG903_VIA_CLAMP_LEVEL_CLAMPOFS_MSK (0x3ffU << AG903_VIA_CLAMP_LEVEL_CLAMPOFS_POS) 128: 129: #define AG903_VIA_DET_STATUS_NOSYNC_POS 0 130: #define AG903_VIA_DET_STATUS_NOSYNC_MSK (0x1U << AG903_VIA_DET_STATUS_NOSYNC_POS) 131: #define AG903_VIA_DET_STATUS_PROG_POS 1 132: #define AG903_VIA_DET_STATUS_PROG_MSK (0x1U << AG903_VIA_DET_STATUS_PROG_POS) 133: #define AG903_VIA_DET_STATUS_VTR_POS 2 134: #define AG903_VIA_DET_STATUS_VTR_MSK (0x1U << AG903_VIA_DET_STATUS_VTR_POS) 135: #define AG903_VIA_DET_STATUS_NORMAL_POS 3 136: #define AG903_VIA_DET_STATUS_NORMAL_MSK (0x1U << AG903_VIA_DET_STATUS_NORMAL_POS) 137: #define AG903_VIA_DET_STATUS_TRICK_POS 4 138: #define AG903_VIA_DET_STATUS_TRICK_MSK (0x1U << AG903_VIA_DET_STATUS_TRICK_POS) 139: #define AG903_VIA_DET_STATUS_CKILL_POS 5 140: #define AG903_VIA_DET_STATUS_CKILL_MSK (0x1U << AG903_VIA_DET_STATUS_CKILL_POS) 141: #define AG903_VIA_DET_STATUS_STD_POS 6 142: #define AG903_VIA_DET_STATUS_STD_MSK (0x1U << AG903_VIA_DET_STATUS_STD_POS) 143: #define AG903_VIA_DET_STATUS_TBCNO_POS 7 144: #define AG903_VIA_DET_STATUS_TBCNO_MSK (0x1U << AG903_VIA_DET_STATUS_TBCNO_POS) 145: #define AG903_VIA_DET_STATUS_FMT_POS 8 146: #define AG903_VIA_DET_STATUS_FMT_MSK (0xfU << AG903_VIA_DET_STATUS_FMT_POS) 147: 148: #define AG903_VIA_DET_HCYCLE_HCYCLE_POS 0 149: #define AG903_VIA_DET_HCYCLE_HCYCLE_MSK (0x7ffU << AG903_VIA_DET_HCYCLE_HCYCLE_POS) 150: 151: #define AG903_VIA_DET_VCYCLE_VCYCLE_POS 0 152: #define AG903_VIA_DET_VCYCLE_VCYCLE_MSK (0x3ffU << AG903_VIA_DET_VCYCLE_VCYCLE_POS) 153: 154: 155: #endif 156:
名前 
説明 
VIACHD_SETUP2 address 
VIACHD_SETUP2 BPF-bit mask 
VIACHD_SETUP2 BPF-bit position 
VIACHD_SETUP2 HUE-bit mask 
VIACHD_SETUP2 HUE-bit position 
VIACHD_SETUP3 address 
VIACHD_SETUP3 ACCMARK-bit mask 
VIACHD_SETUP3 ACCMARK-bit position 
VIACHD_SETUP3 ACCOV-bit mask 
VIACHD_SETUP3 ACCOV-bit position 
VIACHD_SETUP3 ACCTC-bit mask 
VIACHD_SETUP3 ACCTC-bit position 
VIACHD_SETUP3 AGCEN-bit mask 
VIACHD_SETUP3 AGCEN-bit position 
VIACHD_SETUP5 address 
VIACHD_SETUP5 AGCGAINEN-bit mask 
VIACHD_SETUP5 AGCGAINEN-bit position 
VIACHD_SETUP5 AGCGAINSPD-bit mask 
VIACHD_SETUP5 AGCGAINSPD-bit position 
VIACHD_SETUP5 AGCOFSTEN-bit mask 
VIACHD_SETUP5 AGCOFSTEN-bit position 
VIACHD_SETUP5 AGCOFSTSPD-bit mask 
VIACHD_SETUP5 AGCOFSTSPD-bit position 
VIACHD_SETUP5 AGCPAL-bit mask 
VIACHD_SETUP5 AGCPAL-bit position 
VIACHD_SETUP5 AGCPOS-bit mask 
VIACHD_SETUP5 AGCPOS-bit position 
VIACHD_SETUP5 CBPLLULSV-bit mask 
VIACHD_SETUP5 CBPLLULSV-bit position 
VIACHD_SETUP5 CBPLLULTH-bit mask 
VIACHD_SETUP5 CBPLLULTH-bit position 
VIACLAMP_LEVEL address 
VIACLAMP_LEVEL CLAMPOFS-bit mask 
VIACLAMP_LEVEL CLAMPOFS-bit position 
VIADET_HCYCLE address 
VIADET_HCYCLE HCYCLE-bit mask 
VIADET_HCYCLE HCYCLE-bit position 
VIADET_STATUS address 
VIADET_STATUS CKILL-bit mask 
VIADET_STATUS CKILL-bit position 
VIADET_STATUS FMT-bit mask 
VIADET_STATUS FMT-bit position 
VIADET_STATUS NORMAL-bit mask 
VIADET_STATUS NORMAL-bit position 
VIADET_STATUS NOSYNC-bit mask 
VIADET_STATUS NOSYNC-bit position 
VIADET_STATUS PROG-bit mask 
VIADET_STATUS PROG-bit position 
VIADET_STATUS STD-bit mask 
VIADET_STATUS STD-bit position 
VIADET_STATUS TBCNO-bit mask 
VIADET_STATUS TBCNO-bit position 
VIADET_STATUS TRICK-bit mask 
VIADET_STATUS TRICK-bit position 
VIADET_STATUS VTR-bit mask 
VIADET_STATUS VTR-bit position 
VIADET_VCYCLE address 
VIADET_VCYCLE VCYCLE-bit mask 
VIADET_VCYCLE VCYCLE-bit position 
VIAOUT_LEVELCB address 
VIAOUT_LEVELCB CBGAIN-bit mask 
VIAOUT_LEVELCB CBGAIN-bit position 
VIAOUT_LEVELCB CBOFST-bit mask 
VIAOUT_LEVELCB CBOFST-bit position 
VIAOUT_LEVELCR address 
VIAOUT_LEVELCR CRGAIN-bit mask 
VIAOUT_LEVELCR CRGAIN-bit position 
VIAOUT_LEVELCR CROFST-bit mask 
VIAOUT_LEVELCR CROFST-bit position 
VIAOUT_LEVELY address 
VIAOUT_LEVELY YGAIN-bit mask 
VIAOUT_LEVELY YGAIN-bit position 
VIAOUT_LEVELY YOFST-bit mask 
VIAOUT_LEVELY YOFST-bit position 
VIASIG_YCS address 
VIASIG_YCS MONO-bit mask 
VIASIG_YCS MONO-bit position 
VIASIG_YCS TRAP-bit mask 
VIASIG_YCS TRAP-bit position 
VIASRC_FORMAT address 
VIASRC_FORMAT FMT-bit mask 
VIASRC_FORMAT FMT-bit position 
VIASRC_FRMFREQ address 
VIASRC_FRMFREQ FRM-bit mask 
VIASRC_FRMFREQ FRM-bit position 
VIASRC_HCYCLE address 
VIASRC_HCYCLE HCYCLE-bit mask 
VIASRC_HCYCLE HCYCLE-bit position 
VIASRC_HDELAY address 
VIASRC_HDELAY HDELAY-bit mask 
VIASRC_HDELAY HDELAY-bit position 
VIASRC_HVALID address 
VIASRC_HVALID HVALID-bit mask 
VIASRC_HVALID HVALID-bit position 
VIASRC_SELECT address 
VIASRC_SELECT GCAT-bit mask 
VIASRC_SELECT GCAT-bit position 
VIASRC_SELECT NONS-bit mask 
VIASRC_SELECT NONS-bit position 
VIASRC_SELECT NSCK-bit mask 
VIASRC_SELECT NSCK-bit position 
VIASRC_SELECT NSNS-bit mask 
VIASRC_SELECT NSNS-bit position 
VIASRC_VCYCLE address 
VIASRC_VCYCLE VCYCLE-bit mask 
VIASRC_VCYCLE VCYCLE-bit position 
VIASRC_VDELAY address 
VIASRC_VDELAY VDELAY-bit mask 
VIASRC_VDELAY VDELAY-bit position 
VIASRC_VVALID address 
VIASRC_VVALID VVALID-bit mask 
VIASRC_VVALID VVALID-bit position 
Copyright (c) 2017-2025 Axell Corporation. All rights reserved.