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vidprm.c

VID Primitive

VID Primitive Layer.

none

AXELL CORPORATION

2017_02_22 初版 

2017_10_26 Ver2.0

1: 9: 10: 14: 15: 16: #include <stdio.h> 17: #include "vid/vidprm.h" 18: #include "register/AG903_vidreg.h" 19: #include "AG903_common.h" 20: 21: 22: 28: void AG903_VidPrmSetVIDCTRL(uint32_t on) 29: { 30: uint32_t val; 31: 32: ASSERT(!(on & ~(0x1))); 33: 34: val = (on << AG903_VID_CTRL_ON_POS); 35: 36: AG903_VID->CTRL = val; 37: } 38: 39: 40: 46: void AG903_VidPrmGetVIDCTRL(uint32_t *on) 47: { 48: uint32_t val; 49: 50: ASSERT(on != NULL); 51: 52: val = AG903_VID->CTRL; 53: 54: *on = (val & AG903_VID_CTRL_ON_MSK) >> AG903_VID_CTRL_ON_POS; 55: } 56: 57: 58: 64: void AG903_VidPrmSetVIDFMT(uint32_t fmt) 65: { 66: uint32_t val; 67: 68: ASSERT(!(fmt & ~(0x7))); 69: 70: val = (fmt << AG903_VID_FMT_FMT_POS); 71: 72: AG903_VID->FMT = val; 73: } 74: 75: 76: 82: void AG903_VidPrmGetVIDFMT(uint32_t *fmt) 83: { 84: uint32_t val; 85: 86: ASSERT(fmt != NULL); 87: 88: val = AG903_VID->FMT; 89: 90: *fmt = (val & AG903_VID_FMT_FMT_MSK) >> AG903_VID_FMT_FMT_POS; 91: } 92: 93: 94: 101: void AG903_VidPrmSetVIDIOnCTRL(uint32_t id, uint32_t soe) 102: { 103: uint32_t val; 104: 105: ASSERT(id < AG903_VID_PRM_MAX_IO_PORTS); 106: ASSERT(!(soe & ~(0x1))); 107: 108: val = (soe << AG903_VIDIOn_CTRL_SOE_POS); 109: 110: AG903_VIDIOn(id)->CTRL = val; 111: } 112: 113: 114: 121: void AG903_VidPrmGetVIDIOnCTRL(uint32_t id, uint32_t *soe) 122: { 123: uint32_t val; 124: 125: ASSERT(id < AG903_VID_PRM_MAX_IO_PORTS); 126: ASSERT(soe != NULL); 127: 128: val = AG903_VIDIOn(id)->CTRL; 129: 130: *soe = (val & AG903_VIDIOn_CTRL_SOE_MSK) >> AG903_VIDIOn_CTRL_SOE_POS; 131: } 132: 133: 134: 141: void AG903_VidPrmSetVIDIOnMOD(uint32_t id, VIDPrmParamVIDIOnMOD *mod) 142: { 143: uint32_t val; 144: 145: ASSERT(id < AG903_VID_PRM_MAX_IO_PORTS); 146: ASSERT(mod != NULL); 147: ASSERT(!(mod->vpol & ~(0x1))); 148: ASSERT(!(mod->hpol & ~(0x1))); 149: ASSERT(!(mod->dpol & ~(0x1))); 150: ASSERT(!(mod->fpol & ~(0x1))); 151: ASSERT(!(mod->cpol & ~(0x1))); 152: 153: val = (mod->vpol << AG903_VIDIOn_MOD_VPOL_POS) 154: | (mod->hpol << AG903_VIDIOn_MOD_HPOL_POS) 155: | (mod->dpol << AG903_VIDIOn_MOD_DPOL_POS) 156: | (mod->fpol << AG903_VIDIOn_MOD_FPOL_POS) 157: | (mod->cpol << AG903_VIDIOn_MOD_CPOL_POS); 158: 159: AG903_VIDIOn(id)->MOD = val; 160: } 161: 162: 163: 170: void AG903_VidPrmGetVIDIOnMOD(uint32_t id, VIDPrmParamVIDIOnMOD *mod) 171: { 172: uint32_t val; 173: 174: ASSERT(id < AG903_VID_PRM_MAX_IO_PORTS); 175: ASSERT(mod != NULL); 176: 177: val = AG903_VIDIOn(id)->MOD; 178: 179: mod->vpol = (val & AG903_VIDIOn_MOD_VPOL_MSK) >> AG903_VIDIOn_MOD_VPOL_POS; 180: mod->hpol = (val & AG903_VIDIOn_MOD_HPOL_MSK) >> AG903_VIDIOn_MOD_HPOL_POS; 181: mod->dpol = (val & AG903_VIDIOn_MOD_DPOL_MSK) >> AG903_VIDIOn_MOD_DPOL_POS; 182: mod->fpol = (val & AG903_VIDIOn_MOD_FPOL_MSK) >> AG903_VIDIOn_MOD_FPOL_POS; 183: mod->cpol = (val & AG903_VIDIOn_MOD_CPOL_MSK) >> AG903_VIDIOn_MOD_CPOL_POS; 184: } 185: 186: 187: 194: void AG903_VidPrmSetVIDIOnOHPRM0(uint32_t id, uint32_t hpw) 195: { 196: uint32_t val; 197: 198: ASSERT(id < AG903_VID_PRM_MAX_IO_PORTS); 199: ASSERT(!(hpw & ~(0xFFF))); 200: 201: val = (hpw << AG903_VIDIOn_OHPRM0_HPW_POS); 202: 203: AG903_VIDIOn(id)->OHPRM0 = val; 204: } 205: 206: 207: 214: void AG903_VidPrmGetVIDIOnOHPRM0(uint32_t id, uint32_t *hpw) 215: { 216: uint32_t val; 217: 218: ASSERT(id < AG903_VID_PRM_MAX_IO_PORTS); 219: ASSERT(hpw != NULL); 220: 221: val = AG903_VIDIOn(id)->OHPRM0; 222: 223: *hpw = (val & AG903_VIDIOn_OHPRM0_HPW_MSK) >> AG903_VIDIOn_OHPRM0_HPW_POS; 224: } 225: 226: 227: 235: void AG903_VidPrmSetVIDIOnOHPRM1(uint32_t id, uint32_t hfp, uint32_t hbp) 236: { 237: uint32_t val; 238: 239: ASSERT(id < AG903_VID_PRM_MAX_IO_PORTS); 240: ASSERT(!(hfp & ~(0xFFF))); 241: ASSERT(!(hbp & ~(0xFFF))); 242: 243: val = (hfp << AG903_VIDIOn_OHPRM1_HFP_POS) 244: | (hbp << AG903_VIDIOn_OHPRM1_HBP_POS); 245: 246: AG903_VIDIOn(id)->OHPRM1 = val; 247: } 248: 249: 250: 258: void AG903_VidPrmGetVIDIOnOHPRM1(uint32_t id, uint32_t *hfp, uint32_t *hbp) 259: { 260: uint32_t val; 261: 262: ASSERT(id < AG903_VID_PRM_MAX_IO_PORTS); 263: ASSERT(hfp != NULL); 264: ASSERT(hbp != NULL); 265: 266: val = AG903_VIDIOn(id)->OHPRM1; 267: 268: *hfp = (val & AG903_VIDIOn_OHPRM1_HFP_MSK) >> AG903_VIDIOn_OHPRM1_HFP_POS; 269: *hbp = (val & AG903_VIDIOn_OHPRM1_HBP_MSK) >> AG903_VIDIOn_OHPRM1_HBP_POS; 270: } 271: 272: 273: 280: void AG903_VidPrmSetVIDIOnOVPRM0(uint32_t id, uint32_t vpw) 281: { 282: uint32_t val; 283: 284: ASSERT(id < AG903_VID_PRM_MAX_IO_PORTS); 285: ASSERT(!(vpw & ~(0xFFF))); 286: 287: val = (vpw << AG903_VIDIOn_OVPRM0_VPW_POS); 288: 289: AG903_VIDIOn(id)->OVPRM0 = val; 290: } 291: 292: 293: 300: void AG903_VidPrmGetVIDIOnOVPRM0(uint32_t id, uint32_t *vpw) 301: { 302: uint32_t val; 303: 304: ASSERT(id < AG903_VID_PRM_MAX_IO_PORTS); 305: ASSERT(vpw != NULL); 306: 307: val = AG903_VIDIOn(id)->OVPRM0; 308: 309: *vpw = (val & AG903_VIDIOn_OVPRM0_VPW_MSK) >> AG903_VIDIOn_OVPRM0_VPW_POS; 310: } 311: 312: 313: 321: void AG903_VidPrmSetVIDIOnOVPRM1(uint32_t id, uint32_t vfp, uint32_t vbp) 322: { 323: uint32_t val; 324: 325: ASSERT(id < AG903_VID_PRM_MAX_IO_PORTS); 326: ASSERT(!(vfp & ~(0xFFF))); 327: ASSERT(!(vbp & ~(0xFFF))); 328: 329: val = (vfp << AG903_VIDIOn_OVPRM1_VFP_POS) 330: | (vbp << AG903_VIDIOn_OVPRM1_VBP_POS); 331: 332: AG903_VIDIOn(id)->OVPRM1 = val; 333: } 334: 335: 336: 344: void AG903_VidPrmGetVIDIOnOVPRM1(uint32_t id, uint32_t *vfp, uint32_t *vbp) 345: { 346: uint32_t val; 347: 348: ASSERT(id < AG903_VID_PRM_MAX_IO_PORTS); 349: ASSERT(vfp != NULL); 350: ASSERT(vbp != NULL); 351: 352: val = AG903_VIDIOn(id)->OVPRM1; 353: 354: *vfp = (val & AG903_VIDIOn_OVPRM1_VFP_MSK) >> AG903_VIDIOn_OVPRM1_VFP_POS; 355: *vbp = (val & AG903_VIDIOn_OVPRM1_VBP_MSK) >> AG903_VIDIOn_OVPRM1_VBP_POS; 356: } 357: 358: 359: 367: void AG903_VidPrmSetVIDIOnOSIZE(uint32_t id, uint32_t vfs, uint32_t hfs) 368: { 369: uint32_t val; 370: 371: ASSERT(id < AG903_VID_PRM_MAX_IO_PORTS); 372: ASSERT(!(vfs & ~(0xFFF))); 373: ASSERT(!(hfs & ~(0xFFF))); 374: 375: val = (vfs << AG903_VIDIOn_OSIZE_VFS_POS) 376: | (hfs << AG903_VIDIOn_OSIZE_HFS_POS); 377: 378: AG903_VIDIOn(id)->OSIZE = val; 379: } 380: 381: 382: 390: void AG903_VidPrmGetVIDIOnOSIZE(uint32_t id, uint32_t *vfs, uint32_t *hfs) 391: { 392: uint32_t val; 393: 394: ASSERT(id < AG903_VID_PRM_MAX_IO_PORTS); 395: ASSERT(vfs != NULL); 396: ASSERT(hfs != NULL); 397: 398: val = AG903_VIDIOn(id)->OSIZE; 399: 400: *vfs = (val & AG903_VIDIOn_OSIZE_VFS_MSK) >> AG903_VIDIOn_OSIZE_VFS_POS; 401: *hfs = (val & AG903_VIDIOn_OSIZE_HFS_MSK) >> AG903_VIDIOn_OSIZE_HFS_POS; 402: } 403: 404: 405: 412: void AG903_VidPrmGetVIDIOnSTAT(uint32_t id, uint32_t *cwt) 413: { 414: uint32_t val; 415: 416: ASSERT(id < AG903_VID_PRM_MAX_IO_PORTS); 417: ASSERT(cwt != NULL); 418: 419: val = AG903_VIDIOn(id)->STAT; 420: 421: *cwt = (val & AG903_VIDIOn_STAT_CWT_MSK) >> AG903_VIDIOn_STAT_CWT_POS; 422: } 423: 424: 425: 432: void AG903_VidPrmSetVIDCOnMOD(uint32_t id, VIDPrmParamVIDCOnMOD *mod) 433: { 434: uint32_t val; 435: 436: ASSERT(id < AG903_VID_PRM_MAX_CAPTURE_PORTS); 437: ASSERT(mod != NULL); 438: ASSERT(!(mod->tdmblk & ~(0x1))); 439: ASSERT(!(mod->tdmtrs & ~(0x1))); 440: ASSERT(!(mod->delay & ~(0x1))); 441: ASSERT(!(mod->trsdec & ~(0x1))); 442: 443: val = (mod->tdmblk << AG903_VIDCOn_MOD_TDMBLK_POS) 444: | (mod->tdmtrs << AG903_VIDCOn_MOD_TDMTRS_POS) 445: | (mod->delay << AG903_VIDCOn_MOD_DELAY_POS) 446: | (mod->trsdec << AG903_VIDCOn_MOD_TRSDEC_POS); 447: 448: AG903_VIDCOn(id)->MOD = val; 449: } 450: 451: 452: 459: void AG903_VidPrmGetVIDCOnMOD(uint32_t id, VIDPrmParamVIDCOnMOD *mod) 460: { 461: uint32_t val; 462: 463: ASSERT(id < AG903_VID_PRM_MAX_CAPTURE_PORTS); 464: ASSERT(mod != NULL); 465: 466: val = AG903_VIDCOn(id)->MOD; 467: 468: mod->tdmblk = (val & AG903_VIDCOn_MOD_TDMBLK_MSK) >> AG903_VIDCOn_MOD_TDMBLK_POS; 469: mod->tdmtrs = (val & AG903_VIDCOn_MOD_TDMTRS_MSK) >> AG903_VIDCOn_MOD_TDMTRS_POS; 470: mod->delay = (val & AG903_VIDCOn_MOD_DELAY_MSK) >> AG903_VIDCOn_MOD_DELAY_POS; 471: mod->trsdec = (val & AG903_VIDCOn_MOD_TRSDEC_MSK) >> AG903_VIDCOn_MOD_TRSDEC_POS; 472: } 473: 474: 475: 482: void AG903_VidPrmSetVIDCOnTRSPRM(uint32_t id, VIDPrmParamVIDCOnTRSPRM *trsprm) 483: { 484: uint32_t val; 485: 486: ASSERT(id < AG903_VID_PRM_MAX_CAPTURE_PORTS); 487: ASSERT(trsprm != NULL); 488: ASSERT(!(trsprm->efp & ~(0x1))); 489: ASSERT(!(trsprm->ofp & ~(0x1))); 490: ASSERT(!(trsprm->vfp & ~(0xFFF))); 491: ASSERT(!(trsprm->href & ~(0x1))); 492: ASSERT(!(trsprm->hfp & ~(0xFFF))); 493: 494: val = (trsprm->efp << AG903_VIDCOn_TRSPRM_EFP_POS) 495: | (trsprm->ofp << AG903_VIDCOn_TRSPRM_OFP_POS) 496: | (trsprm->vfp << AG903_VIDCOn_TRSPRM_VFP_POS) 497: | (trsprm->href << AG903_VIDCOn_TRSPRM_HREF_POS) 498: | (trsprm->hfp << AG903_VIDCOn_TRSPRM_HFP_POS); 499: 500: AG903_VIDCOn(id)->TRSPRM = val; 501: } 502: 503: 504: 516: void AG903_VidPrmGetVIDCOnTRSPRM(uint32_t id, VIDPrmParamVIDCOnTRSPRM *trsprm) 517: { 518: uint32_t val; 519: 520: ASSERT(id < AG903_VID_PRM_MAX_CAPTURE_PORTS); 521: ASSERT(trsprm != NULL); 522: 523: val = AG903_VIDCOn(id)->TRSPRM; 524: 525: trsprm->efp = (val & AG903_VIDCOn_TRSPRM_EFP_MSK) >> AG903_VIDCOn_TRSPRM_EFP_POS; 526: trsprm->ofp = (val & AG903_VIDCOn_TRSPRM_OFP_MSK) >> AG903_VIDCOn_TRSPRM_OFP_POS; 527: trsprm->vfp = (val & AG903_VIDCOn_TRSPRM_VFP_MSK) >> AG903_VIDCOn_TRSPRM_VFP_POS; 528: trsprm->href = (val & AG903_VIDCOn_TRSPRM_HREF_MSK) >> AG903_VIDCOn_TRSPRM_HREF_POS; 529: trsprm->hfp = (val & AG903_VIDCOn_TRSPRM_HFP_MSK) >> AG903_VIDCOn_TRSPRM_HFP_POS; 530: } 531: 532: 533: 541: void AG903_VidPrmSetVIDCOnSDPRM(uint32_t id, uint32_t vmax, uint32_t hmax) 542: { 543: uint32_t val; 544: 545: ASSERT(id < AG903_VID_PRM_MAX_CAPTURE_PORTS); 546: ASSERT(!(vmax & ~(0x1FFF))); 547: ASSERT(!(hmax & ~(0x1FFF))); 548: 549: val = (vmax << AG903_VIDCOn_SDPRM_VMAX_POS) 550: | (hmax << AG903_VIDCOn_SDPRM_HMAX_POS); 551: 552: AG903_VIDCOn(id)->SDPRM = val; 553: } 554: 555: 556: 564: void AG903_VidPrmGetVIDCOnSDPRM(uint32_t id, uint32_t *vmax, uint32_t *hmax) 565: { 566: uint32_t val; 567: 568: ASSERT(id < AG903_VID_PRM_MAX_CAPTURE_PORTS); 569: ASSERT(vmax != NULL); 570: ASSERT(hmax != NULL); 571: 572: val = AG903_VIDCOn(id)->SDPRM; 573: 574: *vmax = (val & AG903_VIDCOn_SDPRM_VMAX_MSK) >> AG903_VIDCOn_SDPRM_VMAX_POS; 575: *hmax = (val & AG903_VIDCOn_SDPRM_HMAX_MSK) >> AG903_VIDCOn_SDPRM_HMAX_POS; 576: } 577: 578: 579: 586: void AG903_VidPrmGetVIDCOnSTAT(uint32_t id, VIDPrmParamVIDCOnSTAT *stat) 587: { 588: uint32_t val; 589: 590: ASSERT(id < AG903_VID_PRM_MAX_CAPTURE_PORTS); 591: ASSERT(stat != NULL); 592: 593: val = AG903_VIDCOn(id)->STAT; 594: 595: stat->blkval = (val & AG903_VIDCOn_STAT_BLKVAL_MSK) >> AG903_VIDCOn_STAT_BLKVAL_POS; 596: stat->trsval = (val & AG903_VIDCOn_STAT_TRSVAL_MSK) >> AG903_VIDCOn_STAT_TRSVAL_POS; 597: stat->vblank = (val & AG903_VIDCOn_STAT_VBLANK_MSK) >> AG903_VIDCOn_STAT_VBLANK_POS; 598: stat->hblank = (val & AG903_VIDCOn_STAT_HBLANK_MSK) >> AG903_VIDCOn_STAT_HBLANK_POS; 599: stat->tdmch = (val & AG903_VIDCOn_STAT_TDMCH_MSK) >> AG903_VIDCOn_STAT_TDMCH_POS; 600: } 601: 602: 603: 610: void AG903_VidPrmGetVIDCOnHST0(uint32_t id, uint32_t *hpw) 611: { 612: uint32_t val; 613: 614: ASSERT(id < AG903_VID_PRM_MAX_CAPTURE_PORTS); 615: ASSERT(hpw != NULL); 616: 617: val = AG903_VIDCOn(id)->HST0; 618: 619: *hpw = (val & AG903_VIDCOn_HST0_HPW_MSK) >> AG903_VIDCOn_HST0_HPW_POS; 620: } 621: 622: 623: 631: void AG903_VidPrmGetVIDCOnHST1(uint32_t id, uint32_t *hfp, uint32_t *hbp) 632: { 633: uint32_t val; 634: 635: ASSERT(id < AG903_VID_PRM_MAX_CAPTURE_PORTS); 636: ASSERT(hfp != NULL); 637: ASSERT(hbp != NULL); 638: 639: val = AG903_VIDCOn(id)->HST1; 640: 641: *hfp = (val & AG903_VIDCOn_HST1_HFP_MSK) >> AG903_VIDCOn_HST1_HFP_POS; 642: *hbp = (val & AG903_VIDCOn_HST1_HBP_MSK) >> AG903_VIDCOn_HST1_HBP_POS; 643: } 644: 645: 646: 653: void AG903_VidPrmGetVIDCOnVST0(uint32_t id, VIDPrmParamVIDCOnVST0 *vst0) 654: { 655: uint32_t val; 656: 657: ASSERT(id < AG903_VID_PRM_MAX_CAPTURE_PORTS); 658: ASSERT(vst0 != NULL); 659: 660: val = AG903_VIDCOn(id)->VST0; 661: 662: vst0->scan = (val & AG903_VIDCOn_VST0_SCAN_MSK) >> AG903_VIDCOn_VST0_SCAN_POS; 663: vst0->ebp = (val & AG903_VIDCOn_VST0_EBP_MSK) >> AG903_VIDCOn_VST0_EBP_POS; 664: vst0->efp = (val & AG903_VIDCOn_VST0_EFP_MSK) >> AG903_VIDCOn_VST0_EFP_POS; 665: vst0->obp = (val & AG903_VIDCOn_VST0_OBP_MSK) >> AG903_VIDCOn_VST0_OBP_POS; 666: vst0->ofp = (val & AG903_VIDCOn_VST0_OFP_MSK) >> AG903_VIDCOn_VST0_OFP_POS; 667: vst0->vpw = (val & AG903_VIDCOn_VST0_VPW_MSK) >> AG903_VIDCOn_VST0_VPW_POS; 668: } 669: 670: 671: 679: void AG903_VidPrmGetVIDCOnVST1(uint32_t id, uint32_t *vfp, uint32_t *vbp) 680: { 681: uint32_t val; 682: 683: ASSERT(id < AG903_VID_PRM_MAX_CAPTURE_PORTS); 684: ASSERT(vfp != NULL); 685: ASSERT(vbp != NULL); 686: 687: val = AG903_VIDCOn(id)->VST1; 688: 689: *vfp = (val & AG903_VIDCOn_VST1_VFP_MSK) >> AG903_VIDCOn_VST1_VFP_POS; 690: *vbp = (val & AG903_VIDCOn_VST1_VBP_MSK) >> AG903_VIDCOn_VST1_VBP_POS; 691: } 692: 693: 694: 702: void AG903_VidPrmGetVIDCOnFST(uint32_t id, uint32_t *vfs, uint32_t *hfs) 703: { 704: uint32_t val; 705: 706: ASSERT(id < AG903_VID_PRM_MAX_CAPTURE_PORTS); 707: ASSERT(vfs != NULL); 708: ASSERT(hfs != NULL); 709: 710: val = AG903_VIDCOn(id)->FST; 711: 712: *vfs = (val & AG903_VIDCOn_FST_VFS_MSK) >> AG903_VIDCOn_FST_VFS_POS; 713: *hfs = (val & AG903_VIDCOn_FST_HFS_MSK) >> AG903_VIDCOn_FST_HFS_POS; 714: }
 
名前 
説明 
 
VIDCOnFST レジスタ取得 
 
VIDCOnHST0 レジスタ取得 
 
VIDCOnHST1 レジスタ取得 
 
VIDCOnMOD レジスタ取得 
 
VIDCOnSDPRM レジスタ取得 
 
VIDCOnSTAT レジスタ取得 
 
VIDCOnTRSPRM レジスタ取得 
 
VIDCOnVST0 レジスタ取得 
 
VIDCOnVST1 レジスタ取得 
 
VIDCTRL レジスタ取得 
 
VIDFMT レジスタ取得 
 
VIDIOnCTRL レジスタ取得 
 
VIDIOnMOD レジスタ取得 
 
VIDIOnOHPRM0 レジスタ取得 
 
VIDIOnOHPRM1 ジスタ取得 
 
VIDIOnOSIZE レジスタ取得 
 
VIDIOnOVPRM0 レジスタ取得 
 
VIDIOnOVPRM1 レジスタ取得 
 
VIDIOnSTATE レジスタ取得 
 
VIDCOnMOD レジスタ設定 
 
VIDCOnSDPRM レジスタ設定 
 
VIDCOnTRSPRM レジスタ設定 
 
VIDCTRL レジスタ設定 
 
VIDFMTレジスタ 設定 
 
VIDIOnCTRL レジスタ設定 
 
VIDIOnMOD レジスタ設定 
 
VIDIOnOHPRM0 レジスタ設定 
 
VIDIOnOHPRM1 レジスタ設定 
 
VIDIOnOSIZE レジスタ設定 
 
VIDIOnOVPRM0 レジスタ設定 
 
VIDIOnOVPRM1 レジスタ設定 
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