メンバ |
説明 |
uint16_t sclk_div; |
SCLK divider |
uint8_t pdl; |
Padding data length |
uint8_t sdl; |
Serial data length uint8_t fs_fdbk; /** FS internal feedback uint8_t sclk_fdbk; /** SCLK internal feedback |
uint8_t spi_fspo; |
Frame/Sync polarity (SPI) |
uint8_t format; |
Frame format |
uint8_t spi_flash; | |
uint8_t validity; |
SPDIF validity (SPDIF) |
uint8_t fsdist; |
Frame/Sync and data distance (I2S) uint8_t lbm; /** loopback mode |
uint8_t lsb; |
Bit Sequence indicator (I2S/SPI) |
uint8_t fspo; |
Frame/Sync polarity (I2S) |
uint8_t fsjstfy; |
Data justify (I2S) |
uint8_t opm; |
Operation Mode |
uint8_t sclkpo; |
SCLK polarity (SPI) |
uint8_t sclkph; |
SCLK phase (SPI) |
uint8_t reserve; |
予約 |
制御パラメータ