1:
10:
11:
15:
16:
17:
#include "AG903_errno.h"
18:
#include "AG903_common.h"
19:
#include "sys/sscprm.h"
20:
#include "ssp/sspprm.h"
21:
#include "register/AG903_sscreg.h"
22:
23:
29:
void AG903_SSCPrmGetRevesion(uint32_t* rev)
30: {
31:
ASSERT(NULL != rev);
32: (*rev) =
AG903_SSC->REVISION;
33:
return;
34: }
35:
36:
44:
void AG903_SSCPrmGetModeStatus(uint8_t* btmode, uint8_t* bttest, uint8_t* status)
45: {
46: uint32_t val;
47:
48:
ASSERT(NULL != btmode);
49:
ASSERT(NULL != bttest);
50:
ASSERT(NULL != status);
51:
52: val =
AG903_SSC->MODE_STATUS;
53: (*btmode) = (uint8_t)((val &
AG903_SSC_MODE_STATUS_BOOTMODE_MSK) >>
AG903_SSC_MODE_STATUS_BOOTMODE_POS);
54: (*bttest) = (uint8_t)((val &
AG903_SSC_MODE_STATUS_BOOTTEST_MSK) >>
AG903_SSC_MODE_STATUS_BOOTTEST_POS);
55: (*status) = (uint8_t)((val & (
AG903_SSC_MODE_STATUS_WDTCA5_MSK|
AG903_SSC_MODE_STATUS_WDTGPP_MSK|
AG903_SSC_MODE_STATUS_WDTPIN_MSK|
56:
AG903_SSC_MODE_STATUS_INITPIN_MSK)) >>
AG903_SSC_MODE_STATUS_WDTCA5_POS);
57:
return;
58: }
59:
60:
68:
void AG903_SSCPrmClrModeStatus(uint8_t clr)
69: {
70: uint32_t val;
71:
72: val = (uint32_t)(clr <<
AG903_SSC_MODE_STATUS_WDTCA5_POS);
73: val &= (
AG903_SSC_MODE_STATUS_WDTCA5_MSK|
AG903_SSC_MODE_STATUS_WDTGPP_MSK|
AG903_SSC_MODE_STATUS_WDTPIN_MSK|
AG903_SSC_MODE_STATUS_INITPIN_MSK);
74:
75:
AG903_SSC->MODE_STATUS = val;
76:
77:
return;
78: }
79:
80:
87:
void AG903_SSCPrmGetIrqStatus(uint32_t* lower, uint32_t* upper)
88: {
89:
ASSERT(NULL != lower);
90:
ASSERT(NULL != upper);
91:
92: (*lower) =
AG903_SSC->IRQ_STATUS_LOWER;
93: (*upper) =
AG903_SSC->IRQ_STATUS_UPPER;
94:
return;
95: }
96:
97:
103:
void AG903_SSCPrmGetIntBusStatus(uint8_t* status)
104: {
105:
ASSERT(NULL != status);
106: (*status) = (uint8_t)(
AG903_SSC->IRQ_BUS_STATUS &
AG903_SSC_IRQ_BUS_STATUS_IRQBUSSTATUS_MSK);
107:
return;
108: }
109:
110:
118:
void AG903_SSCPrmSetIntBusEnable(uint8_t enable)
119: {
120:
AG903_SSC->IRQ_BUS_ENABLE = (uint32_t)(enable &
AG903_SSC_IRQ_BUS_ENABLE_IRQBUSENABLE_MSK);
121:
return;
122: }
123:
124:
130:
void AG903_SSCPrmGetIntBusEnable(uint8_t* status)
131: {
132:
ASSERT(NULL != status);
133: (*status) = (uint8_t)(
AG903_SSC->IRQ_BUS_ENABLE &
AG903_SSC_IRQ_BUS_ENABLE_IRQBUSENABLE_MSK);
134:
return;
135: }
136:
137:
145:
void AG903_SSCPrmGetSysIntStatus(uint32_t* lower, uint32_t* middle, uint32_t* upper)
146: {
147:
ASSERT(NULL != lower);
148:
ASSERT(NULL != middle);
149:
ASSERT(NULL != upper);
150:
151: (*lower) =
AG903_SSC->INT_STATUS_LOWER;
152: (*middle) =
AG903_SSC->INT_STATUS_MIDDLE;
153: (*upper) =
AG903_SSC->INT_STATUS_UPPER;
154:
return;
155: }
156:
157:
168:
void AG903_SSCPrmSetSysIntEnable(uint8_t ch, uint32_t lower, uint32_t middle, uint32_t upper)
169: {
170:
ASSERT(
AG903_SSC_SYSINT_CH_NUM > ch);
171:
172:
switch(ch) {
173:
case 0:
174:
AG903_SSC->INT0_ENABLE_LOWER = lower;
175:
AG903_SSC->INT0_ENABLE_MIDDLE = middle;
176:
AG903_SSC->INT0_ENABLE_UPPER = upper;
177:
break;
178:
case 1:
179:
AG903_SSC->INT1_ENABLE_LOWER = lower;
180:
AG903_SSC->INT1_ENABLE_MIDDLE = middle;
181:
AG903_SSC->INT1_ENABLE_UPPER = upper;
182:
break;
183:
case 2:
184:
AG903_SSC->INT2_ENABLE_LOWER = lower;
185:
AG903_SSC->INT2_ENABLE_MIDDLE = middle;
186:
AG903_SSC->INT2_ENABLE_UPPER = upper;
187:
break;
188:
case 3:
189:
AG903_SSC->INT3_ENABLE_LOWER = lower;
190:
AG903_SSC->INT3_ENABLE_MIDDLE = middle;
191:
AG903_SSC->INT3_ENABLE_UPPER = upper;
192:
break;
193:
default:
194:
195:
break;
196: }
197:
198:
return;
199: }
200:
201:
210:
void AG903_SSCPrmGetSysIntEnable(uint8_t ch, uint32_t* lower, uint32_t* middle, uint32_t* upper)
211: {
212:
ASSERT(
AG903_SSC_SYSINT_CH_NUM > ch);
213:
ASSERT(NULL != lower);
214:
ASSERT(NULL != middle);
215:
ASSERT(NULL != upper);
216:
217:
switch(ch) {
218:
case 0:
219: (*lower) =
AG903_SSC->INT0_ENABLE_LOWER;
220: (*middle) =
AG903_SSC->INT0_ENABLE_MIDDLE;
221: (*upper) =
AG903_SSC->INT0_ENABLE_UPPER;
222:
break;
223:
case 1:
224: (*lower) =
AG903_SSC->INT1_ENABLE_LOWER;
225: (*middle) =
AG903_SSC->INT1_ENABLE_MIDDLE;
226: (*upper) =
AG903_SSC->INT1_ENABLE_UPPER;
227:
break;
228:
case 2:
229: (*lower) =
AG903_SSC->INT2_ENABLE_LOWER;
230: (*middle) =
AG903_SSC->INT2_ENABLE_MIDDLE;
231: (*upper) =
AG903_SSC->INT2_ENABLE_UPPER;
232:
break;
233:
case 3:
234: (*lower) =
AG903_SSC->INT3_ENABLE_LOWER;
235: (*middle) =
AG903_SSC->INT3_ENABLE_MIDDLE;
236: (*upper) =
AG903_SSC->INT3_ENABLE_UPPER;
237:
break;
238:
default:
239:
240:
break;
241: }
242:
243:
return;
244: }
245:
246:
253:
void AG903_SSCPrmSetGfxClkDuty(uint8_t clk, uint8_t duty)
254: {
255: uint32_t val;
256:
257: val = (uint32_t)(duty &
AG903_SSC_CLKDUTY_GFX_DUTY_MSK);
258:
if(
true == clk) {
259: val |= (1<<
AG903_SSC_CLKDUTY_GFX_VSON_POS);
260: }
261:
AG903_SSC->CLKDUTY_GFX = val;
262:
263:
return;
264: }
265:
266:
273:
void AG903_SSCPrmGetGfxClkDuty(uint8_t* clk, uint8_t* duty)
274: {
275: uint32_t val;
276:
277:
ASSERT(NULL != clk);
278:
ASSERT(NULL != duty);
279:
280: val =
AG903_SSC->CLKDUTY_GFX;
281: (*duty) = (uint8_t)((val &
AG903_SSC_CLKDUTY_GFX_DUTY_MSK) >>
AG903_SSC_CLKDUTY_GFX_DUTY_POS);
282:
if(
AG903_SSC_CLKDUTY_GFX_VSON_MSK & val) {
283: (*clk) =
true;
284: }
285:
else {
286: (*clk) =
false;
287: }
288:
289:
return;
290: }
291:
292:
298:
void AG903_SSCPrmSetGvdClkDuty(uint8_t duty)
299: {
300:
AG903_SSC->CLKDUTY_GVD = (uint32_t)(duty &
AG903_SSC_CLKDUTY_GVD_DUTY_MSK);
301:
return;
302: }
303:
304:
310:
void AG903_SSCPrmGetGvdClkDuty(uint8_t* duty)
311: {
312:
ASSERT(NULL != duty);
313:
314: (*duty) = (uint8_t)((
AG903_SSC->CLKDUTY_GVD &
AG903_SSC_CLKDUTY_GVD_DUTY_MSK) >>
AG903_SSC_CLKDUTY_GVD_DUTY_POS);
315:
return;
316: }
317:
318:
324:
void AG903_SSCPrmSetWdtIntMode(uint8_t mode)
325: {
326:
AG903_SSC->WDTOUT_INTMODE = (uint32_t)(mode &
AG903_SSC_WDTOUT_INTMODE_LEVEL_MSK);
327:
return;
328: }
329:
330:
336:
void AG903_SSCPrmGetWdtIntMode(uint8_t* mode)
337: {
338: uint32_t val;
339:
340:
ASSERT(NULL != mode);
341:
342: val =
AG903_SSC->WDTOUT_INTMODE;
343:
if(
AG903_SSC_WDTOUT_INTMODE_LEVEL_MSK & val) {
344: (*mode) = AG903_SSC_WDTINT_LEVEL;
345: }
346:
else {
347: (*mode) = AG903_SSC_WDTINT_PULSE;
348: }
349:
350:
return;
351: }
352:
353:
359:
void AG903_SSCPrmClrWdtInt(
void)
360: {
361:
AG903_SSC->WDTOUT_INTCLEAR = (1 <<
AG903_SSC_WDTOUT_INTCLEAR_CLEAR_POS);
362:
return;
363: }
364:
365:
374:
void AG903_SSCPrmSetWdtOutputMode(uint8_t rst_ini, uint8_t rst_wdt, uint8_t wdt_ena, uint8_t wdt_od)
375: {
376: uint32_t val = 0;
377:
378:
if(
true == rst_ini) {
379: val |= (1 <<
AG903_SSC_WDTOUT_SETUP_INIT_POS);
380: }
381:
if(
true == rst_wdt) {
382: val |= (1 <<
AG903_SSC_WDTOUT_SETUP_WDT_POS);
383: }
384:
if(
true == wdt_ena) {
385: val |= (1 <<
AG903_SSC_WDTOUT_SETUP_OUT_POS);
386: }
387:
if(
true == wdt_od) {
388: val |= (1 <<
AG903_SSC_WDTOUT_SETUP_OD_POS);
389: }
390:
AG903_SSC->WDTOUT_SETUP = val;
391:
392:
return;
393: }
394:
395:
404:
void AG903_SSCPrmGetWdtOutputMode(uint8_t* rst_ini, uint8_t* rst_wdt, uint8_t* wdt_ena, uint8_t* wdt_od)
405: {
406: uint32_t val;
407:
408:
ASSERT(NULL != rst_ini);
409:
ASSERT(NULL != rst_wdt);
410:
ASSERT(NULL != wdt_ena);
411:
ASSERT(NULL != wdt_od);
412:
413: val =
AG903_SSC->WDTOUT_SETUP;
414:
if(
AG903_SSC_WDTOUT_SETUP_INIT_MSK & val) {
415: (*rst_ini) =
true;
416: }
417:
else {
418: (*rst_ini) =
false;
419: }
420:
if(
AG903_SSC_WDTOUT_SETUP_WDT_MSK & val) {
421: (*rst_wdt) =
true;
422: }
423:
else {
424: (*rst_wdt) =
false;
425: }
426:
if(
AG903_SSC_WDTOUT_SETUP_OUT_MSK & val) {
427: (*wdt_ena) =
true;
428: }
429:
else {
430: (*wdt_ena) =
false;
431: }
432:
if(
AG903_SSC_WDTOUT_SETUP_OD_MSK & val) {
433: (*wdt_od) =
true;
434: }
435:
else {
436: (*wdt_od) =
false;
437: }
438:
439:
return;
440: }
441:
442:
449:
void AG903_SSCPrmSetPinFunction(uint8_t reg_no, uint32_t val)
450: {
451:
ASSERT(
AG903_SSC_PINFUNC_REG_NUM > reg_no);
452:
453:
switch(reg_no) {
454:
case 0:
455:
AG903_SSC->PIN_FUNC0 = val;
456:
break;
457:
case 1:
458:
AG903_SSC->PIN_FUNC1 = val;
459:
break;
460:
default:
461:
462:
break;
463: }
464:
465:
return;
466: }
467:
468:
475:
void AG903_SSCPrmGetPinFunction(uint8_t reg_no, uint32_t* val)
476: {
477:
ASSERT(NULL != val);
478:
ASSERT(
AG903_SSC_PINFUNC_REG_NUM > reg_no);
479:
480:
switch(reg_no) {
481:
case 0:
482: (*val) =
AG903_SSC->PIN_FUNC0;
483:
break;
484:
case 1:
485: (*val) =
AG903_SSC->PIN_FUNC1;
486:
break;
487:
default:
488:
489:
break;
490: }
491:
492:
return;
493: }
494:
495:
502:
void AG903_SSCPrmSetPinSetup(uint8_t tbl_no,
AG903_SSCPrmPinSetup* setup)
503: {
504: uint32_t val = 0;
505:
506:
ASSERT(NULL != setup);
507:
ASSERT(
AG903_SSC_PIN_SETUP_INDEX_MAX >= tbl_no);
508:
509:
if(
true == setup->io3v) {
510: val |= (1 <<
AG903_SSC_PIN_SETUP_LS3V_POS);
511: }
512:
513: val |= (setup->drive <<
AG903_SSC_PIN_SETUP_DV_POS) &
AG903_SSC_PIN_SETUP_DV_MSK;
514:
515:
if(
true == setup->sr_slow) {
516: val |= (1 <<
AG903_SSC_PIN_SETUP_SR_POS);
517: }
518:
519:
if(
true == setup->schmitt) {
520: val |= (1 <<
AG903_SSC_PIN_SETUP_SMT_POS);
521: }
522:
523: val |= (setup->lv_set <<
AG903_SSC_PIN_SETUP_LVST_POS) &
AG903_SSC_PIN_SETUP_LVST_MSK;
524:
525:
AG903_SSC->PIN_SETUP_INDEX = (uint32_t)(tbl_no &
AG903_SSC_PIN_SETUP_INDEX_INDEX_MSK);
526:
AG903_SSC->PIN_SETUP_DATA = val;
527:
528:
return;
529: }
530:
531:
538:
void AG903_SSCPrmGetPinSetup(uint8_t tbl_no,
AG903_SSCPrmPinSetup* setup)
539: {
540: uint32_t val;
541:
542:
ASSERT(NULL != setup);
543:
ASSERT(
AG903_SSC_PIN_SETUP_INDEX_MAX >= tbl_no);
544:
545:
AG903_SSC->PIN_SETUP_INDEX = (uint32_t)(tbl_no &
AG903_SSC_PIN_SETUP_INDEX_INDEX_MSK);
546: val =
AG903_SSC->PIN_SETUP_DATA;
547:
548:
if(
AG903_SSC_PIN_SETUP_LS3V_MSK & val) {
549: setup->io3v =
true;
550: }
551:
else {
552: setup->io3v =
false;
553: }
554:
555: setup->drive = (uint8_t)((val &
AG903_SSC_PIN_SETUP_DV_MSK) >>
AG903_SSC_PIN_SETUP_DV_POS);
556:
557:
if(
AG903_SSC_PIN_SETUP_SR_MSK & val) {
558: setup->sr_slow =
true;
559: }
560:
else {
561: setup->sr_slow =
false;
562: }
563:
564:
if(
AG903_SSC_PIN_SETUP_SMT_MSK & val) {
565: setup->schmitt =
true;
566: }
567:
else {
568: setup->schmitt =
false;
569: }
570:
571: setup->lv_set = (uint8_t)((val &
AG903_SSC_PIN_SETUP_LVST_MSK) >>
AG903_SSC_PIN_SETUP_LVST_POS);
572:
573:
return;
574: }
575:
576:
583:
void AG903_SSCPrmSetPinGpioEnable(uint8_t reg_no, uint32_t val)
584: {
585:
ASSERT(
AG903_SSC_GPIOEN_REG_NUM > reg_no);
586:
AG903_SSC->PIN_GPIO_ENABLE[reg_no] = val;
587:
return;
588: }
589:
590:
597:
void AG903_SSCPrmGetPinGpioEnable(uint8_t reg_no, uint32_t* val)
598: {
599:
ASSERT(NULL != val);
600:
ASSERT(
AG903_SSC_GPIOEN_REG_NUM > reg_no);
601:
602: (*val) =
AG903_SSC->PIN_GPIO_ENABLE[reg_no];
603:
604:
return;
605: }
606:
607:
614:
void AG903_SSCPrmSetPinGpioPullUp(uint8_t reg_no, uint32_t val)
615: {
616:
ASSERT(
AG903_SSC_GPIOPU_REG_NUM > reg_no);
617:
AG903_SSC->PIN_GPIO_PIN_PU[reg_no] = val;
618:
return;
619: }
620:
621:
628:
void AG903_SSCPrmGetPinGpioPullUp(uint8_t reg_no, uint32_t* val)
629: {
630:
ASSERT(NULL != val);
631:
ASSERT(
AG903_SSC_GPIOPU_REG_NUM > reg_no);
632:
633: (*val) =
AG903_SSC->PIN_GPIO_PIN_PU[reg_no];
634:
635:
return;
636: }
637:
638:
645:
void AG903_SSCPrmSetPinGpioPullDown(uint8_t reg_no, uint32_t val)
646: {
647:
ASSERT(
AG903_SSC_GPIOPD_REG_NUM > reg_no);
648:
AG903_SSC->PIN_GPIO_PIN_PD[reg_no] = val;
649:
return;
650: }
651:
652:
659:
void AG903_SSCPrmGetPinGpioPullDown(uint8_t reg_no, uint32_t* val)
660: {
661:
ASSERT(NULL != val);
662:
ASSERT(
AG903_SSC_GPIOPD_REG_NUM > reg_no);
663:
664: (*val) =
AG903_SSC->PIN_GPIO_PIN_PD[reg_no];
665:
666:
return;
667: }
668:
669:
678:
void AG903_SSCPrmSetCpuSetup(uint8_t clk, uint8_t rst, uint8_t vbit)
679: {
680: uint32_t val = 0;
681:
682: val |= (vbit <<
AG903_SSC_CA5_RUN_SETUP_VINITHI_POS) &
AG903_SSC_CA5_RUN_SETUP_VINITHI_MSK;
683:
684:
if(
true == rst) {
685: val |= (1 <<
AG903_SSC_CA5_RUN_SETUP_RESET_POS);
686: }
687:
688:
if(
true == clk) {
689: val |= (1 <<
AG903_SSC_CA5_RUN_SETUP_GCLK_POS);
690: }
691:
692:
AG903_SSC->CA5_RUN_SETUP = val;
693:
694:
return;
695: }
696:
697:
705:
void AG903_SSCPrmGetCpuSetup(uint8_t* clk, uint8_t* rst, uint8_t* vbit)
706: {
707: uint32_t val;
708:
709:
ASSERT(NULL != clk);
710:
ASSERT(NULL != rst);
711:
ASSERT(NULL != vbit);
712:
713: val =
AG903_SSC->CA5_RUN_SETUP;
714:
715:
if(
AG903_SSC_CA5_RUN_SETUP_GCLK_MSK & val) {
716: (*clk) =
true;
717: }
718:
else {
719: (*clk) =
false;
720: }
721:
722:
if(
AG903_SSC_CA5_RUN_SETUP_RESET_MSK & val) {
723: (*rst) =
true;
724: }
725:
else {
726: (*rst) =
false;
727: }
728:
729: (*vbit) = (uint8_t)((val &
AG903_SSC_CA5_RUN_SETUP_VINITHI_MSK) >>
AG903_SSC_CA5_RUN_SETUP_VINITHI_POS);
730:
731:
return;
732: }
733:
734:
740:
void AG903_SSCPrmClrCpuEventOutStatus(
void)
741: {
742:
AG903_SSC->CA5_RUN_CTRL = (1 <<
AG903_SSC_CA5_RUN_CTRL_CLREV_POS);
743:
return;
744: }
745:
746:
752:
void AG903_SSCPrmGetCpuStatus(
AG903_SSCPrmCpuRunStatus* status)
753: {
754: uint32_t val;
755:
756:
ASSERT(NULL != status);
757:
758: val =
AG903_SSC->CA5_RUN_STATUS;
759:
760:
if(
AG903_SSC_CA5_RUN_STATUS_EVENTO_MSK & val) {
761: status->sev_op =
true;
762: }
763:
else {
764: status->sev_op =
false;
765: }
766:
767:
if(
AG903_SSC_CA5_RUN_STATUS_WFI_MSK & val) {
768: status->wfi_stby =
true;
769: }
770:
else {
771: status->wfi_stby =
false;
772: }
773:
774:
if(
AG903_SSC_CA5_RUN_STATUS_WFE_MSK & val) {
775: status->wfe_stby =
true;
776: }
777:
else {
778: status->wfe_stby =
false;
779: }
780:
781:
if(
AG903_SSC_CA5_RUN_STATUS_RESET_MSK & val) {
782: status->reset =
true;
783: }
784:
else {
785: status->reset =
false;
786: }
787:
788:
if(
AG903_SSC_CA5_RUN_STATUS_GCLK_MSK & val) {
789: status->clk =
true;
790: }
791:
else {
792: status->clk =
false;
793: }
794:
795:
return;
796: }
797:
798:
804:
void AG903_SSCPrmSetCpuAcpSetup(uint32_t acp_addr)
805: {
806:
AG903_SSC->CA5_ACP_SETUP = acp_addr &
AG903_SSC_CA5_ACP_SETUP_ACPADDR_MSK;
807:
return;
808: }
809:
810:
816:
void AG903_SSCPrmGetCpuAcpSetup(uint32_t* acp_addr)
817: {
818:
ASSERT(NULL != acp_addr);
819: (*acp_addr) =
AG903_SSC->CA5_ACP_SETUP &
AG903_SSC_CA5_ACP_SETUP_ACPADDR_MSK;
820:
return;
821: }
822:
823:
831:
void AG903_SSCPrmSetDmaInterface(uint8_t reg_no, uint32_t val)
832: {
833:
ASSERT(
AG903_SSC_DMASEL_REG_NUM > reg_no);
834:
835:
switch(reg_no) {
836:
case 0:
837:
AG903_SSC->DMA_SELECT0 = val;
838:
break;
839:
case 1:
840:
AG903_SSC->DMA_SELECT1 = val;
841:
break;
842:
case 2:
843:
AG903_SSC->DMA_SELECT2 = val;
844:
break;
845:
case 3:
846:
AG903_SSC->DMA_SELECT3 = val;
847:
break;
848:
default:
849:
850:
break;
851: }
852:
853:
return;
854: }
855:
856:
863:
void AG903_SSCPrmGetDmaInterface(uint8_t reg_no, uint32_t* val)
864: {
865:
ASSERT(NULL != val);
866:
ASSERT(
AG903_SSC_DMASEL_REG_NUM > reg_no);
867:
868:
switch(reg_no) {
869:
case 0:
870: (*val) =
AG903_SSC->DMA_SELECT0;
871:
break;
872:
case 1:
873: (*val) =
AG903_SSC->DMA_SELECT1;
874:
break;
875:
case 2:
876: (*val) =
AG903_SSC->DMA_SELECT2;
877:
break;
878:
case 3:
879: (*val) =
AG903_SSC->DMA_SELECT3;
880:
break;
881:
default:
882:
883:
break;
884: }
885:
886:
return;
887: }
888:
889:
895:
void AG903_SSCPrmSetPbdDmaInterface(uint8_t val)
896: {
897:
AG903_SSC->DMA_SELECT_PBD = (val <<
AG903_SSC_DMA_SELECT_PBD_DMASELECT_POS) &
AG903_SSC_DMA_SELECT_PBD_DMASELECT_MSK;
898:
return;
899: }
900:
901:
907:
void AG903_SSCPrmGetPbdDmaInterface(uint8_t* val)
908: {
909:
ASSERT(NULL != val);
910: (*val) = (uint8_t)((
AG903_SSC->DMA_SELECT_PBD &
AG903_SSC_DMA_SELECT_PBD_DMASELECT_MSK) >>
AG903_SSC_DMA_SELECT_PBD_DMASELECT_POS);
911:
return;
912: }
913:
914:
920:
void AG903_SSCPrmSetDspPinDir(
AG903_SSCPrmDspSetup* dir)
921: {
922: uint32_t val = 0;
923:
924:
ASSERT(NULL != dir);
925:
926:
if(
AG903_SSC_PINDIR_OUTPUT == dir->vsync0) {
927: val |= (1 <<
AG903_SSC_DSP_SETUP_VSYNC0_DIR_POS);
928: }
929:
if(
AG903_SSC_PINDIR_OUTPUT == dir->field0) {
930: val |= (1 <<
AG903_SSC_DSP_SETUP_FIELD0_DIR_POS);
931: }
932:
if(
AG903_SSC_PINDIR_OUTPUT == dir->dot0) {
933: val |= (1 <<
AG903_SSC_DSP_SETUP_DOT0_DIR_POS);
934: }
935:
if(
AG903_SSC_PINDIR_OUTPUT == dir->vsync1) {
936: val |= (1 <<
AG903_SSC_DSP_SETUP_VSYNC1_DIR_POS);
937: }
938:
if(
AG903_SSC_PINDIR_OUTPUT == dir->field1) {
939: val |= (1 <<
AG903_SSC_DSP_SETUP_FIELD1_DIR_POS);
940: }
941:
if(
AG903_SSC_PINDIR_OUTPUT == dir->dot1) {
942: val |= (1 <<
AG903_SSC_DSP_SETUP_DOT1_DIR_POS);
943: }
944:
945:
AG903_SSC->DSP_SETUP = val;
946:
947:
return;
948: }
949:
950:
956:
void AG903_SSCPrmGetDspPinDir(
AG903_SSCPrmDspSetup* dir)
957: {
958: uint32_t val;
959:
960:
ASSERT(NULL != dir);
961:
962: val =
AG903_SSC->DSP_SETUP;
963:
964:
if(
AG903_SSC_DSP_SETUP_VSYNC0_DIR_MSK & val) {
965: dir->vsync0 =
AG903_SSC_PINDIR_OUTPUT;
966: }
967:
else {
968: dir->vsync0 =
AG903_SSC_PINDIR_INPUT;
969: }
970:
971:
if(
AG903_SSC_DSP_SETUP_FIELD0_DIR_MSK & val) {
972: dir->field0 =
AG903_SSC_PINDIR_OUTPUT;
973: }
974:
else {
975: dir->field0 =
AG903_SSC_PINDIR_INPUT;
976: }
977:
978:
if(
AG903_SSC_DSP_SETUP_DOT0_DIR_MSK & val) {
979: dir->dot0 =
AG903_SSC_PINDIR_OUTPUT;
980: }
981:
else {
982: dir->dot0 =
AG903_SSC_PINDIR_INPUT;
983: }
984:
985:
if(
AG903_SSC_DSP_SETUP_VSYNC1_DIR_MSK & val) {
986: dir->vsync1 =
AG903_SSC_PINDIR_OUTPUT;
987: }
988:
else {
989: dir->vsync1 =
AG903_SSC_PINDIR_INPUT;
990: }
991:
992:
if(
AG903_SSC_DSP_SETUP_FIELD1_DIR_MSK & val) {
993: dir->field1 =
AG903_SSC_PINDIR_OUTPUT;
994: }
995:
else {
996: dir->field1 =
AG903_SSC_PINDIR_INPUT;
997: }
998:
999:
if(
AG903_SSC_DSP_SETUP_DOT1_DIR_MSK & val) {
1000: dir->dot1 =
AG903_SSC_PINDIR_OUTPUT;
1001: }
1002:
else {
1003: dir->dot1 =
AG903_SSC_PINDIR_INPUT;
1004: }
1005:
1006:
return;
1007: }
1008:
1009:
1017:
void AG903_SSCPrmSetTickSetup(uint8_t ch, uint8_t clksel, uint32_t div)
1018: {
1019: uint32_t val = 0;
1020:
1021:
ASSERT(
AG903_SSC_TICKCNT_CH_NUM > ch);
1022:
1023:
switch(ch) {
1024:
case 0:
1025: val |= (div <<
AG903_SSC_TICK0_SETUP_DIVNUM_POS) &
AG903_SSC_TICK0_SETUP_DIVNUM_MSK;
1026: val |= (clksel <<
AG903_SSC_TICK0_SETUP_CLKSEL_POS) &
AG903_SSC_TICK0_SETUP_CLKSEL_MSK;
1027:
AG903_SSC->TICK0_SETUP = val;
1028:
break;
1029:
case 1:
1030: val |= (div <<
AG903_SSC_TICK1_SETUP_DIVNUM_POS) &
AG903_SSC_TICK1_SETUP_DIVNUM_MSK;
1031: val |= (clksel <<
AG903_SSC_TICK1_SETUP_CLKSEL_POS) &
AG903_SSC_TICK1_SETUP_CLKSEL_MSK;
1032:
AG903_SSC->TICK1_SETUP = val;
1033:
break;
1034:
default:
1035:
1036:
break;
1037: }
1038:
1039:
return;
1040: }
1041:
1042:
1050:
void AG903_SSCPrmGetTickSetup(uint8_t ch, uint8_t* clksel, uint32_t* div)
1051: {
1052: uint32_t val;
1053:
1054:
ASSERT(NULL != clksel);
1055:
ASSERT(NULL != div);
1056:
ASSERT(
AG903_SSC_TICKCNT_CH_NUM > ch);
1057:
1058:
switch(ch) {
1059:
case 0:
1060: val =
AG903_SSC->TICK0_SETUP;
1061: (*clksel) = (uint8_t)((val &
AG903_SSC_TICK0_SETUP_CLKSEL_MSK) >>
AG903_SSC_TICK0_SETUP_CLKSEL_POS);
1062: (*div) = (val &
AG903_SSC_TICK0_SETUP_DIVNUM_MSK) >>
AG903_SSC_TICK0_SETUP_DIVNUM_POS;
1063:
break;
1064:
case 1:
1065: val =
AG903_SSC->TICK1_SETUP;
1066: (*clksel) = (uint8_t)((val &
AG903_SSC_TICK1_SETUP_CLKSEL_MSK) >>
AG903_SSC_TICK1_SETUP_CLKSEL_POS);
1067: (*div) = (val &
AG903_SSC_TICK1_SETUP_DIVNUM_MSK) >>
AG903_SSC_TICK1_SETUP_DIVNUM_POS;
1068:
break;
1069:
default:
1070:
1071:
break;
1072: }
1073:
1074:
return;
1075: }
1076:
1077:
1083:
void AG903_SSCPrmSetTimerPinDir(uint8_t tim_dir)
1084: {
1085: uint32_t val = 0;
1086:
1087:
if(
AG903_SSC_PINDIR_OUTPUT == ((tim_dir >> 0) & 0x01)) {
1088: val |= (1 << 0);
1089: }
1090:
if(
AG903_SSC_PINDIR_OUTPUT == ((tim_dir >> 1) & 0x01)) {
1091: val |= (1 << 1);
1092: }
1093:
if(
AG903_SSC_PINDIR_OUTPUT == ((tim_dir >> 2) & 0x01)) {
1094: val |= (1 << 2);
1095: }
1096:
if(
AG903_SSC_PINDIR_OUTPUT == ((tim_dir >> 3) & 0x01)) {
1097: val |= (1 << 3);
1098: }
1099:
1100:
AG903_SSC->TIM_SETUP = (val <<
AG903_SSC_TIM_SETUP_TIM_DIR_POS) &
AG903_SSC_TIM_SETUP_TIM_DIR_MSK;
1101:
1102:
return;
1103: }
1104:
1105:
1111:
void AG903_SSCPrmGetTimerPinDir(uint8_t* tim_dir)
1112: {
1113: uint8_t val;
1114:
1115:
ASSERT(NULL != tim_dir);
1116:
1117: val = (uint8_t)((
AG903_SSC->TIM_SETUP &
AG903_SSC_TIM_SETUP_TIM_DIR_MSK) >>
AG903_SSC_TIM_SETUP_TIM_DIR_POS);
1118:
1119: (*tim_dir) = 0;
1120:
if((1<<0) & val) {
1121: (*tim_dir) |= (
AG903_SSC_PINDIR_OUTPUT << 0);
1122: }
1123:
if((1<<1) & val) {
1124: (*tim_dir) |= (
AG903_SSC_PINDIR_OUTPUT << 1);
1125: }
1126:
if((1<<2) & val) {
1127: (*tim_dir) |= (
AG903_SSC_PINDIR_OUTPUT << 2);
1128: }
1129:
if((1<<3) & val) {
1130: (*tim_dir) |= (
AG903_SSC_PINDIR_OUTPUT << 3);
1131: }
1132:
1133:
return;
1134: }
1135:
1136:
1143:
void AG903_SSCPrmSetSspSetup(uint8_t ch,
AG903_SSCPrmSspSetup* param)
1144: {
1145: uint32_t val;
1146:
1147:
ASSERT(NULL != param);
1148:
ASSERT(
AG903_SSP_CH_NUM > ch);
1149:
1150: val =
AG903_SSC->SSP_SETUP;
1151: val &= ~(0xFF << (ch*8));
1152:
1153:
switch(ch) {
1154:
case 0:
1155: val |= (param->mclk_div <<
AG903_SSC_SSP_SETUP_SSP0_MCLK_DIV_POS) &
AG903_SSC_SSP_SETUP_SSP0_MCLK_DIV_MSK;
1156:
if(
AG903_SSC_PINDIR_OUTPUT == param->mclk_dir) {
1157: val |= (1 <<
AG903_SSC_SSP_SETUP_SSP0_MCLK_DIR_POS);
1158: }
1159:
if(
AG903_SSC_SSPMODE_HLFDPLX == param->mode) {
1160: val |= (1 <<
AG903_SSC_SSP_SETUP_SSP0_MODE_POS);
1161: }
1162:
if(
AG903_SSC_PINDIR_OUTPUT == param->dir) {
1163: val |= (1 <<
AG903_SSC_SSP_SETUP_SSP0_DIR_POS);
1164: }
1165:
break;
1166:
case 1:
1167: val |= (param->mclk_div <<
AG903_SSC_SSP_SETUP_SSP1_MCLK_DIV_POS) &
AG903_SSC_SSP_SETUP_SSP1_MCLK_DIV_MSK;
1168:
if(
AG903_SSC_PINDIR_OUTPUT == param->mclk_dir) {
1169: val |= (1 <<
AG903_SSC_SSP_SETUP_SSP1_MCLK_DIR_POS);
1170: }
1171:
if(
AG903_SSC_SSPMODE_HLFDPLX == param->mode) {
1172: val |= (1 <<
AG903_SSC_SSP_SETUP_SSP1_MODE_POS);
1173: }
1174:
if(
AG903_SSC_PINDIR_OUTPUT == param->dir) {
1175: val |= (1 <<
AG903_SSC_SSP_SETUP_SSP1_DIR_POS);
1176: }
1177:
break;
1178:
case 2:
1179: val |= (param->mclk_div <<
AG903_SSC_SSP_SETUP_SSP2_MCLK_DIV_POS) &
AG903_SSC_SSP_SETUP_SSP2_MCLK_DIV_MSK;
1180:
if(
AG903_SSC_PINDIR_OUTPUT == param->mclk_dir) {
1181: val |= (1 <<
AG903_SSC_SSP_SETUP_SSP2_MCLK_DIR_POS);
1182: }
1183:
if(
AG903_SSC_SSPMODE_HLFDPLX == param->mode) {
1184: val |= (1 <<
AG903_SSC_SSP_SETUP_SSP2_MODE_POS);
1185: }
1186:
if(
AG903_SSC_PINDIR_OUTPUT == param->dir) {
1187: val |= (1 <<
AG903_SSC_SSP_SETUP_SSP2_DIR_POS);
1188: }
1189:
break;
1190:
case 3:
1191: val |= (param->mclk_div <<
AG903_SSC_SSP_SETUP_SSP3_MCLK_DIV_POS) &
AG903_SSC_SSP_SETUP_SSP3_MCLK_DIV_MSK;
1192:
if(
AG903_SSC_PINDIR_OUTPUT == param->mclk_dir) {
1193: val |= (1 <<
AG903_SSC_SSP_SETUP_SSP3_MCLK_DIR_POS);
1194: }
1195:
if(
AG903_SSC_SSPMODE_HLFDPLX == param->mode) {
1196: val |= (1 <<
AG903_SSC_SSP_SETUP_SSP3_MODE_POS);
1197: }
1198:
if(
AG903_SSC_PINDIR_OUTPUT == param->dir) {
1199: val |= (1 <<
AG903_SSC_SSP_SETUP_SSP3_DIR_POS);
1200: }
1201:
break;
1202:
default:
1203:
1204:
break;
1205: }
1206:
1207:
AG903_SSC->SSP_SETUP = val;
1208:
1209:
return;
1210: }
1211:
1212:
1219:
void AG903_SSCPrmGetSspSetup(uint8_t ch,
AG903_SSCPrmSspSetup* param)
1220: {
1221: uint32_t val;
1222:
1223:
ASSERT(NULL != param);
1224:
ASSERT(
AG903_SSP_CH_NUM > ch);
1225:
1226: val =
AG903_SSC->SSP_SETUP;
1227:
1228:
switch(ch) {
1229:
case 0:
1230: param->mclk_div = (uint8_t)((val &
AG903_SSC_SSP_SETUP_SSP0_MCLK_DIV_MSK) >>
AG903_SSC_SSP_SETUP_SSP0_MCLK_DIV_POS);
1231:
if(
AG903_SSC_SSP_SETUP_SSP0_MCLK_DIR_MSK & val) {
1232: param->mclk_dir =
AG903_SSC_PINDIR_OUTPUT;
1233: }
1234:
else {
1235: param->mclk_dir =
AG903_SSC_PINDIR_INPUT;
1236: }
1237:
if(
AG903_SSC_SSP_SETUP_SSP0_MODE_MSK & val) {
1238: param->mode =
AG903_SSC_SSPMODE_HLFDPLX;
1239: }
1240:
else {
1241: param->mode =
AG903_SSC_SSPMODE_FLLDPLX;
1242: }
1243:
if(
AG903_SSC_SSP_SETUP_SSP0_DIR_MSK & val) {
1244: param->dir =
AG903_SSC_PINDIR_OUTPUT;
1245: }
1246:
else {
1247: param->dir =
AG903_SSC_PINDIR_INPUT;
1248: }
1249:
break;
1250:
case 1:
1251: param->mclk_div = (uint8_t)((val &
AG903_SSC_SSP_SETUP_SSP1_MCLK_DIV_MSK) >>
AG903_SSC_SSP_SETUP_SSP1_MCLK_DIV_POS);
1252:
if(
AG903_SSC_SSP_SETUP_SSP1_MCLK_DIR_MSK & val) {
1253: param->mclk_dir =
AG903_SSC_PINDIR_OUTPUT;
1254: }
1255:
else {
1256: param->mclk_dir =
AG903_SSC_PINDIR_INPUT;
1257: }
1258:
if(
AG903_SSC_SSP_SETUP_SSP1_MODE_MSK & val) {
1259: param->mode =
AG903_SSC_SSPMODE_HLFDPLX;
1260: }
1261:
else {
1262: param->mode =
AG903_SSC_SSPMODE_FLLDPLX;
1263: }
1264:
if(
AG903_SSC_SSP_SETUP_SSP1_DIR_MSK & val) {
1265: param->dir =
AG903_SSC_PINDIR_OUTPUT;
1266: }
1267:
else {
1268: param->dir =
AG903_SSC_PINDIR_INPUT;
1269: }
1270:
break;
1271:
case 2:
1272: param->mclk_div = (uint8_t)((val &
AG903_SSC_SSP_SETUP_SSP2_MCLK_DIV_MSK) >>
AG903_SSC_SSP_SETUP_SSP2_MCLK_DIV_POS);
1273:
if(
AG903_SSC_SSP_SETUP_SSP2_MCLK_DIR_MSK & val) {
1274: param->mclk_dir =
AG903_SSC_PINDIR_OUTPUT;
1275: }
1276:
else {
1277: param->mclk_dir =
AG903_SSC_PINDIR_INPUT;
1278: }
1279:
if(
AG903_SSC_SSP_SETUP_SSP2_MODE_MSK & val) {
1280: param->mode =
AG903_SSC_SSPMODE_HLFDPLX;
1281: }
1282:
else {
1283: param->mode =
AG903_SSC_SSPMODE_FLLDPLX;
1284: }
1285:
if(
AG903_SSC_SSP_SETUP_SSP2_DIR_MSK & val) {
1286: param->dir =
AG903_SSC_PINDIR_OUTPUT;
1287: }
1288:
else {
1289: param->dir =
AG903_SSC_PINDIR_INPUT;
1290: }
1291:
break;
1292:
case 3:
1293: param->mclk_div = (uint8_t)((val &
AG903_SSC_SSP_SETUP_SSP3_MCLK_DIV_MSK) >>
AG903_SSC_SSP_SETUP_SSP3_MCLK_DIV_POS);
1294:
if(
AG903_SSC_SSP_SETUP_SSP3_MCLK_DIR_MSK & val) {
1295: param->mclk_dir =
AG903_SSC_PINDIR_OUTPUT;
1296: }
1297:
else {
1298: param->mclk_dir =
AG903_SSC_PINDIR_INPUT;
1299: }
1300:
if(
AG903_SSC_SSP_SETUP_SSP3_MODE_MSK & val) {
1301: param->mode =
AG903_SSC_SSPMODE_HLFDPLX;
1302: }
1303:
else {
1304: param->mode =
AG903_SSC_SSPMODE_FLLDPLX;
1305: }
1306:
if(
AG903_SSC_SSP_SETUP_SSP3_DIR_MSK & val) {
1307: param->dir =
AG903_SSC_PINDIR_OUTPUT;
1308: }
1309:
else {
1310: param->dir =
AG903_SSC_PINDIR_INPUT;
1311: }
1312:
break;
1313:
default:
1314:
1315:
break;
1316: }
1317:
1318:
return;
1319: }
1320:
1321:
1328:
void AG903_SSCPrmSetPbdCheckAddr(uint32_t sta_addr, uint32_t end_addr)
1329: {
1330:
AG903_SSC->PBD_ADDRCHECK_START = sta_addr &
AG903_SSC_PBD_ADDRCHECK_START_START_ADDR_MSK;
1331:
AG903_SSC->PBD_ADDRCHECK_END = end_addr &
AG903_SSC_PBD_ADDRCHECK_END_END_ADDR_MSK;
1332:
return;
1333: }
1334:
1335:
1342:
void AG903_SSCPrmGetPbdCheckAddr(uint32_t* sta_addr, uint32_t* end_addr)
1343: {
1344:
ASSERT(NULL != sta_addr);
1345:
ASSERT(NULL != end_addr);
1346: (*sta_addr) =
AG903_SSC->PBD_ADDRCHECK_START;
1347: (*end_addr) =
AG903_SSC->PBD_ADDRCHECK_END;
1348:
return;
1349: }
1350:
1351:
1357:
void AG903_SSCPrmSetPbdAddrCheckEnable(uint8_t enable)
1358: {
1359:
if(
true == enable) {
1360:
AG903_SSC->PBD_ADDRCHECK_ENABLE = (1 <<
AG903_SSC_PBD_ADDRCHECK_ENABLE_ENABLE_POS);
1361: }
1362:
else {
1363:
AG903_SSC->PBD_ADDRCHECK_ENABLE = 0;
1364: }
1365:
return;
1366: }
1367:
1368:
1374:
void AG903_SSCPrmGetPbdAddrCheckEnable(uint8_t* enable)
1375: {
1376: uint32_t val;
1377:
1378:
ASSERT(NULL != enable);
1379:
1380: val =
AG903_SSC->PBD_ADDRCHECK_ENABLE;
1381:
if(
AG903_SSC_PBD_ADDRCHECK_ENABLE_ENABLE_MSK & val) {
1382: (*enable) =
true;
1383: }
1384:
else {
1385: (*enable) =
false;
1386: }
1387:
1388:
return;
1389: }
1390:
1391:
1397:
void AG903_SSCPrmGetPbdAddrCheckStatus(uint8_t* status)
1398: {
1399: uint32_t val;
1400:
1401:
ASSERT(NULL != status);
1402:
1403: val =
AG903_SSC->PBD_ADDRCHECK_STATUS;
1404:
if(
AG903_SSC_PBD_ADDRCHECK_STATUS_STATUS_MSK & val) {
1405: (*status) =
true;
1406: }
1407:
else {
1408: (*status) =
false;
1409: }
1410:
1411:
return;
1412: }
1413:
1414:
1423:
void AG903_SSCPrmGetBmuStatus(uint16_t* src_req, uint16_t* src_rdy, uint8_t* snk_req, uint8_t* snk_rdy)
1424: {
1425: uint32_t val;
1426:
1427:
ASSERT(NULL != src_req);
1428:
ASSERT(NULL != src_rdy);
1429:
ASSERT(NULL != snk_req);
1430:
ASSERT(NULL != snk_rdy);
1431:
1432: val =
AG903_SSC->BMU_STATUS;
1433:
1434: (*src_req) = (uint16_t)((val &
AG903_SSC_BMU_STATUS_SRCREQ_MSK) >>
AG903_SSC_BMU_STATUS_SRCREQ_POS);
1435: (*src_rdy) = (uint16_t)((val &
AG903_SSC_BMU_STATUS_SRCRDY_MSK) >>
AG903_SSC_BMU_STATUS_SRCRDY_POS);
1436: (*snk_req) = (uint8_t)((val &
AG903_SSC_BMU_STATUS_SNKREQ_MSK) >>
AG903_SSC_BMU_STATUS_SNKREQ_POS);
1437: (*snk_rdy) = (uint8_t)((val &
AG903_SSC_BMU_STATUS_SNKRDY_MSK) >>
AG903_SSC_BMU_STATUS_SNKRDY_POS);
1438:
1439:
return;
1440: }
1441:
1442:
1452:
void AG903_SSCPrmSetBmuControl(uint16_t set_src, uint16_t clr_src, uint8_t set_snk, uint8_t clr_snk)
1453: {
1454: uint32_t val = 0;
1455:
1456: val |= (set_src <<
AG903_SSC_BMU_CONTROL_SET_SRC_POS) &
AG903_SSC_BMU_CONTROL_SET_SRC_MSK;
1457: val |= (clr_src <<
AG903_SSC_BMU_CONTROL_CLR_SRC_POS) &
AG903_SSC_BMU_CONTROL_CLR_SRC_MSK;
1458: val |= (set_snk <<
AG903_SSC_BMU_CONTROL_SET_SNK_POS) &
AG903_SSC_BMU_CONTROL_SET_SNK_MSK;
1459: val |= (clr_snk <<
AG903_SSC_BMU_CONTROL_CLR_SNK_POS) &
AG903_SSC_BMU_CONTROL_CLR_SNK_MSK;
1460:
1461:
AG903_SSC->BMU_CONTROL = val;
1462:
1463:
return;
1464: }
1465:
1466:
1475:
void AG903_SSCPrmGetBmuTriggerStatus(uint16_t* src_req, uint16_t* src_rdy, uint8_t* snk_req, uint8_t* snk_rdy)
1476: {
1477: uint32_t val;
1478:
1479:
ASSERT(NULL != src_req);
1480:
ASSERT(NULL != src_rdy);
1481:
ASSERT(NULL != snk_req);
1482:
ASSERT(NULL != snk_rdy);
1483:
1484: val =
AG903_SSC->BMU_TRIG_STATUS;
1485:
1486: (*src_req) = (uint16_t)((val &
AG903_SSC_BMU_TRIG_STATUS_SRCREQ_MSK) >>
AG903_SSC_BMU_TRIG_STATUS_SRCREQ_POS);
1487: (*src_rdy) = (uint16_t)((val &
AG903_SSC_BMU_TRIG_STATUS_SRCRDY_MSK) >>
AG903_SSC_BMU_TRIG_STATUS_SRCRDY_POS);
1488: (*snk_req) = (uint8_t)((val &
AG903_SSC_BMU_TRIG_STATUS_SNKREQ_MSK) >>
AG903_SSC_BMU_TRIG_STATUS_SNKREQ_POS);
1489: (*snk_rdy) = (uint8_t)((val &
AG903_SSC_BMU_TRIG_STATUS_SNKRDY_MSK) >>
AG903_SSC_BMU_TRIG_STATUS_SNKRDY_POS);
1490:
1491:
return;
1492: }
1493:
1494:
1503:
void AG903_SSCPrmClrBmuTriggerStatus(uint16_t src_req, uint16_t src_rdy, uint8_t snk_req, uint8_t snk_rdy)
1504: {
1505: uint32_t val = 0;
1506:
1507: val |= (src_req <<
AG903_SSC_BMU_TRIG_CLEAR_SRCREQ_POS) &
AG903_SSC_BMU_TRIG_CLEAR_SRCREQ_MSK;
1508: val |= (src_rdy <<
AG903_SSC_BMU_TRIG_CLEAR_SRCRDY_POS) &
AG903_SSC_BMU_TRIG_CLEAR_SRCRDY_MSK;
1509: val |= (snk_req <<
AG903_SSC_BMU_TRIG_CLEAR_SNKREQ_POS) &
AG903_SSC_BMU_TRIG_CLEAR_SNKREQ_MSK;
1510: val |= (snk_rdy <<
AG903_SSC_BMU_TRIG_CLEAR_SNKRDY_POS) &
AG903_SSC_BMU_TRIG_CLEAR_SNKRDY_MSK;
1511:
1512:
AG903_SSC->BMU_TRIG_CLEAR = val;
1513:
1514:
return;
1515: }
1516:
1517:
1524:
void AG903_SSCPrmSetPortWait(uint16_t wait)
1525: {
1526:
AG903_SSC->PORT_WAIT = (uint32_t)(wait &
AG903_SSC_PORT_WAIT_CYCLE_MSK);
1527:
return;
1528: }
1529:
1530:
1536:
void AG903_SSCPrmGetPortWait(uint16_t* wait)
1537: {
1538: uint32_t val;
1539:
1540:
ASSERT(NULL != wait);
1541:
1542: val =
AG903_SSC->PORT_WAIT;
1543: (*wait) = (uint16_t)((val &
AG903_SSC_PORT_WAIT_CYCLE_MSK) >>
AG903_SSC_PORT_WAIT_CYCLE_POS);
1544:
1545:
return;
1546: }
1547:
1548:
1554:
void AG903_SSCPrmSetPbhMode(uint8_t wait_sel)
1555: {
1556: uint32_t val = 0;
1557:
1558:
if(
AG903_SSC_PBHWAIT_BLP0BLGT == wait_sel) {
1559: val |= (1 <<
AG903_SSC_PBH_MODE_WAIT_POS);
1560: }
1561:
AG903_SSC->PBH_MODE = val;
1562:
1563:
return;
1564: }
1565:
1566:
1572:
void AG903_SSCPrmGetPbhMode(uint8_t* wait_sel)
1573: {
1574: uint32_t val;
1575:
1576:
ASSERT(NULL != wait_sel);
1577:
1578: val =
AG903_SSC->PBH_MODE;
1579:
if(
AG903_SSC_PBH_MODE_WAIT_MSK & val) {
1580: (*wait_sel) =
AG903_SSC_PBHWAIT_BLP0BLGT;
1581: }
1582:
else {
1583: (*wait_sel) =
AG903_SSC_PBHWAIT_HWAIT;
1584: }
1585:
1586:
return;
1587: }
1588:
1589:
1597:
void AG903_SSCPrmSetTdmSetup(uint8_t ch,
AG903_SSCPrmTdmParam* param)
1598: {
1599: uint32_t val = 0;
1600:
1601:
ASSERT(
AG903_SSP_CH_NUM > ch);
1602:
ASSERT(NULL != param);
1603:
1604:
switch(ch) {
1605:
case 0:
1606: val |= (param->enable <<
AG903_SSC_TDM0_SETUP_TDM_EN_POS) &
AG903_SSC_TDM0_SETUP_TDM_EN_MSK;
1607: val |= (param->sclk_pol <<
AG903_SSC_TDM0_SETUP_SCLK_POL_POS) &
AG903_SSC_TDM0_SETUP_SCLK_POL_MSK;
1608: val |= (param->fs_pol <<
AG903_SSC_TDM0_SETUP_FS_POL_POS) &
AG903_SSC_TDM0_SETUP_FS_POL_MSK;
1609: val |= (param->fs_txpw <<
AG903_SSC_TDM0_SETUP_FS_TXPW_POS) &
AG903_SSC_TDM0_SETUP_FS_TXPW_MSK;
1610: val |= (param->fs_dist <<
AG903_SSC_TDM0_SETUP_FS_DIST_POS) &
AG903_SSC_TDM0_SETUP_FS_DIST_MSK;
1611: val |= (param->dir_tx <<
AG903_SSC_TDM0_SETUP_DIR_TX_POS) &
AG903_SSC_TDM0_SETUP_DIR_TX_MSK;
1612: val |= (param->tdm_n <<
AG903_SSC_TDM0_SETUP_TDM_N_POS) &
AG903_SSC_TDM0_SETUP_TDM_N_MSK;
1613: val |= (param->sclk_n <<
AG903_SSC_TDM0_SETUP_SCLK_N_POS) &
AG903_SSC_TDM0_SETUP_SCLK_N_MSK;
1614:
AG903_SSC->TDM0_SETUP = val;
1615:
break;
1616:
case 1:
1617: val |= (param->enable <<
AG903_SSC_TDM1_SETUP_TDM_EN_POS) &
AG903_SSC_TDM1_SETUP_TDM_EN_MSK;
1618: val |= (param->sclk_pol <<
AG903_SSC_TDM1_SETUP_SCLK_POL_POS) &
AG903_SSC_TDM1_SETUP_SCLK_POL_MSK;
1619: val |= (param->fs_pol <<
AG903_SSC_TDM1_SETUP_FS_POL_POS) &
AG903_SSC_TDM1_SETUP_FS_POL_MSK;
1620: val |= (param->fs_txpw <<
AG903_SSC_TDM1_SETUP_FS_TXPW_POS) &
AG903_SSC_TDM1_SETUP_FS_TXPW_MSK;
1621: val |= (param->fs_dist <<
AG903_SSC_TDM1_SETUP_FS_DIST_POS) &
AG903_SSC_TDM1_SETUP_FS_DIST_MSK;
1622: val |= (param->dir_tx <<
AG903_SSC_TDM1_SETUP_DIR_TX_POS) &
AG903_SSC_TDM1_SETUP_DIR_TX_MSK;
1623: val |= (param->tdm_n <<
AG903_SSC_TDM1_SETUP_TDM_N_POS) &
AG903_SSC_TDM1_SETUP_TDM_N_MSK;
1624: val |= (param->sclk_n <<
AG903_SSC_TDM1_SETUP_SCLK_N_POS) &
AG903_SSC_TDM1_SETUP_SCLK_N_MSK;
1625:
AG903_SSC->TDM1_SETUP = val;
1626:
break;
1627:
case 2:
1628: val |= (param->enable <<
AG903_SSC_TDM2_SETUP_TDM_EN_POS) &
AG903_SSC_TDM2_SETUP_TDM_EN_MSK;
1629: val |= (param->sclk_pol <<
AG903_SSC_TDM2_SETUP_SCLK_POL_POS) &
AG903_SSC_TDM2_SETUP_SCLK_POL_MSK;
1630: val |= (param->fs_pol <<
AG903_SSC_TDM2_SETUP_FS_POL_POS) &
AG903_SSC_TDM2_SETUP_FS_POL_MSK;
1631: val |= (param->fs_txpw <<
AG903_SSC_TDM2_SETUP_FS_TXPW_POS) &
AG903_SSC_TDM2_SETUP_FS_TXPW_MSK;
1632: val |= (param->fs_dist <<
AG903_SSC_TDM2_SETUP_FS_DIST_POS) &
AG903_SSC_TDM2_SETUP_FS_DIST_MSK;
1633: val |= (param->dir_tx <<
AG903_SSC_TDM2_SETUP_DIR_TX_POS) &
AG903_SSC_TDM2_SETUP_DIR_TX_MSK;
1634: val |= (param->tdm_n <<
AG903_SSC_TDM2_SETUP_TDM_N_POS) &
AG903_SSC_TDM2_SETUP_TDM_N_MSK;
1635: val |= (param->sclk_n <<
AG903_SSC_TDM2_SETUP_SCLK_N_POS) &
AG903_SSC_TDM2_SETUP_SCLK_N_MSK;
1636:
AG903_SSC->TDM2_SETUP = val;
1637:
break;
1638:
case 3:
1639: val |= (param->enable <<
AG903_SSC_TDM3_SETUP_TDM_EN_POS) &
AG903_SSC_TDM3_SETUP_TDM_EN_MSK;
1640: val |= (param->sclk_pol <<
AG903_SSC_TDM3_SETUP_SCLK_POL_POS) &
AG903_SSC_TDM3_SETUP_SCLK_POL_MSK;
1641: val |= (param->fs_pol <<
AG903_SSC_TDM3_SETUP_FS_POL_POS) &
AG903_SSC_TDM3_SETUP_FS_POL_MSK;
1642: val |= (param->fs_txpw <<
AG903_SSC_TDM3_SETUP_FS_TXPW_POS) &
AG903_SSC_TDM3_SETUP_FS_TXPW_MSK;
1643: val |= (param->fs_dist <<
AG903_SSC_TDM3_SETUP_FS_DIST_POS) &
AG903_SSC_TDM3_SETUP_FS_DIST_MSK;
1644: val |= (param->dir_tx <<
AG903_SSC_TDM3_SETUP_DIR_TX_POS) &
AG903_SSC_TDM3_SETUP_DIR_TX_MSK;
1645: val |= (param->tdm_n <<
AG903_SSC_TDM3_SETUP_TDM_N_POS) &
AG903_SSC_TDM3_SETUP_TDM_N_MSK;
1646: val |= (param->sclk_n <<
AG903_SSC_TDM3_SETUP_SCLK_N_POS) &
AG903_SSC_TDM3_SETUP_SCLK_N_MSK;
1647:
AG903_SSC->TDM3_SETUP = val;
1648:
break;
1649:
default:
1650:
1651:
break;
1652: }
1653:
1654:
return;
1655: }
1656:
1657:
1666:
void AG903_SSCPrmGetTdmSetup(uint8_t ch,
AG903_SSCPrmTdmParam* param,
AG903_SSCPrmTdmStatus* stat)
1667: {
1668: uint32_t val;
1669:
1670:
ASSERT(
AG903_SSP_CH_NUM > ch);
1671:
ASSERT(NULL != param);
1672:
ASSERT(NULL != stat);
1673:
1674:
switch(ch) {
1675:
case 0:
1676: val =
AG903_SSC->TDM0_SETUP;
1677: param->enable = (uint8_t)((val &
AG903_SSC_TDM0_SETUP_TDM_EN_MSK) >>
AG903_SSC_TDM0_SETUP_TDM_EN_POS);
1678: param->sclk_pol = (uint8_t)((val &
AG903_SSC_TDM0_SETUP_SCLK_POL_MSK) >>
AG903_SSC_TDM0_SETUP_SCLK_POL_POS);
1679: param->fs_pol = (uint8_t)((val &
AG903_SSC_TDM0_SETUP_FS_POL_MSK) >>
AG903_SSC_TDM0_SETUP_FS_POL_POS);
1680: param->fs_txpw = (uint8_t)((val &
AG903_SSC_TDM0_SETUP_FS_TXPW_MSK) >>
AG903_SSC_TDM0_SETUP_FS_TXPW_POS);
1681: param->fs_dist = (uint8_t)((val &
AG903_SSC_TDM0_SETUP_FS_DIST_MSK) >>
AG903_SSC_TDM0_SETUP_FS_DIST_POS);
1682: param->dir_tx = (uint8_t)((val &
AG903_SSC_TDM0_SETUP_DIR_TX_MSK) >>
AG903_SSC_TDM0_SETUP_DIR_TX_POS);
1683: param->tdm_n = (uint8_t)((val &
AG903_SSC_TDM0_SETUP_TDM_N_MSK) >>
AG903_SSC_TDM0_SETUP_TDM_N_POS);
1684: param->sclk_n = (uint8_t)((val &
AG903_SSC_TDM0_SETUP_SCLK_N_MSK) >>
AG903_SSC_TDM0_SETUP_SCLK_N_POS);
1685: stat->rx_err = (uint8_t)((val &
AG903_SSC_TDM0_SETUP_FS_RXERR_MSK) >>
AG903_SSC_TDM0_SETUP_FS_RXERR_POS);
1686: stat->tx_stat = (uint8_t)((val &
AG903_SSC_TDM0_SETUP_ST_TX_MSK) >>
AG903_SSC_TDM0_SETUP_ST_TX_POS);
1687: stat->rx_stat = (uint8_t)((val &
AG903_SSC_TDM0_SETUP_ST_RX_MSK) >>
AG903_SSC_TDM0_SETUP_ST_RX_POS);
1688:
break;
1689:
case 1:
1690: val =
AG903_SSC->TDM1_SETUP;
1691: param->enable = (uint8_t)((val &
AG903_SSC_TDM1_SETUP_TDM_EN_MSK) >>
AG903_SSC_TDM1_SETUP_TDM_EN_POS);
1692: param->sclk_pol = (uint8_t)((val &
AG903_SSC_TDM1_SETUP_SCLK_POL_MSK) >>
AG903_SSC_TDM1_SETUP_SCLK_POL_POS);
1693: param->fs_pol = (uint8_t)((val &
AG903_SSC_TDM1_SETUP_FS_POL_MSK) >>
AG903_SSC_TDM1_SETUP_FS_POL_POS);
1694: param->fs_txpw = (uint8_t)((val &
AG903_SSC_TDM1_SETUP_FS_TXPW_MSK) >>
AG903_SSC_TDM1_SETUP_FS_TXPW_POS);
1695: param->fs_dist = (uint8_t)((val &
AG903_SSC_TDM1_SETUP_FS_DIST_MSK) >>
AG903_SSC_TDM1_SETUP_FS_DIST_POS);
1696: param->dir_tx = (uint8_t)((val &
AG903_SSC_TDM1_SETUP_DIR_TX_MSK) >>
AG903_SSC_TDM1_SETUP_DIR_TX_POS);
1697: param->tdm_n = (uint8_t)((val &
AG903_SSC_TDM1_SETUP_TDM_N_MSK) >>
AG903_SSC_TDM1_SETUP_TDM_N_POS);
1698: param->sclk_n = (uint8_t)((val &
AG903_SSC_TDM1_SETUP_SCLK_N_MSK) >>
AG903_SSC_TDM1_SETUP_SCLK_N_POS);
1699: stat->rx_err = (uint8_t)((val &
AG903_SSC_TDM1_SETUP_FS_RXERR_MSK) >>
AG903_SSC_TDM1_SETUP_FS_RXERR_POS);
1700: stat->tx_stat = (uint8_t)((val &
AG903_SSC_TDM1_SETUP_ST_TX_MSK) >>
AG903_SSC_TDM1_SETUP_ST_TX_POS);
1701: stat->rx_stat = (uint8_t)((val &
AG903_SSC_TDM1_SETUP_ST_RX_MSK) >>
AG903_SSC_TDM1_SETUP_ST_RX_POS);
1702:
break;
1703:
case 2:
1704: val =
AG903_SSC->TDM2_SETUP;
1705: param->enable = (uint8_t)((val &
AG903_SSC_TDM2_SETUP_TDM_EN_MSK) >>
AG903_SSC_TDM2_SETUP_TDM_EN_POS);
1706: param->sclk_pol = (uint8_t)((val &
AG903_SSC_TDM2_SETUP_SCLK_POL_MSK) >>
AG903_SSC_TDM2_SETUP_SCLK_POL_POS);
1707: param->fs_pol = (uint8_t)((val &
AG903_SSC_TDM2_SETUP_FS_POL_MSK) >>
AG903_SSC_TDM2_SETUP_FS_POL_POS);
1708: param->fs_txpw = (uint8_t)((val &
AG903_SSC_TDM2_SETUP_FS_TXPW_MSK) >>
AG903_SSC_TDM2_SETUP_FS_TXPW_POS);
1709: param->fs_dist = (uint8_t)((val &
AG903_SSC_TDM2_SETUP_FS_DIST_MSK) >>
AG903_SSC_TDM2_SETUP_FS_DIST_POS);
1710: param->dir_tx = (uint8_t)((val &
AG903_SSC_TDM2_SETUP_DIR_TX_MSK) >>
AG903_SSC_TDM2_SETUP_DIR_TX_POS);
1711: param->tdm_n = (uint8_t)((val &
AG903_SSC_TDM2_SETUP_TDM_N_MSK) >>
AG903_SSC_TDM2_SETUP_TDM_N_POS);
1712: param->sclk_n = (uint8_t)((val &
AG903_SSC_TDM2_SETUP_SCLK_N_MSK) >>
AG903_SSC_TDM2_SETUP_SCLK_N_POS);
1713: stat->rx_err = (uint8_t)((val &
AG903_SSC_TDM2_SETUP_FS_RXERR_MSK) >>
AG903_SSC_TDM2_SETUP_FS_RXERR_POS);
1714: stat->tx_stat = (uint8_t)((val &
AG903_SSC_TDM2_SETUP_ST_TX_MSK) >>
AG903_SSC_TDM2_SETUP_ST_TX_POS);
1715: stat->rx_stat = (uint8_t)((val &
AG903_SSC_TDM2_SETUP_ST_RX_MSK) >>
AG903_SSC_TDM2_SETUP_ST_RX_POS);
1716:
break;
1717:
case 3:
1718: val =
AG903_SSC->TDM3_SETUP;
1719: param->enable = (uint8_t)((val &
AG903_SSC_TDM3_SETUP_TDM_EN_MSK) >>
AG903_SSC_TDM3_SETUP_TDM_EN_POS);
1720: param->sclk_pol = (uint8_t)((val &
AG903_SSC_TDM3_SETUP_SCLK_POL_MSK) >>
AG903_SSC_TDM3_SETUP_SCLK_POL_POS);
1721: param->fs_pol = (uint8_t)((val &
AG903_SSC_TDM3_SETUP_FS_POL_MSK) >>
AG903_SSC_TDM3_SETUP_FS_POL_POS);
1722: param->fs_txpw = (uint8_t)((val &
AG903_SSC_TDM3_SETUP_FS_TXPW_MSK) >>
AG903_SSC_TDM3_SETUP_FS_TXPW_POS);
1723: param->fs_dist = (uint8_t)((val &
AG903_SSC_TDM3_SETUP_FS_DIST_MSK) >>
AG903_SSC_TDM3_SETUP_FS_DIST_POS);
1724: param->dir_tx = (uint8_t)((val &
AG903_SSC_TDM3_SETUP_DIR_TX_MSK) >>
AG903_SSC_TDM3_SETUP_DIR_TX_POS);
1725: param->tdm_n = (uint8_t)((val &
AG903_SSC_TDM3_SETUP_TDM_N_MSK) >>
AG903_SSC_TDM3_SETUP_TDM_N_POS);
1726: param->sclk_n = (uint8_t)((val &
AG903_SSC_TDM3_SETUP_SCLK_N_MSK) >>
AG903_SSC_TDM3_SETUP_SCLK_N_POS);
1727: stat->rx_err = (uint8_t)((val &
AG903_SSC_TDM3_SETUP_FS_RXERR_MSK) >>
AG903_SSC_TDM3_SETUP_FS_RXERR_POS);
1728: stat->tx_stat = (uint8_t)((val &
AG903_SSC_TDM3_SETUP_ST_TX_MSK) >>
AG903_SSC_TDM3_SETUP_ST_TX_POS);
1729: stat->rx_stat = (uint8_t)((val &
AG903_SSC_TDM3_SETUP_ST_RX_MSK) >>
AG903_SSC_TDM3_SETUP_ST_RX_POS);
1730:
break;
1731:
default:
1732:
1733:
break;
1734: }
1735:
1736:
return;
1737: }
1738:
1739:
1747:
void AG903_SSCPrmSetUsbPowerSetup(uint8_t mode, uint8_t int_ena, uint8_t prtct_ena)
1748: {
1749: uint32_t val = 0;
1750:
1751:
if(
AG903_SSC_USBMODE_DEVICE == mode) {
1752: val |= (1 <<
AG903_SSC_USB_POWER_SETUP_PWR_MODE_POS);
1753: }
1754:
if(
true == int_ena) {
1755: val |= (1 <<
AG903_SSC_USB_POWER_SETUP_PWR_INT_EN_POS);
1756: }
1757:
if(
true == prtct_ena) {
1758: val |= (1 <<
AG903_SSC_USB_POWER_SETUP_PWR_PROT_EN_POS);
1759: }
1760:
AG903_SSC->USB_POWER_SETUP = val;
1761:
1762:
return;
1763:
1764: }
1765:
1766:
1774:
void AG903_SSCPrmGetUsbPowerSetup(uint8_t* mode, uint8_t* int_ena, uint8_t* prtct_ena)
1775: {
1776: uint32_t val;
1777:
1778:
ASSERT(NULL != mode);
1779:
ASSERT(NULL != int_ena);
1780:
ASSERT(NULL != prtct_ena);
1781:
1782: val =
AG903_SSC->USB_POWER_SETUP;
1783:
if(
AG903_SSC_USB_POWER_SETUP_PWR_MODE_MSK & val) {
1784: (*mode) =
AG903_SSC_USBMODE_DEVICE;
1785: }
1786:
else {
1787: (*mode) =
AG903_SSC_USBMODE_HOST;
1788: }
1789:
if(
AG903_SSC_USB_POWER_SETUP_PWR_INT_EN_MSK & val) {
1790: (*int_ena) =
true;
1791: }
1792:
else {
1793: (*int_ena) =
false;
1794: }
1795:
if(
AG903_SSC_USB_POWER_SETUP_PWR_PROT_EN_MSK & val) {
1796: (*prtct_ena) =
true;
1797: }
1798:
else {
1799: (*prtct_ena) =
false;
1800: }
1801:
1802:
return;
1803: }
1804:
1805:
1813:
void AG903_SSCPrmGetUsbPowerStatus(uint8_t* vbus_lv, uint8_t* prtct_lv, uint8_t* prtct_stat)
1814: {
1815: uint32_t val;
1816:
1817:
ASSERT(NULL != vbus_lv);
1818:
ASSERT(NULL != prtct_lv);
1819:
ASSERT(NULL != prtct_stat);
1820:
1821: val =
AG903_SSC->USB_POWER_STATUS;
1822: (*vbus_lv) = (uint8_t)((val &
AG903_SSC_USB_POWER_STATUS_VBUS_PIN_MSK) >>
AG903_SSC_USB_POWER_STATUS_VBUS_PIN_POS);
1823: (*prtct_lv) = (uint8_t)((val &
AG903_SSC_USB_POWER_STATUS_PWR_PROT_PIN_MSK) >>
AG903_SSC_USB_POWER_STATUS_PWR_PROT_PIN_POS);
1824: (*prtct_stat) = (uint8_t)((val &
AG903_SSC_USB_POWER_STATUS_PWR_PROT_STATE_MSK) >>
AG903_SSC_USB_POWER_STATUS_PWR_PROT_STATE_POS);
1825:
1826:
return;
1827: }
1828:
1829:
1835:
void AG903_SSCPrmClrUsbPowerStatus(
void)
1836: {
1837:
AG903_SSC->USB_POWER_CLEAR = (1 <<
AG903_SSC_USB_POWER_CLEAR_PWR_PROT_CLR_POS);
1838:
return;
1839: }
1840:
1841:
1848:
void AG903_SSCPrmSetSdPowerSetup(uint8_t int_ena, uint8_t prtct_ena)
1849: {
1850: uint32_t val = 0;
1851:
1852:
if(
true == int_ena) {
1853: val |= (1 <<
AG903_SSC_SD_POWER_SETUP_PWR_INT_EN_POS);
1854: }
1855:
if(
true == prtct_ena) {
1856: val |= (1 <<
AG903_SSC_SD_POWER_SETUP_PWR_PROT_EN_POS);
1857: }
1858:
AG903_SSC->SD_POWER_SETUP = val;
1859:
1860:
return;
1861: }
1862:
1863:
1870:
void AG903_SSCPrmGetSdPowerSetup(uint8_t* int_ena, uint8_t* prtct_ena)
1871: {
1872: uint32_t val;
1873:
1874:
ASSERT(NULL != int_ena);
1875:
ASSERT(NULL != prtct_ena);
1876:
1877: val =
AG903_SSC->SD_POWER_SETUP;
1878:
if(
AG903_SSC_SD_POWER_SETUP_PWR_INT_EN_MSK & val) {
1879: (*int_ena) =
true;
1880: }
1881:
else {
1882: (*int_ena) =
false;
1883: }
1884:
if(
AG903_SSC_SD_POWER_SETUP_PWR_PROT_EN_MSK & val) {
1885: (*prtct_ena) =
true;
1886: }
1887:
else {
1888: (*prtct_ena) =
false;
1889: }
1890:
1891:
return;
1892: }
1893:
1894:
1901:
void AG903_SSCPrmGetSdPowerStatus(uint8_t* prtct_lv, uint8_t* prtct_stat)
1902: {
1903: uint32_t val = 0;
1904:
1905:
ASSERT(NULL != prtct_lv);
1906:
ASSERT(NULL != prtct_stat);
1907:
1908: val =
AG903_SSC->SD_POWER_STATUS;
1909: (*prtct_lv) = (uint8_t)((val &
AG903_SSC_SD_POWER_STATUS_PWR_PROT_PIN_MSK) >>
AG903_SSC_SD_POWER_STATUS_PWR_PROT_PIN_POS);
1910: (*prtct_stat) = (uint8_t)((val &
AG903_SSC_SD_POWER_STATUS_PWR_PROT_STATE_MSK) >>
AG903_SSC_SD_POWER_STATUS_PWR_PROT_STATE_POS);
1911:
1912:
return;
1913: }
1914:
1915:
1921:
void AG903_SSCPrmClrSdPowerStatus(
void)
1922: {
1923:
AG903_SSC->SD_POWER_CLEAR = (1 <<
AG903_SSC_SD_POWER_CLEAR_PWR_PROT_CLR_POS);
1924:
return;
1925: }
1926:
1927:
1934:
void AG903_SSCPrmSetVideoAdcSetup(
AG903_SSCPrmVideoAdcParam* param)
1935: {
1936: uint32_t val = 0;
1937:
1938:
ASSERT(NULL != param);
1939:
1940: val |= (param->acq_clr <<
AG903_SSC_VIDEOADC_SETUP_ACQCLR_POS) &
AG903_SSC_VIDEOADC_SETUP_ACQCLR_MSK;
1941: val |= (param->acq_en <<
AG903_SSC_VIDEOADC_SETUP_ACQEN_POS) &
AG903_SSC_VIDEOADC_SETUP_ACQEN_MSK;
1942: val |= (param->dat_en <<
AG903_SSC_VIDEOADC_SETUP_DATEN_POS) &
AG903_SSC_VIDEOADC_SETUP_DATEN_MSK;
1943: val |= (param->clmp_tmg <<
AG903_SSC_VIDEOADC_SETUP_CTHO_POS) &
AG903_SSC_VIDEOADC_SETUP_CTHO_MSK;
1944: val |= (param->clmp_lv <<
AG903_SSC_VIDEOADC_SETUP_CLHO_POS) &
AG903_SSC_VIDEOADC_SETUP_CLHO_MSK;
1945: val |= (param->pga_ctl <<
AG903_SSC_VIDEOADC_SETUP_GHO_POS) &
AG903_SSC_VIDEOADC_SETUP_GHO_MSK;
1946:
AG903_SSC->VIDEOADC_SETUP = val;
1947:
1948:
return;
1949: }
1950:
1951:
1958:
void AG903_SSCPrmGetVideoAdcSetup(
AG903_SSCPrmVideoAdcParam* param)
1959: {
1960: uint32_t val;
1961:
1962:
ASSERT(NULL != param);
1963:
1964: val =
AG903_SSC->VIDEOADC_SETUP;
1965: param->acq_clr = (uint8_t)((val &
AG903_SSC_VIDEOADC_SETUP_ACQCLR_MSK) >>
AG903_SSC_VIDEOADC_SETUP_ACQCLR_POS);
1966: param->acq_en = (uint8_t)((val &
AG903_SSC_VIDEOADC_SETUP_ACQEN_MSK) >>
AG903_SSC_VIDEOADC_SETUP_ACQEN_POS);
1967: param->dat_en = (uint8_t)((val &
AG903_SSC_VIDEOADC_SETUP_DATEN_MSK) >>
AG903_SSC_VIDEOADC_SETUP_DATEN_POS);
1968: param->clmp_tmg = (uint8_t)((val &
AG903_SSC_VIDEOADC_SETUP_CTHO_MSK) >>
AG903_SSC_VIDEOADC_SETUP_CTHO_POS);
1969: param->clmp_lv = (uint8_t)((val &
AG903_SSC_VIDEOADC_SETUP_CLHO_MSK) >>
AG903_SSC_VIDEOADC_SETUP_CLHO_POS);
1970: param->pga_ctl = (uint8_t)((val &
AG903_SSC_VIDEOADC_SETUP_GHO_MSK) >>
AG903_SSC_VIDEOADC_SETUP_GHO_POS);
1971:
1972:
return;
1973: }
1974:
1975:
1983:
void AG903_SSCPrmWriteCmpstVideoDec(uint8_t ch, uint16_t reg, uint16_t data)
1984: {
1985: uint32_t val = 0;
1986:
1987:
ASSERT(
AG903_SSC_CVBSDEC_CH_NUM > ch);
1988:
1989: val |= (ch <<
AG903_SSC_CVBSDEC_ADDR_CH_POS) &
AG903_SSC_CVBSDEC_ADDR_CH_MSK;
1990: val |= (reg <<
AG903_SSC_CVBSDEC_ADDR_ADDR_POS) &
AG903_SSC_CVBSDEC_ADDR_ADDR_MSK;
1991:
AG903_SSC->CVBSDEC_ADDR = val;
1992:
1993:
AG903_SSC->CVBSDEC_DATA = (uint32_t)(data &
AG903_SSC_CVBSDEC_DATA_DATA_MSK);
1994:
1995:
return;
1996: }
1997:
1998:
2006:
void AG903_SSCPrmReadCmpstVideoDec(uint8_t ch, uint16_t reg, uint16_t* data)
2007: {
2008: uint32_t val = 0;
2009:
2010:
ASSERT(
AG903_SSC_CVBSDEC_CH_NUM > ch);
2011:
ASSERT(NULL != data);
2012:
2013: val |= (ch <<
AG903_SSC_CVBSDEC_ADDR_CH_POS) &
AG903_SSC_CVBSDEC_ADDR_CH_MSK;
2014: val |= (reg <<
AG903_SSC_CVBSDEC_ADDR_ADDR_POS) &
AG903_SSC_CVBSDEC_ADDR_ADDR_MSK;
2015:
AG903_SSC->CVBSDEC_ADDR = val;
2016:
2017: val =
AG903_SSC->CVBSDEC_DATA;
2018: (*data) = (uint16_t)((val &
AG903_SSC_CVBSDEC_DATA_DATA_MSK) >>
AG903_SSC_CVBSDEC_DATA_DATA_POS);
2019:
2020:
return;
2021: }
2022:
2023:
2031:
void AG903_SSCPrmGetVideoAdcMaxMin(uint8_t ch, uint16_t* max, uint16_t* min)
2032: {
2033: uint32_t val;
2034:
2035:
ASSERT(
AG903_SSC_CVBSDEC_CH_NUM > ch);
2036:
ASSERT(NULL != max);
2037:
ASSERT(NULL != min);
2038:
2039: val =
AG903_SSC->VIDEOADC_MAXMIN[ch];
2040: (*max) = (uint16_t)((val &
AG903_SSC_VIDEOADC_MAXMIN_MAX_MSK) >>
AG903_SSC_VIDEOADC_MAXMIN_MAX_POS);
2041: (*min) = (uint16_t)((val &
AG903_SSC_VIDEOADC_MAXMIN_MIN_MSK) >>
AG903_SSC_VIDEOADC_MAXMIN_MIN_POS);
2042:
2043:
return;
2044: }
2045:
2046:
2052:
void AG903_SSCPrmGetSgiStatus(uint32_t* stat)
2053: {
2054:
ASSERT(NULL != stat);
2055: (*stat) =
AG903_SSC->SGI_STATUS;
2056:
return;
2057: }
2058:
2059:
2066:
void AG903_SSCPrmSetSgi(uint32_t set)
2067: {
2068:
AG903_SSC->SGI_SET = set;
2069:
return;
2070: }
2071:
2072:
2079:
void AG903_SSCPrmClrSgi(uint32_t clr)
2080: {
2081:
AG903_SSC->SGI_CLEAR = clr;
2082:
return;
2083: }
2084:
2085:
2091:
void AG903_SSCPrmSetCpuJumpAddr(uint32_t addr)
2092: {
2093:
AG903_SSC->CA5_JUMPADDR = addr;
2094:
return;
2095: }
2096:
2097:
2103:
void AG903_SSCPrmGetCpuJumpAddr(uint32_t* addr)
2104: {
2105:
ASSERT(NULL != addr);
2106: (*addr) =
AG903_SSC->CA5_JUMPADDR;
2107:
return;
2108: }
2109:
2110:
2117:
void AG903_SSCPrmSetFreeRunCnt(uint32_t upper, uint32_t lower)
2118: {
2119:
AG903_SSC->COUNT64_LOWER = lower;
2120:
AG903_SSC->COUNT64_UPPER = upper;
2121:
return;
2122: }
2123:
2124:
2131:
void AG903_SSCPrmGetFreeRunCnt(uint32_t* upper, uint32_t* lower)
2132: {
2133: (*lower) =
AG903_SSC->COUNT64_LOWER;
2134: (*upper) =
AG903_SSC->COUNT64_UPPER;
2135:
return;
2136: }