AG903ライブラリリファレンス
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AG903_cfcreg.h
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1: 8: 9: 13: 14:
#ifndef
_AG903_CFC_REGMAP_H_ 15:
#define
_AG903_CFC_REGMAP_H_ 16: 17: 18:
#include
"AG903_regmap.h" 19: 20:
#ifndef
__I
21: 22:
#define
__I
volatile
const
23:
#endif
24:
#ifndef
__O
25: 26:
#define
__O
volatile
27:
#endif
28:
#ifndef
__IO
29: 30:
#define
__IO
volatile
31:
#endif
32: 33: 34:
typedef
struct
{ 35: 36:
union
{ 37:
__IO
uint32_t Host_Status; 38: 39:
struct
{ 40:
__I
uint32_t IREQ : 1; 41:
__I
uint32_t CD : 1; 42:
__I
uint32_t VS1 : 1; 43:
__I
uint32_t VS2 : 1; 44:
__I
uint32_t STSCHG : 1; 45:
__I
uint32_t SPKR : 1; 46: uint32_t : 2; 47:
__I
uint32_t buffer_active : 1; 48:
__I
uint32_t buffer_data_ready : 1; 49:
__I
uint32_t cfc_int_data_cmp_r : 1; 50: uint32_t : 1; 51:
__I
uint32_t buffer_size : 4; 52:
__IO
uint32_t cfc_int_cd_r : 1; 53:
__IO
uint32_t cfc_io_int_r : 1; 54: } Host_Status_bits; 55: }; 56: 57:
union
{ 58:
__IO
uint32_t Host_Control; 59: 60:
struct
{ 61:
__IO
uint32_t Power_Control : 4; 62:
__IO
uint32_t Float_Control : 1; 63:
__IO
uint32_t Reset : 1; 64:
__IO
uint32_t Mode_8bit : 1; 65: uint32_t : 1; 66:
__IO
uint32_t Mode_DMA : 1; 67:
__IO
uint32_t card_detect_int_mask : 1; 68:
__IO
uint32_t cfc_int_data_cmp_mask : 1; 69:
__IO
uint32_t cfc_io_int_mask : 1; 70: } Host_Control_bits; 71: }; 72: 73:
union
{ 74:
__IO
uint32_t Access_Timing; 75: 76:
struct
{ 77:
__IO
uint32_t BSA : 4; 78:
__IO
uint32_t BSM : 4; 79:
__IO
uint32_t BSIO : 4; 80:
__IO
uint32_t BSMOW : 2; 81:
__IO
uint32_t BSIORW : 2; 82: } Access_Timing_bits; 83: }; 84: 85:
union
{ 86:
__IO
uint32_t Active_Buffer_Controller; 87: 88:
struct
{ 89:
__IO
uint32_t ADR : 11; 90: uint32_t : 1; 91:
__IO
uint32_t TYPE : 2; 92:
__IO
uint32_t INCADR : 1; 93:
__IO
uint32_t RW : 1; 94:
__IO
uint32_t SIZE : 4; 95: } Active_Buffer_Controller_bits; 96: }; 97: 98:
union
{ 99:
__IO
uint32_t Active_Buffer_Data; 100: }; 101: 102:
union
{ 103:
__IO
uint32_t Multi_Sector; 104: 105:
struct
{ 106:
__IO
uint32_t Enable : 1; 107:
__IO
uint32_t Timeup : 7; 108: } Multi_Sector_bits; 109: }; 110: 111:
union
{ 112:
__IO
uint32_t Mode2_Enable; 113: 114:
struct
{ 115:
__IO
uint32_t Enable : 1; 116: } Mode2_Enable_bits; 117: }; 118: 119:
union
{ 120:
__IO
uint32_t Mode2_Counter; 121: 122:
struct
{ 123:
__IO
uint32_t Cnt : 17; 124: } Mode2_Counter_bits; 125: }; 126: 127:
__I
uint32_t RESERVED1[4]; 128: 129:
union
{ 130:
__I
uint32_t REVISION; 131: }; 132: 133:
union
{ 134:
__I
uint32_t FEATURE; 135: 136:
struct
{ 137:
__I
uint32_t BUFSIZE : 4; 138:
__I
uint32_t SBI : 1; 139: } FEATURE_bits; 140: }; 141: 142: 143: }
AG903_CFC_Type
; 144: 145:
#define
AG903_CFC
((
volatile
AG903_CFC_Type
*)
AG903_CFC_BASE
) 146: 147: 148:
#define
AG903_CFC_Host_Status_IREQ_POS
0 149:
#define
AG903_CFC_Host_Status_IREQ_MSK
(0x1UL <<
AG903_CFC_Host_Status_IREQ_POS
) 150:
#define
AG903_CFC_Host_Status_CD_POS
1 151:
#define
AG903_CFC_Host_Status_CD_MSK
(0x1UL <<
AG903_CFC_Host_Status_CD_POS
) 152:
#define
AG903_CFC_Host_Status_VS1_POS
2 153:
#define
AG903_CFC_Host_Status_VS1_MSK
(0x1UL <<
AG903_CFC_Host_Status_VS1_POS
) 154:
#define
AG903_CFC_Host_Status_VS2_POS
3 155:
#define
AG903_CFC_Host_Status_VS2_MSK
(0x1UL <<
AG903_CFC_Host_Status_VS2_POS
) 156:
#define
AG903_CFC_Host_Status_STSCHG_POS
4 157:
#define
AG903_CFC_Host_Status_STSCHG_MSK
(0x1UL <<
AG903_CFC_Host_Status_STSCHG_POS
) 158:
#define
AG903_CFC_Host_Status_SPKR_POS
5 159:
#define
AG903_CFC_Host_Status_SPKR_MSK
(0x1UL <<
AG903_CFC_Host_Status_SPKR_POS
) 160:
#define
AG903_CFC_Host_Status_buffer_active_POS
8 161:
#define
AG903_CFC_Host_Status_buffer_active_MSK
(0x1UL <<
AG903_CFC_Host_Status_buffer_active_POS
) 162:
#define
AG903_CFC_Host_Status_buffer_data_ready_POS
9 163:
#define
AG903_CFC_Host_Status_buffer_data_ready_MSK
(0x1UL <<
AG903_CFC_Host_Status_buffer_data_ready_POS
) 164:
#define
AG903_CFC_Host_Status_cfc_int_data_cmp_r_POS
10 165:
#define
AG903_CFC_Host_Status_cfc_int_data_cmp_r_MSK
(0x1UL <<
AG903_CFC_Host_Status_cfc_int_data_cmp_r_POS
) 166:
#define
AG903_CFC_Host_Status_buffer_size_POS
12 167:
#define
AG903_CFC_Host_Status_buffer_size_MSK
(0xfUL <<
AG903_CFC_Host_Status_buffer_size_POS
) 168:
#define
AG903_CFC_Host_Status_cfc_int_cd_r_POS
16 169:
#define
AG903_CFC_Host_Status_cfc_int_cd_r_MSK
(0x1UL <<
AG903_CFC_Host_Status_cfc_int_cd_r_POS
) 170:
#define
AG903_CFC_Host_Status_cfc_io_int_r_POS
17 171:
#define
AG903_CFC_Host_Status_cfc_io_int_r_MSK
(0x1UL <<
AG903_CFC_Host_Status_cfc_io_int_r_POS
) 172: 173:
#define
AG903_CFC_Host_Control_Power_Control_POS
0 174:
#define
AG903_CFC_Host_Control_Power_Control_MSK
(0xfUL <<
AG903_CFC_Host_Control_Power_Control_POS
) 175:
#define
AG903_CFC_Host_Control_Float_Control_POS
4 176:
#define
AG903_CFC_Host_Control_Float_Control_MSK
(0x1UL <<
AG903_CFC_Host_Control_Float_Control_POS
) 177:
#define
AG903_CFC_Host_Control_Reset_POS
5 178:
#define
AG903_CFC_Host_Control_Reset_MSK
(0x1UL <<
AG903_CFC_Host_Control_Reset_POS
) 179:
#define
AG903_CFC_Host_Control_Mode_8bit_POS
6 180:
#define
AG903_CFC_Host_Control_Mode_8bit_MSK
(0x1UL <<
AG903_CFC_Host_Control_Mode_8bit_POS
) 181:
#define
AG903_CFC_Host_Control_Mode_DMA_POS
8 182:
#define
AG903_CFC_Host_Control_Mode_DMA_MSK
(0x1UL <<
AG903_CFC_Host_Control_Mode_DMA_POS
) 183:
#define
AG903_CFC_Host_Control_card_detect_int_mask_POS
9 184:
#define
AG903_CFC_Host_Control_card_detect_int_mask_MSK
(0x1UL <<
AG903_CFC_Host_Control_card_detect_int_mask_POS
) 185:
#define
AG903_CFC_Host_Control_cfc_int_data_cmp_mask_POS
10 186:
#define
AG903_CFC_Host_Control_cfc_int_data_cmp_mask_MSK
(0x1UL <<
AG903_CFC_Host_Control_cfc_int_data_cmp_mask_POS
) 187:
#define
AG903_CFC_Host_Control_cfc_io_int_mask_POS
11 188:
#define
AG903_CFC_Host_Control_cfc_io_int_mask_MSK
(0x1UL <<
AG903_CFC_Host_Control_cfc_io_int_mask_POS
) 189: 190:
#define
AG903_CFC_Access_Timing_BSA_POS
0 191:
#define
AG903_CFC_Access_Timing_BSA_MSK
(0xfUL <<
AG903_CFC_Access_Timing_BSA_POS
) 192:
#define
AG903_CFC_Access_Timing_BSM_POS
4 193:
#define
AG903_CFC_Access_Timing_BSM_MSK
(0xfUL <<
AG903_CFC_Access_Timing_BSM_POS
) 194:
#define
AG903_CFC_Access_Timing_BSIO_POS
8 195:
#define
AG903_CFC_Access_Timing_BSIO_MSK
(0xfUL <<
AG903_CFC_Access_Timing_BSIO_POS
) 196:
#define
AG903_CFC_Access_Timing_BSMOW_POS
12 197:
#define
AG903_CFC_Access_Timing_BSMOW_MSK
(0x3UL <<
AG903_CFC_Access_Timing_BSMOW_POS
) 198:
#define
AG903_CFC_Access_Timing_BSIORW_POS
14 199:
#define
AG903_CFC_Access_Timing_BSIORW_MSK
(0x3UL <<
AG903_CFC_Access_Timing_BSIORW_POS
) 200: 201:
#define
AG903_CFC_Active_Buffer_Controller_ADR_POS
0 202:
#define
AG903_CFC_Active_Buffer_Controller_ADR_MSK
(0x7ffUL <<
AG903_CFC_Active_Buffer_Controller_ADR_POS
) 203:
#define
AG903_CFC_Active_Buffer_Controller_TYPE_POS
12 204:
#define
AG903_CFC_Active_Buffer_Controller_TYPE_MSK
(0x3UL <<
AG903_CFC_Active_Buffer_Controller_TYPE_POS
) 205:
#define
AG903_CFC_Active_Buffer_Controller_INCADR_POS
14 206:
#define
AG903_CFC_Active_Buffer_Controller_INCADR_MSK
(0x1UL <<
AG903_CFC_Active_Buffer_Controller_INCADR_POS
) 207:
#define
AG903_CFC_Active_Buffer_Controller_RW_POS
15 208:
#define
AG903_CFC_Active_Buffer_Controller_RW_MSK
(0x1UL <<
AG903_CFC_Active_Buffer_Controller_RW_POS
) 209:
#define
AG903_CFC_Active_Buffer_Controller_SIZE_POS
16 210:
#define
AG903_CFC_Active_Buffer_Controller_SIZE_MSK
(0xfUL <<
AG903_CFC_Active_Buffer_Controller_SIZE_POS
) 211: 212:
#define
AG903_CFC_Active_Buffer_Data_Data_POS
0 213:
#define
AG903_CFC_Active_Buffer_Data_Data_MSK
(0xffffffffUL <<
AG903_CFC_Active_Buffer_Data_Data_POS
) 214: 215:
#define
AG903_CFC_Multi_Sector_Enable_POS
0 216:
#define
AG903_CFC_Multi_Sector_Enable_MSK
(0x1UL <<
AG903_CFC_Multi_Sector_Enable_POS
) 217:
#define
AG903_CFC_Multi_Sector_Timeup_POS
1 218:
#define
AG903_CFC_Multi_Sector_Timeup_MSK
(0x7fUL <<
AG903_CFC_Multi_Sector_Timeup_POS
) 219: 220:
#define
AG903_CFC_Mode2_Enable_Enable_POS
0 221:
#define
AG903_CFC_Mode2_Enable_Enable_MSK
(0x1UL <<
AG903_CFC_Mode2_Enable_Enable_POS
) 222: 223:
#define
AG903_CFC_Mode2_Counter_Cnt_POS
0 224:
#define
AG903_CFC_Mode2_Counter_Cnt_MSK
(0x1ffffUL <<
AG903_CFC_Mode2_Counter_Cnt_POS
) 225: 226:
#define
AG903_CFC_REVISION_REVISION_POS
0 227:
#define
AG903_CFC_REVISION_REVISION_MSK
(0xffffffffUL <<
AG903_CFC_REVISION_REVISION_POS
) 228: 229:
#define
AG903_CFC_FEATURE_BUFSIZE_POS
0 230:
#define
AG903_CFC_FEATURE_BUFSIZE_MSK
(0xfUL <<
AG903_CFC_FEATURE_BUFSIZE_POS
) 231:
#define
AG903_CFC_FEATURE_SBI_POS
4 232:
#define
AG903_CFC_FEATURE_SBI_MSK
(0x1UL <<
AG903_CFC_FEATURE_SBI_POS
) 233: 234:
#endif
235:
Copyright (c) 2017-2025 Axell Corporation. All rights reserved.
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