AG903ライブラリリファレンス
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AG903_spcreg.h マクロ
マクロ
名前 
説明 
SPC Base Address 
SPCAHB_CLK_CTRL HCLK_EN-bit mask 
SPCAHB_CLK_CTRL HCLK_EN-bit position 
SPCAPB_CLK_CTRL PCLK_EN-bit mask 
SPCAPB_CLK_CTRL PCLK_EN-bit position 
SPCAPB_SDMC_CLK_CTRL PCLK_EN-bit mask 
SPCAPB_SDMC_CLK_CTRL PCLK_EN-bit position 
SPCAPB_SDMC_CLK_CTRL SDMCCLK_EN-bit mask 
SPCAPB_SDMC_CLK_CTRL SDMCCLK_EN-bit position 
SPCAXI_CLK_CTRL1 ACLK_EN1-bit mask 
SPCAXI_CLK_CTRL1 ACLK_EN1-bit position 
SPCAXI_CLK_CTRL2 ACLK_EN2-bit mask 
SPCAXI_CLK_CTRL2 ACLK_EN2-bit position 
SPCBOOT_SWAP_CTRL BOOTSWAP-bit mask 
SPCBOOT_SWAP_CTRL BOOTSWAP-bit position 
SPCBOOTUP_STATUS HWR-bit mask 
SPCBOOTUP_STATUS HWR-bit position 
SPCBOOTUP_STATUS PWR-bit mask 
SPCBOOTUP_STATUS PWR-bit position 
SPCBOOTUP_STATUS WDR-bit mask 
SPCBOOTUP_STATUS WDR-bit position 
SPCCA5_MISC_CTRL1 dbgen-bit mask 
SPCCA5_MISC_CTRL1 dbgen-bit position 
SPCCA5_MISC_CTRL1 dbgrestart-bit mask 
SPCCA5_MISC_CTRL1 dbgrestart-bit position 
SPCCA5_MISC_CTRL1 dbgromaddrv-bit mask 
SPCCA5_MISC_CTRL1 dbgromaddrv-bit position 
SPCCA5_MISC_CTRL1 dbgselfaddrv-bit mask 
SPCCA5_MISC_CTRL1 dbgselfaddrv-bit position 
SPCCA5_MISC_CTRL10 eventi-bit mask 
SPCCA5_MISC_CTRL10 eventi-bit position 
SPCCA5_MISC_CTRL10 maxextin-bit mask 
SPCCA5_MISC_CTRL10 maxextin-bit position 
SPCCA5_MISC_CTRL10 maxextout-bit mask 
SPCCA5_MISC_CTRL10 maxextout-bit position 
SPCCA5_MISC_CTRL10 niden-bit mask 
SPCCA5_MISC_CTRL10 niden-bit position 
SPCCA5_MISC_CTRL10 spiden-bit mask 
SPCCA5_MISC_CTRL10 spiden-bit position 
SPCCA5_MISC_CTRL10 spniden-bit mask 
SPCCA5_MISC_CTRL10 spniden-bit position 
SPCCA5_MISC_CTRL11 ARprots-bit mask 
SPCCA5_MISC_CTRL11 ARprots-bit position 
SPCCA5_MISC_CTRL11 ARusers-bit mask 
SPCCA5_MISC_CTRL11 ARusers-bit position 
SPCCA5_MISC_CTRL11 AWprots-bit mask 
SPCCA5_MISC_CTRL11 AWprots-bit position 
SPCCA5_MISC_CTRL11 AWusers-bit mask 
SPCCA5_MISC_CTRL11 AWusers-bit position 
SPCCA5_MISC_CTRL2 dbgromaddr-bit mask 
SPCCA5_MISC_CTRL2 dbgromaddr-bit position 
SPCCA5_MISC_CTRL3 dbgselfaddr-bit mask 
SPCCA5_MISC_CTRL3 dbgselfaddr-bit position 
SPCCA5_MISC_CTRL4 periphbase-bit mask 
SPCCA5_MISC_CTRL4 periphbase-bit position 
SPCCA5_MISC_CTRL5 L2associativity-bit mask 
SPCCA5_MISC_CTRL5 L2associativity-bit position 
SPCCA5_MISC_CTRL5 L2filteren-bit mask 
SPCCA5_MISC_CTRL5 L2filteren-bit position 
SPCCA5_MISC_CTRL5 L2spniden-bit mask 
SPCCA5_MISC_CTRL5 L2spniden-bit position 
SPCCA5_MISC_CTRL5 L2waysize-bit mask 
SPCCA5_MISC_CTRL5 L2waysize-bit position 
SPCCA5_MISC_CTRL6 L2periphbase-bit mask 
SPCCA5_MISC_CTRL6 L2periphbase-bit position 
SPCCA5_MISC_CTRL7 L2filterend-bit mask 
SPCCA5_MISC_CTRL7 L2filterend-bit position 
SPCCA5_MISC_CTRL7 L2filterstart-bit mask 
SPCCA5_MISC_CTRL7 L2filterstart-bit position 
SPCCA5_MISC_CTRL8 CP15Sdisable-bit mask 
SPCCA5_MISC_CTRL8 CP15Sdisable-bit position 
SPCCA5_MISC_CTRL8 L1rstdisable-bit mask 
SPCCA5_MISC_CTRL8 L1rstdisable-bit position 
SPCCA5_MISC_CTRL8 portconnected-bit mask 
SPCCA5_MISC_CTRL8 portconnected-bit position 
SPCCA5_MISC_CTRL8 portenabled-bit mask 
SPCCA5_MISC_CTRL8 portenabled-bit position 
SPCCA5_MISC_CTRL8 srstconnected-bit mask 
SPCCA5_MISC_CTRL8 srstconnected-bit position 
SPCCA5_MISC_CTRL9 atb_csysreq-bit mask 
SPCCA5_MISC_CTRL9 atb_csysreq-bit position 
SPCCA5_MISC_CTRL9 atb_mstclamp-bit mask 
SPCCA5_MISC_CTRL9 atb_mstclamp-bit position 
SPCCA5_MISC_CTRL9 atb_slvclamp-bit mask 
SPCCA5_MISC_CTRL9 atb_slvclamp-bit position 
SPCCA5_MISC_CTRL9 pwrctli0-bit mask 
SPCCA5_MISC_CTRL9 pwrctli0-bit position 
SPCCA5_MISC_CTRL9 pwrctli1-bit mask 
SPCCA5_MISC_CTRL9 pwrctli1-bit position 
SPCCA5_MISC_CTRL9 pwrctli2-bit mask 
SPCCA5_MISC_CTRL9 pwrctli2-bit position 
SPCCA5_MISC_CTRL9 pwrctli3-bit mask 
SPCCA5_MISC_CTRL9 pwrctli3-bit position 
SPCCLK_SEL1 CP0CLK_SEL-bit mask 
SPCCLK_SEL1 CP0CLK_SEL-bit position 
SPCCLK_SEL1 CP1CLK_SEL-bit mask 
SPCCLK_SEL1 CP1CLK_SEL-bit position 
SPCCLK_SEL1 DT0CLK_SEL-bit mask 
SPCCLK_SEL1 DT0CLK_SEL-bit position 
SPCCLK_SEL1 DT1CLK_SEL-bit mask 
SPCCLK_SEL1 DT1CLK_SEL-bit position 
SPCCLK_SEL1 HDACLK_SEL-bit mask 
SPCCLK_SEL1 HDACLK_SEL-bit position 
SPCCLK_SEL1 LVDSCLK_SEL-bit mask 
SPCCLK_SEL1 LVDSCLK_SEL-bit position 
SPCCLK_SSP_DIV SSP0CLK_DIV-bit mask 
SPCCLK_SSP_DIV SSP0CLK_DIV-bit position 
SPCCLK_SSP_DIV SSP1CLK_DIV-bit mask 
SPCCLK_SSP_DIV SSP1CLK_DIV-bit position 
SPCCLK_SSP_DIV SSP2CLK_DIV-bit mask 
SPCCLK_SSP_DIV SSP2CLK_DIV-bit position 
SPCCLK_SSP_DIV SSP3CLK_DIV-bit mask 
SPCCLK_SSP_DIV SSP3CLK_DIV-bit position 
SPCCLK_SSP_SEL PLL3CLK_SEL-bit mask 
SPCCLK_SSP_SEL PLL3CLK_SEL-bit position 
SPCCLK_SSP_SEL SSP0CLK_SEL-bit mask 
SPCCLK_SSP_SEL SSP0CLK_SEL-bit position 
SPCCLK_SSP_SEL SSP1CLK_SEL-bit mask 
SPCCLK_SSP_SEL SSP1CLK_SEL-bit position 
SPCCLK_SSP_SEL SSP2CLK_SEL-bit mask 
SPCCLK_SSP_SEL SSP2CLK_SEL-bit position 
SPCCLK_SSP_SEL SSP3CLK_SEL-bit mask 
SPCCLK_SSP_SEL SSP3CLK_SEL-bit position 
SPCDDR_MISC_CTRL INIT_OK-bit mask 
SPCDDR_MISC_CTRL INIT_OK-bit position 
SPCDDR_MISC_CTRL REFRESH-bit mask 
SPCDDR_MISC_CTRL REFRESH-bit position 
SPCDDR_PHY_SETUP AFL_GAIN-bit mask 
SPCDDR_PHY_SETUP AFL_GAIN-bit position 
SPCDDR_PHY_SETUP PD_GAIN-bit mask 
SPCDDR_PHY_SETUP PD_GAIN-bit position 
SPCDDRPHY_DLLSETUP DLLEN-bit mask 
SPCDDRPHY_DLLSETUP DLLEN-bit position 
SPCDDRPHY_DLLSETUP FRANGE-bit mask 
SPCDDRPHY_DLLSETUP FRANGE-bit position 
SPCDDRPHY_PLLSETUP PLLEN-bit mask 
SPCDDRPHY_PLLSETUP PLLEN-bit position 
SPCETH_PHY_SEL RMII-bit mask 
SPCETH_PHY_SEL RMII-bit position 
SPCFCS_CTRL CPU_MASK-bit mask 
SPCFCS_CTRL CPU_MASK-bit position 
SPCFCS_CTRL CPU_MASK2-bit mask 
SPCFCS_CTRL CPU_MASK2-bit position 
SPCFCS_CTRL FCS-bit mask 
SPCFCS_CTRL FCS_PLL0_RSTn-bit mask 
SPCFCS_CTRL FCS_PLL0_RSTn-bit position 
SPCFCS_CTRL FCS-bit position 
SPCFCS_CTRL SELFR_CMD_OFF-bit mask 
SPCFCS_CTRL SELFR_CMD_OFF-bit position 
SPCFCS_CTRL SW_RST-bit mask 
SPCFCS_CTRL SW_RST-bit position 
SPCIDE_CLK_SEL IDECLK_SEL-bit mask 
SPCIDE_CLK_SEL IDECLK_SEL-bit position 
SPCINT_ENABLE EINT_FCS-bit mask 
SPCINT_ENABLE EINT_FCS-bit position 
SPCINT_ENABLE EINT_R0-bit mask 
SPCINT_ENABLE EINT_R0-bit position 
SPCINT_ENABLE EINT_R1-bit mask 
SPCINT_ENABLE EINT_R1-bit position 
SPCINT_ENABLE EINT_R3-bit mask 
SPCINT_ENABLE EINT_R3-bit position 
SPCINT_ENABLE EINT_R4-bit mask 
SPCINT_ENABLE EINT_R4-bit position 
SPCINT_ENABLE EINT_R5-bit mask 
SPCINT_ENABLE EINT_R5-bit position 
SPCINT_ENABLE EINT_R8-bit mask 
SPCINT_ENABLE EINT_R8-bit position 
SPCINT_STATUS INT_FCS-bit mask 
SPCINT_STATUS INT_FCS-bit position 
SPCLVDS_TX_SETUP RF_0-bit mask 
SPCLVDS_TX_SETUP RF_0-bit position 
SPCLVDS_TX_SETUP RF_1-bit mask 
SPCLVDS_TX_SETUP RF_1-bit position 
SPCMISC_CLK_CTRL SCLK_EN-bit mask 
SPCMISC_CLK_CTRL SCLK_EN-bit position 
SPCPIN_STATUS MODE-bit mask 
SPCPIN_STATUS MODE-bit position 
SPCPIN_STATUS TEST-bit mask 
SPCPIN_STATUS TEST-bit position 
SPCPLL0_CTRL DIV-bit mask 
SPCPLL0_CTRL DIV-bit position 
SPCPLL0_CTRL EN-bit mask 
SPCPLL0_CTRL EN-bit position 
SPCPLL0_CTRL MS-bit mask 
SPCPLL0_CTRL MS-bit position 
SPCPLL0_CTRL MUX-bit mask 
SPCPLL0_CTRL MUX-bit position 
SPCPLL0_CTRL NS-bit mask 
SPCPLL0_CTRL NS-bit position 
SPCPLL0_CTRL STB-bit mask 
SPCPLL0_CTRL STB-bit position 
SPCPLL1_CTRL DIV-bit mask 
SPCPLL1_CTRL DIV-bit position 
SPCPLL1_CTRL EN-bit mask 
SPCPLL1_CTRL EN-bit position 
SPCPLL1_CTRL FR-bit mask 
SPCPLL1_CTRL FR-bit position 
SPCPLL1_CTRL MS-bit mask 
SPCPLL1_CTRL MS-bit position 
SPCPLL1_CTRL NS-bit mask 
SPCPLL1_CTRL NS-bit position 
SPCPLL1_CTRL SRC-bit mask 
SPCPLL1_CTRL SRC-bit position 
SPCPLL2_CTRL DIV-bit mask 
SPCPLL2_CTRL DIV-bit position 
SPCPLL2_CTRL EN-bit mask 
SPCPLL2_CTRL EN-bit position 
SPCPLL2_CTRL FR-bit mask 
SPCPLL2_CTRL FR-bit position 
SPCPLL2_CTRL MS-bit mask 
SPCPLL2_CTRL MS-bit position 
SPCPLL2_CTRL NS-bit mask 
SPCPLL2_CTRL NS-bit position 
SPCPLL2_CTRL SRC-bit mask 
SPCPLL2_CTRL SRC-bit position 
SPCPLL3_CTRL DIV-bit mask 
SPCPLL3_CTRL DIV-bit position 
SPCPLL3_CTRL EN-bit mask 
SPCPLL3_CTRL EN-bit position 
SPCPLL3_CTRL FR-bit mask 
SPCPLL3_CTRL FR-bit position 
SPCPLL3_CTRL MS-bit mask 
SPCPLL3_CTRL MS-bit position 
SPCPLL3_CTRL NS-bit mask 
SPCPLL3_CTRL NS-bit position 
SPCPLL3_CTRL SRC-bit mask 
SPCPLL3_CTRL SRC-bit position 
SPCPLLA_CTRL CC-bit mask 
SPCPLLA_CTRL CC-bit position 
SPCPLLA_CTRL DIV-bit mask 
SPCPLLA_CTRL DIV-bit position 
SPCPLLA_CTRL EN-bit mask 
SPCPLLA_CTRL EN-bit position 
SPCPLLA_CTRL FR-bit mask 
SPCPLLA_CTRL FR-bit position 
SPCPLLA_CTRL MS-bit mask 
SPCPLLA_CTRL MS-bit position 
SPCPLLA_CTRL NS-bit mask 
SPCPLLA_CTRL NS-bit position 
SPCPLLA_CTRL SRC-bit mask 
SPCPLLA_CTRL SRC-bit position 
SPCSDMC_MISC_CTRL CLK_SEL-bit mask 
SPCSDMC_MISC_CTRL CLK_SEL-bit position 
SPCSDMC_MISC_CTRL HCLK_SEL-bit mask 
SPCSDMC_MISC_CTRL HCLK_SEL-bit position 
SPCSDMC_MISC_CTRL RCLK_SEL-bit mask 
SPCSDMC_MISC_CTRL RCLK_SEL-bit position 
SPCSDMC_MISC_CTRL SREF_ACK-bit mask 
SPCSDMC_MISC_CTRL SREF_ACK-bit position 
SPCSDMC_MISC_CTRL SREF_REQ-bit mask 
SPCSDMC_MISC_CTRL SREF_REQ-bit position 
SPCSDMC_MISC_CTRL WCLK_SEL-bit mask 
SPCSDMC_MISC_CTRL WCLK_SEL-bit position 
SPCSOFTRESET_MASK1 SWRST_MASK1-bit mask 
SPCSOFTRESET_MASK1 SWRST_MASK1-bit position 
SPCSOFTRESET_MASK2 SWRST_MASK2-bit mask 
SPCSOFTRESET_MASK2 SWRST_MASK2-bit position 
SPCSOFTRESET_MASK3 SWRST_MASK3-bit mask 
SPCSOFTRESET_MASK3 SWRST_MASK3-bit position 
SPCSOFTRESET_MASK4 SWRST_MASK4-bit mask 
SPCSOFTRESET_MASK4 SWRST_MASK4-bit position 
SPCSOFTRESET_MASK5 SWRST_MASK5-bit mask 
SPCSOFTRESET_MASK5 SWRST_MASK5-bit position 
SPCSOFTRESET_SETUP SWRST_ACTIVE-bit mask 
SPCSOFTRESET_SETUP SWRST_ACTIVE-bit position 
SPCSOFTRESET_SETUP SWRST_WAIT-bit mask 
SPCSOFTRESET_SETUP SWRST_WAIT-bit position 
SPCSPIROM_MISC_CTRL ADDR_CYC-bit mask 
SPCSPIROM_MISC_CTRL ADDR_CYC-bit position 
SPCUSB_MISC_CTRL1 CLK_DIV-bit mask 
SPCUSB_MISC_CTRL1 CLK_DIV-bit position 
SPCUSB_MISC_CTRL1 CLK_SEL-bit mask 
SPCUSB_MISC_CTRL1 CLK_SEL-bit position 
SPCUSB_MISC_CTRL1 VBUS_outen-bit mask 
SPCUSB_MISC_CTRL1 VBUS_outen-bit position 
SPCUSB_MISC_CTRL1 VPRTCT_state-bit mask 
SPCUSB_MISC_CTRL1 VPRTCT_state-bit position 
SPCUSB_MISC_CTRL2 OSCOUTEN-bit mask 
SPCUSB_MISC_CTRL2 OSCOUTEN-bit position 
SPCUSB_MISC_CTRL2 OUTCLKSEL-bit mask 
SPCUSB_MISC_CTRL2 OUTCLKSEL-bit position 
SPCUSB_MISC_CTRL2 PLLALIV-bit mask 
SPCUSB_MISC_CTRL2 PLLALIV-bit position 
SPCUSB_MISC_CTRL2 suspendm-bit mask 
SPCUSB_MISC_CTRL2 suspendm-bit position 
SPCUSB_MISC_CTRL2 TC_TB_TA-bit mask 
SPCUSB_MISC_CTRL2 TC_TB_TA-bit position 
SPCUSB_MISC_CTRL2 wakeup-bit mask 
SPCUSB_MISC_CTRL2 wakeup-bit position 
SPCUSB_MISC_CTRL2 XTLSEL-bit mask 
SPCUSB_MISC_CTRL2 XTLSEL-bit position 
SPCVIDEOADC_MISC_CTRL1 CLAMP_EN0-bit mask 
SPCVIDEOADC_MISC_CTRL1 CLAMP_EN0-bit position 
SPCVIDEOADC_MISC_CTRL1 CLAMP_EN1-bit mask 
SPCVIDEOADC_MISC_CTRL1 CLAMP_EN1-bit position 
SPCVIDEOADC_MISC_CTRL1 CLAMP_EN2-bit mask 
SPCVIDEOADC_MISC_CTRL1 CLAMP_EN2-bit position 
SPCVIDEOADC_MISC_CTRL1 CLAMP_EN3-bit mask 
SPCVIDEOADC_MISC_CTRL1 CLAMP_EN3-bit position 
SPCVIDEOADC_MISC_CTRL1 ENABLE-bit mask 
SPCVIDEOADC_MISC_CTRL1 ENABLE-bit position 
SPCVIDEOADC_MISC_CTRL2 CH0_CLAMP-bit mask 
SPCVIDEOADC_MISC_CTRL2 CH0_CLAMP-bit position 
SPCVIDEOADC_MISC_CTRL2 CH0_ENABLE-bit mask 
SPCVIDEOADC_MISC_CTRL2 CH0_ENABLE-bit position 
SPCVIDEOADC_MISC_CTRL2 CH1_CLAMP-bit mask 
SPCVIDEOADC_MISC_CTRL2 CH1_CLAMP-bit position 
SPCVIDEOADC_MISC_CTRL2 CH1_ENABLE-bit mask 
SPCVIDEOADC_MISC_CTRL2 CH1_ENABLE-bit position 
SPCVIDEOADC_MISC_CTRL2 CH2_CLAMP-bit mask 
SPCVIDEOADC_MISC_CTRL2 CH2_CLAMP-bit position 
SPCVIDEOADC_MISC_CTRL2 CH2_ENABLE-bit mask 
SPCVIDEOADC_MISC_CTRL2 CH2_ENABLE-bit position 
SPCVIDEOADC_MISC_CTRL2 CH3_ENABLE-bit mask 
SPCVIDEOADC_MISC_CTRL2 CH3_ENABLE-bit position 
SPCVIDEOADC_MISC_CTRL2 CLAMP_IMP-bit mask 
SPCVIDEOADC_MISC_CTRL2 CLAMP_IMP-bit position 
SPCVIDEOADC_MISC_CTRL3 CH0_GAIN-bit mask 
SPCVIDEOADC_MISC_CTRL3 CH0_GAIN-bit position 
SPCVIDEOADC_MISC_CTRL3 CH1_GAIN-bit mask 
SPCVIDEOADC_MISC_CTRL3 CH1_GAIN-bit position 
SPCVIDEOADC_MISC_CTRL3 CH2_GAIN-bit mask 
SPCVIDEOADC_MISC_CTRL3 CH2_GAIN-bit position 
SPCVIDEOADC_MISC_CTRL3 CH3_CLAMP-bit mask 
SPCVIDEOADC_MISC_CTRL3 CH3_CLAMP-bit position 
SPCVIDEOADC_MISC_CTRL4 AAF_CTRL-bit mask 
SPCVIDEOADC_MISC_CTRL4 AAF_CTRL-bit position 
SPCVIDEOADC_MISC_CTRL4 CH3_GAIN-bit mask 
SPCVIDEOADC_MISC_CTRL4 CH3_GAIN-bit position 
SPCVIDEOADC_MISC_CTRL4 QUAN_BIAS_UP-bit mask 
SPCVIDEOADC_MISC_CTRL4 QUAN_BIAS_UP-bit position 
SPCVIDEOADC_MISC_CTRL5 INPUT_RANGE-bit mask 
SPCVIDEOADC_MISC_CTRL5 INPUT_RANGE-bit position 
SPCVIDEOADC_MISC_CTRL5 REF_BIAS_UP-bit mask 
SPCVIDEOADC_MISC_CTRL5 REF_BIAS_UP-bit position 
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