1:
9:
10:
14:
15:
16:
#include "AG903_errno.h"
17:
#include "AG903_intno.h"
18:
#include "uart/uartmgr.h"
19:
#include "uart/uartprm.h"
20:
#include "int/intmgr.h"
21:
22:
typedef void (*AG903_UARTMgrIntHdr)(
void);
23:
24:
typedef struct _AG903_UARTMgrSndStat{
25: uint32_t stat;
26: uint8_t* buf;
27: uint32_t size;
28: uint32_t cnt;
29: uint8_t dma;
30: uint8_t reserve[3];
31: } AG903_UARTMgrSndStat;
32:
33:
typedef struct _AG903_UARTMgrRcvStat{
34: uint32_t stat;
35: uint8_t dma;
36: uint8_t reserve[3];
37: } AG903_UARTMgrRcvStat;
38:
39:
typedef struct _AG903_UARTMgrChStat{
40: AG903_UARTMgrSndStat snd;
41: AG903_UARTMgrRcvStat rcv;
42: uint32_t hdlnum;
43: int32_t hdrid;
44: uint8_t rs485;
45: uint8_t reserve[3];
46: } AG903_UARTMgrChStat;
47:
48:
typedef struct _AG903_UARTMgrHandleStat{
49:
AG903_UARTMgrClbk clbk;
50: uint32_t event;
51: uint8_t lock;
52: uint8_t reserve[3];
53: } AG903_UARTMgrHandleStat;
54:
55:
enum _AG903_UartStatusNum{
56: AG903_UART_STAT_IDLE = 0,
57: AG903_UART_STAT_SEND,
58: AG903_UART_STAT_RECEIVE,
59: };
60:
61:
static AG903_UARTMgrChStat UartChStat[
AG903_UART_CH_NUM];
62:
static AG903_UARTMgrHandleStat UartHandleStat[
AG903_UART_CH_NUM];
63:
static uint8_t UartSendBuf[
AG903_UART_CH_NUM][
AG903_UART_BUFSIZE];
64:
65:
static void UARTMgr_InitState(uint8_t ch);
66:
static int32_t UARTMgr_CheckHandle(
AG903_UARTMgrHandle* handle, uint8_t* ch);
67:
static int32_t UARTMgr_SetParam(uint8_t ch,
AG903_UARTMgrParam* param);
68:
static int32_t UARTMgr_SetBaudrate(uint8_t ch, uint32_t baud);
69:
static int32_t UARTMgr_SetForm(uint8_t ch, uint8_t parity, uint8_t stopbit, uint8_t databit);
70:
static int32_t UARTMgr_SetFifo(uint8_t ch, uint8_t rx_trgl, uint8_t tx_trgl, _Bool enable);
71:
static int32_t UARTMgr_SetFlow(uint8_t ch, uint8_t flow);
72:
static void UARTMgr_Inthdr0(
void);
73:
static void UARTMgr_Inthdr1(
void);
74:
static void UARTMgr_Inthdr2(
void);
75:
static void UARTMgr_Inthdr3(
void);
76:
static void UARTMgr_IntProcess(uint8_t ch);
77:
static int32_t UARTMgr_IntSend(uint8_t ch, uint8_t inttype, uint32_t* event);
78:
static int32_t UARTMgr_IntReceive(uint8_t ch, uint8_t inttype, uint32_t* event);
79:
static int32_t UARTMgr_IntLineStatus(uint8_t ch, uint32_t* event);
80:
static int32_t UARTMgr_IntRs485Status(uint8_t ch, uint32_t* event);
81:
82:
static const AG903_UARTMgrIntHdr UartIntHdr[
AG903_UART_CH_NUM] =
83: { UARTMgr_Inthdr0, UARTMgr_Inthdr1, UARTMgr_Inthdr2, UARTMgr_Inthdr3 };
84:
85:
86:
97: int32_t
AG903_UARTMgrInit(uint8_t ch)
98: {
99:
AG903_INTMgrHdrPrm inthdr;
100:
AG903_UARTMgrParam param;
101: int32_t retval =
AG903_ENONE;
102: int32_t hdrid;
103:
104:
if(
AG903_UART_CH_NUM <= ch) {
105:
return -
AG903_EINVAL;
106: }
107:
108: UARTMgr_InitState(ch);
109:
110:
if(0 >= UartChStat[ch].hdrid) {
111: inthdr.atr =
AG903_INT_HLNG;
112: inthdr.intno =
AG903_IRQ8_UART0+ch;
113: inthdr.func = (
void*)UartIntHdr[ch];
114: hdrid =
AG903_INTMgrSetHandler(&inthdr);
115:
if(0 >= hdrid) {
116:
return -
AG903_EFAULT;
117: }
118: UartChStat[ch].hdrid = hdrid;
119: }
120:
121:
AG903_INTMgrEnableInt(
AG903_IRQ8_UART0+ch);
122:
123: param.baud =
AG903_UART_DFLT_BAUD;
124: param.parity =
AG903_UART_DFLT_PARITY;
125: param.stopbit =
AG903_UART_DFLT_STOPBIT;
126: param.databit =
AG903_UART_DFLT_DATBIT;
127: param.flow =
AG903_UART_DFLT_FLOW;
128: retval = UARTMgr_SetParam(ch, ¶m);
129:
130:
return retval;
131: }
132:
133:
143: int32_t
AG903_UARTMgrGetHandle(uint8_t ch,
AG903_UARTMgrHandle** handle)
144: {
145: int32_t retval =
AG903_ENONE;
146:
147:
if( (
AG903_UART_CH_NUM <= ch) ||
148: (NULL == handle) ) {
149:
return -
AG903_EINVAL;
150: }
151:
if(
true == UartHandleStat[ch].lock) {
152:
return -
AG903_EBUSY;
153: }
154:
155: UARTMgr_InitState(ch);
156:
157: UartHandleStat[ch].lock =
true;
158:
159: (*handle) = (
AG903_UARTMgrHandle*)&UartHandleStat[ch];
160:
161:
return retval;
162: }
163:
164:
174: int32_t
AG903_UARTMgrReleaseHandle(
AG903_UARTMgrHandle* handle)
175: {
176: int32_t retval =
AG903_ENONE;
177: int32_t result;
178: uint8_t ch;
179:
180: result = UARTMgr_CheckHandle(handle, &ch);
181:
if(
AG903_ENONE != result) {
182:
return -
AG903_EINVAL;
183: }
184:
if( (AG903_UART_STAT_IDLE != UartChStat[ch].snd.stat) ||
185: (AG903_UART_STAT_IDLE != UartChStat[ch].rcv.stat) ) {
186:
return -
AG903_EBUSY;
187: }
188:
189: UartHandleStat[ch].lock =
false;
190:
191:
return retval;
192: }
193:
194:
203: int32_t
AG903_UARTMgrSetCallback(
AG903_UARTMgrHandle* handle,
AG903_UARTMgrClbk clbk)
204: {
205: int32_t retval =
AG903_ENONE;
206: int32_t result;
207: uint8_t ch;
208:
209: result = UARTMgr_CheckHandle(handle, &ch);
210:
if(
AG903_ENONE != result) {
211:
return -
AG903_EINVAL;
212: }
213:
214: UartHandleStat[ch].clbk = clbk;
215:
216:
return retval;
217: }
218:
219:
229: int32_t
AG903_UARTMgrSetParam(
AG903_UARTMgrHandle*handle,
AG903_UARTMgrParam* param)
230: {
231: int32_t retval =
AG903_ENONE;
232: int32_t result;
233: uint8_t ch;
234:
235: result = UARTMgr_CheckHandle(handle, &ch);
236:
if(
AG903_ENONE != result) {
237:
return -
AG903_EINVAL;
238: }
239:
if(NULL == param) {
240:
return -
AG903_EINVAL;
241: }
242:
if( (AG903_UART_STAT_IDLE != UartChStat[ch].snd.stat) ||
243: (AG903_UART_STAT_IDLE != UartChStat[ch].rcv.stat) ) {
244:
return -
AG903_EBUSY;
245: }
246:
247: retval = UARTMgr_SetParam(ch, param);
248:
249:
return retval;
250: }
251:
252:
263: int32_t
AG903_UARTMgrSetRs485Param(
AG903_UARTMgrHandle*handle,
AG903_UARTMgrRs485Param *param)
264: {
265: int32_t retval =
AG903_ENONE;
266: int32_t result;
267: uint8_t ch;
268:
269: result = UARTMgr_CheckHandle(handle, &ch);
270:
if(
AG903_ENONE != result) {
271:
return -
AG903_EINVAL;
272: }
273:
if(NULL == param) {
274:
return -
AG903_EINVAL;
275: }
276:
if( (AG903_UART_STAT_IDLE != UartChStat[ch].snd.stat) ||
277: (AG903_UART_STAT_IDLE != UartChStat[ch].rcv.stat) ) {
278:
return -
AG903_EBUSY;
279: }
280:
281:
AG903_UARTPrmSetSetuptime(ch, param->setuptime);
282:
AG903_UARTPrmSetHoldtime(ch, param->holdtime);
283:
284:
if(param->event & (
AG903_UART_RCVTIMEOUT_BIT|
AG903_UART_CHARATIMEOUT_BIT)) {
285:
AG903_UARTPrmDisableTimeoutDetect(ch);
286:
AG903_UARTPrmEnableTimeoutIntMask(ch, (
AG903_UART_DETECT_RTO_BIT|
AG903_UART_DETECT_CTO_BIT));
287:
288:
AG903_UARTPrmEnableTimeoutIntMask(ch,
AG903_UART_DETECT_ALL_BIT);
289:
AG903_UARTPrmClerTimeoutStatus(ch,
AG903_UART_DETECT_ALL_BIT);
290:
291:
AG903_UARTPrmSetReceivetime(ch, param->rcvtime);
292:
AG903_UARTPrmSetCharainterval(ch, param->interval);
293:
AG903_UARTPrmSetTimeout(ch, param->timeout);
294: }
295:
296:
AG903_UARTPrmSetAutoMode(ch,
true,
true);
297:
AG903_UARTPrmEnableRS485(ch);
298:
299: UartHandleStat[ch].event = param->event;
300: UartChStat[ch].rs485 =
true;
301:
302:
return retval;
303: }
304:
305:
322: int32_t
AG903_UARTMgrSend(
AG903_UARTMgrHandle* handle, uint8_t* buf, uint32_t size, _Bool dma)
323: {
324: int32_t retval =
AG903_ENONE;
325: int32_t result;
326: uint32_t sndsz;
327: uint32_t loop;
328: uint8_t ch;
329:
330: result = UARTMgr_CheckHandle(handle, &ch);
331:
if(
AG903_ENONE != result) {
332:
return -
AG903_EINVAL;
333: }
334:
if(
false == dma) {
335:
if((NULL == buf) || (0 >= size)) {
336:
return -
AG903_EINVAL;
337: }
338:
if(
AG903_UART_BUFSIZE < size) {
339:
return -
AG903_ENOBUFS;
340: }
341: }
342:
if(AG903_UART_STAT_IDLE != UartChStat[ch].snd.stat){
343:
344:
return -
AG903_EBUSY;
345: }
346:
347: UartChStat[ch].snd.dma = dma;
348: UartChStat[ch].snd.stat = AG903_UART_STAT_SEND;
349:
if(
true == dma) {
350:
AG903_UARTPrmEnableInt(ch,
AG903_UART_IER_THREMP_BIT);
351: }
352:
else {
353: UartChStat[ch].snd.buf = &UartSendBuf[ch][0];
354: UartChStat[ch].snd.size = size;
355:
for(loop=0; loop<UartChStat[ch].snd.size; loop++) {
356: *(UartChStat[ch].snd.buf+loop) = *(buf+loop);
357: }
358:
if(
AG903_UART_FIFO_SIZE <= size) {
359: sndsz =
AG903_UART_FIFO_SIZE;
360: }
361:
else {
362: sndsz = size;
363: }
364: UartChStat[ch].snd.cnt = sndsz;
365:
AG903_UARTPrmSendData(ch, buf, sndsz);
366:
AG903_UARTPrmEnableInt(ch,
AG903_UART_IER_THREMP_BIT);
367: }
368:
369:
370:
return retval;
371: }
372:
373:
386: int32_t
AG903_UARTMgrReceive(
AG903_UARTMgrHandle* handle, _Bool dma)
387: {
388: int32_t retval =
AG903_ENONE;
389: int32_t result;
390: uint32_t dismsk = 0;
391: uint8_t ch;
392:
393: result = UARTMgr_CheckHandle(handle, &ch);
394:
if(
AG903_ENONE != result) {
395:
return -
AG903_EINVAL;
396: }
397:
398:
if( (AG903_UART_STAT_IDLE != UartChStat[ch].rcv.stat) ||
399: ((
true == UartChStat[ch].rs485) && (AG903_UART_STAT_IDLE != UartChStat[ch].snd.stat)) ){
400:
401:
return -
AG903_EBUSY;
402: }
403:
404: UartChStat[ch].rcv.dma = dma;
405: UartChStat[ch].rcv.stat = AG903_UART_STAT_RECEIVE;
406:
407:
if(UartHandleStat[ch].event &
AG903_UART_RCVTIMEOUT_BIT) {
408: dismsk |=
AG903_UART_DETECT_RTO_BIT;
409: }
410:
if(UartHandleStat[ch].event &
AG903_UART_CHARATIMEOUT_BIT) {
411: dismsk |=
AG903_UART_DETECT_CTO_BIT;
412: }
413:
if(0 != dismsk) {
414:
AG903_UARTPrmDisableTimeoutIntMask(ch, dismsk);
415:
AG903_UARTPrmEnableTimeoutDetect(ch);
416: }
417:
418:
AG903_UARTPrmEnableInt(ch, (
AG903_UART_IER_LINEST_BIT|
AG903_UART_IER_DATARDY_BIT));
419:
420:
421:
return retval;
422: }
423:
424:
435: int32_t
AG903_UARTMgrGetReceiveData(
AG903_UARTMgrHandle* handle, uint8_t* buf, uint32_t size)
436: {
437: int32_t result;
438: int32_t cnt;
439: uint8_t ch;
440: uint8_t loop;
441: uint8_t stat;
442:
443: result = UARTMgr_CheckHandle(handle, &ch);
444:
if(
AG903_ENONE != result) {
445:
return -
AG903_EINVAL;
446: }
447:
if( (NULL == buf) || (0 >= size) ){
448:
return -
AG903_EINVAL;
449: }
450:
451: cnt = 0;
452:
for(loop=0; loop<
AG903_UART_FIFO_SIZE; loop++) {
453:
AG903_UARTPrmGetLineStatus(ch, &stat);
454:
if(0 == (
AG903_UART_LSR_DATARDY_BIT&stat)) {
455:
break;
456: }
457:
AG903_UARTPrmGetReceiveData(ch, buf);
458: buf++;
459: cnt++;
460:
if(size <= (uint32_t)cnt) {
461:
break;
462: }
463: }
464:
465:
return cnt;
466: }
467:
468:
476: int32_t
AG903_UARTMgrStopSend(
AG903_UARTMgrHandle* handle)
477: {
478: int32_t retval =
AG903_ENONE;
479: int32_t result;
480: uint8_t ch;
481:
482: result = UARTMgr_CheckHandle(handle, &ch);
483:
if(
AG903_ENONE != result) {
484:
return -
AG903_EINVAL;
485: }
486:
487:
AG903_UARTPrmDisableInt(ch,
AG903_UART_IER_THREMP_BIT);
488: UartChStat[ch].snd.stat = AG903_UART_STAT_IDLE;
489:
490:
return retval;
491: }
492:
493:
501: int32_t
AG903_UARTMgrStopReceive(
AG903_UARTMgrHandle* handle)
502: {
503: int32_t retval =
AG903_ENONE;
504: int32_t result;
505: uint8_t ch;
506:
507: result = UARTMgr_CheckHandle(handle, &ch);
508:
if(
AG903_ENONE != result) {
509:
return -
AG903_EINVAL;
510: }
511:
512:
AG903_UARTPrmDisableInt(ch, (
AG903_UART_IER_LINEST_BIT|
AG903_UART_IER_DATARDY_BIT));
513:
AG903_UARTPrmEnableTimeoutIntMask(ch,
AG903_UART_DETECT_ALL_BIT);
514: UartChStat[ch].rcv.stat = AG903_UART_STAT_IDLE;
515:
516:
return retval;
517: }
518:
519:
528: int32_t
AG903_UARTMgrResetFifo(
AG903_UARTMgrHandle* handle, uint8_t rstbit)
529: {
530: int32_t retval =
AG903_ENONE;
531: int32_t result;
532: uint8_t fifo = 0;
533: uint8_t ch;
534:
535: result = UARTMgr_CheckHandle(handle, &ch);
536:
if(
AG903_ENONE != result) {
537:
return -
AG903_EINVAL;
538: }
539:
540:
if(
AG903_UART_RESET_RXFIFO&rstbit) {
541: fifo |=
AG903_UART_RXFIFO_BIT;
542: }
543:
if(
AG903_UART_RESET_TXFIFO&rstbit) {
544: fifo |=
AG903_UART_TXFIFO_BIT;
545: }
546:
547:
if(0 != fifo) {
548:
AG903_UARTPrmResetFifo(ch, fifo);
549: }
550:
551:
return retval;
552: }
553:
554:
564: int32_t
AG903_UARTMgrSetBreak(
AG903_UARTMgrHandle* handle, _Bool enable)
565: {
566: int32_t retval =
AG903_ENONE;
567: int32_t result;
568: uint8_t ch;
569:
570: result = UARTMgr_CheckHandle(handle, &ch);
571:
if(
AG903_ENONE != result) {
572:
return -
AG903_EINVAL;
573: }
574:
575:
AG903_UARTPrmSetBreak(ch, enable);
576:
577:
return retval;
578: }
579:
580:
584:
static void UARTMgr_InitState(uint8_t ch)
585: {
586:
if(
AG903_UART_CH_NUM <= ch) {
587:
return;
588: }
589:
590: UartHandleStat[ch].clbk = NULL;
591: UartHandleStat[ch].event = 0;
592: UartHandleStat[ch].lock =
false;
593:
594: UartChStat[ch].snd.stat = AG903_UART_STAT_IDLE;
595: UartChStat[ch].snd.buf = NULL;
596: UartChStat[ch].snd.size = 0;
597: UartChStat[ch].snd.cnt = 0;
598: UartChStat[ch].snd.dma =
false;
599: UartChStat[ch].rcv.stat = AG903_UART_STAT_IDLE;
600: UartChStat[ch].rcv.dma =
false;
601: UartChStat[ch].rs485 =
false;
602: UartChStat[ch].hdlnum = 0;
603:
604:
AG903_UARTPrmDisableRS485(ch);
605:
606:
return;
607: }
608:
609:
614:
static int32_t UARTMgr_CheckHandle(
AG903_UARTMgrHandle* handle, uint8_t* ch)
615: {
616: uint32_t get_ch;
617:
618: get_ch = ((uint32_t)handle - (uint32_t)UartHandleStat) /
sizeof(AG903_UARTMgrHandleStat);
619:
620:
if( (
AG903_UART_CH_NUM <= get_ch) ||
621: (&UartHandleStat[get_ch] != (AG903_UARTMgrHandleStat*)handle) ) {
622:
return -
AG903_EINVAL;
623: }
624: (*ch) = (uint8_t)get_ch;
625:
626:
return AG903_ENONE;
627: }
628:
629:
634:
static int32_t UARTMgr_SetParam(uint8_t ch,
AG903_UARTMgrParam* param)
635: {
636: int32_t retval =
AG903_ENONE;
637:
638:
if( (
AG903_UART_CH_NUM <= ch) ||
639: (NULL == param) ){
640:
return -
AG903_EINVAL;
641: }
642:
643:
do {
644: retval = UARTMgr_SetBaudrate(ch, param->baud);
645:
if(
AG903_ENONE != retval) {
646:
break;
647: }
648:
649: retval = UARTMgr_SetForm(ch, param->parity, param->stopbit, param->databit);
650:
if(
AG903_ENONE != retval) {
651:
break;
652: }
653:
654: retval = UARTMgr_SetFifo(ch, AG903_UART_RXTRGL_1, AG903_UART_TXTRGL_3,
true);
655:
if(
AG903_ENONE != retval) {
656:
break;
657: }
658:
659: retval = UARTMgr_SetFlow(ch, param->flow);
660:
if(
AG903_ENONE != retval) {
661:
break;
662: }
663:
664:
AG903_UARTPrmSetDmaMode(ch, AG903_UART_DMA_MODE0);
665:
666: }
while(0);
667:
668:
return retval;
669: }
670:
671:
676:
static int32_t UARTMgr_SetBaudrate(uint8_t ch, uint32_t baud)
677: {
678: uint32_t limit;
679: uint32_t div;
680: uint8_t pscale;
681:
682:
if(
AG903_UART_CH_NUM <= ch) {
683:
return -
AG903_EINVAL;
684: }
685: limit = (
AG903_UART_CLK >> 4);
686:
if(limit < baud) {
687:
return -
AG903_EINVAL;
688: }
689:
690:
if(115200 <= baud) {
691: pscale = 1;
692: }
693:
else {
694: pscale = 4;
695: }
696: div = (
AG903_UART_CLK/(pscale*baud*16));
697:
if(div & 0xFFFF0000) {
698:
return -
AG903_EINVAL;
699: }
700:
AG903_UARTPrmSetDivisor(ch, pscale, (uint16_t)div);
701:
702:
return AG903_ENONE;
703: }
704:
705:
712:
static int32_t UARTMgr_SetForm(uint8_t ch, uint8_t parity, uint8_t stopbit, uint8_t databit)
713: {
714: uint8_t parity_type;
715: uint8_t length_type;
716:
717:
if(
AG903_UART_CH_NUM <= ch) {
718:
return -
AG903_EINVAL;
719: }
720:
721:
if(
AG903_UART_PARITY_NON == parity) {
722: parity_type = AG903_UART_PARITY_TYPE_NON;
723: }
724:
else if(
AG903_UART_PARITY_EVEN == parity) {
725: parity_type = AG903_UART_PARITY_TYPE_EVEN;
726: }
727:
else if(
AG903_UART_PARITY_ODD == parity) {
728: parity_type = AG903_UART_PARITY_TYPE_ODD;
729: }
730:
else {
731:
return -
AG903_EINVAL;
732: }
733:
734:
if((
AG903_UART_STOPBIT_1 == stopbit) && (
AG903_UART_DATBIT_5 == databit)) {
735: length_type = AG903_UART_WORDLEN5_STOP1;
736: }
737:
else if((
AG903_UART_STOPBIT_1 == stopbit) && (
AG903_UART_DATBIT_6 == databit)) {
738: length_type = AG903_UART_WORDLEN6_STOP1;
739: }
740:
else if((
AG903_UART_STOPBIT_1 == stopbit) && (
AG903_UART_DATBIT_7 == databit)) {
741: length_type = AG903_UART_WORDLEN7_STOP1;
742: }
743:
else if((
AG903_UART_STOPBIT_1 == stopbit) && (
AG903_UART_DATBIT_8 == databit)) {
744: length_type = AG903_UART_WORDLEN8_STOP1;
745: }
746:
else if((
AG903_UART_STOPBIT_1_5 == stopbit) && (
AG903_UART_DATBIT_5 == databit)) {
747: length_type = AG903_UART_WORDLEN5_STOP15;
748: }
749:
else if((
AG903_UART_STOPBIT_2 == stopbit) && (
AG903_UART_DATBIT_6 == databit)) {
750: length_type = AG903_UART_WORDLEN6_STOP2;
751: }
752:
else if((
AG903_UART_STOPBIT_2 == stopbit) && (
AG903_UART_DATBIT_7 == databit)) {
753: length_type = AG903_UART_WORDLEN7_STOP2;
754: }
755:
else if((
AG903_UART_STOPBIT_2 == stopbit) && (
AG903_UART_DATBIT_8 == databit)) {
756: length_type = AG903_UART_WORDLEN8_STOP2;
757: }
758:
else {
759:
return -
AG903_EINVAL;
760: }
761:
762:
AG903_UARTPrmSetWordLength(ch, parity_type, length_type);
763:
764:
return AG903_ENONE;
765: }
766:
767:
774:
static int32_t UARTMgr_SetFifo(uint8_t ch, uint8_t rx_trgl, uint8_t tx_trgl, _Bool enable)
775: {
776:
777:
if(
AG903_UART_CH_NUM <= ch) {
778:
return -
AG903_EINVAL;
779: }
780:
781:
AG903_UARTPrmDisableFifo(ch);
782:
783:
if(
true == enable) {
784:
AG903_UARTPrmSetFifoTrigger(ch, rx_trgl, tx_trgl);
785:
AG903_UARTPrmEnableFifo(ch);
786: }
787:
788:
return AG903_ENONE;
789: }
790:
791:
796:
static int32_t UARTMgr_SetFlow(uint8_t ch, uint8_t flow)
797: {
798:
if(
AG903_UART_CH_NUM <= ch) {
799:
return -
AG903_EINVAL;
800: }
801:
if((
AG903_UART_FLOW_CTS != flow) && (
AG903_UART_FLOW_NON != flow)) {
802:
return -
AG903_EINVAL;
803: }
804:
805:
AG903_UARTPrmDisableFlowControl(ch,
AG903_UART_FLOW_ALL_BIT);
806:
807:
if(flow ==
AG903_UART_FLOW_CTS) {
808:
AG903_UARTPrmEnableFlowControl(ch, (
AG903_UART_FLOW_RTS_BIT|
AG903_UART_FLOW_CTS_BIT));
809: }
810:
811:
return AG903_ENONE;
812: }
813:
814:
817:
static void UARTMgr_Inthdr0(
void)
818: {
819: UARTMgr_IntProcess(0);
820:
return;
821: }
822:
823:
826:
static void UARTMgr_Inthdr1(
void)
827: {
828: UARTMgr_IntProcess(1);
829:
return;
830: }
831:
832:
835:
static void UARTMgr_Inthdr2(
void)
836: {
837: UARTMgr_IntProcess(2);
838:
return;
839: }
840:
841:
844:
static void UARTMgr_Inthdr3(
void)
845: {
846: UARTMgr_IntProcess(3);
847:
return;
848: }
849:
850:
854:
static void UARTMgr_IntProcess(uint8_t ch)
855: {
856: int32_t result =
AG903_ENONE;
857: uint32_t sndevent = 0;
858: uint32_t rcvevent = 0;
859: uint8_t inttype;
860:
861:
AG903_UARTPrmGetIntType(ch, &inttype);
862:
863:
if(AG903_UART_STAT_SEND == UartChStat[ch].snd.stat) {
864: result = UARTMgr_IntSend(ch, inttype, &sndevent);
865:
if(
AG903_ENONE != result) {
866:
867: }
868: }
869:
if(AG903_UART_STAT_RECEIVE == UartChStat[ch].rcv.stat) {
870: result = UARTMgr_IntReceive(ch, inttype, &rcvevent);
871:
if(
AG903_ENONE != result) {
872:
873: }
874: }
875:
876:
if( (NULL != UartHandleStat[ch].clbk) &&
877: ((0 != sndevent) || (0 != rcvevent)) ) {
878: UartHandleStat[ch].clbk((
AG903_UARTMgrHandle*)&UartHandleStat[ch], (sndevent|rcvevent));
879: }
880:
881:
return;
882: }
883:
884:
890:
static int32_t UARTMgr_IntSend(uint8_t ch, uint8_t inttype, uint32_t* event)
891: {
892: int32_t retval =
AG903_ENONE;
893: uint32_t sndsz;
894:
895: (*event) = 0;
896:
897:
if( (
AG903_UART_CH_NUM <= ch) ||
898: (NULL == event) ) {
899:
return -
AG903_EINVAL;
900: }
901:
902:
if(
AG903_UART_INT_THREMPTY == inttype) {
903:
if(
true == UartChStat[ch].snd.dma) {
904: (*event) |=
AG903_UART_EVENT_SNDEMPTY;
905: }
906:
else {
907:
if(UartChStat[ch].snd.size <= UartChStat[ch].snd.cnt) {
908:
AG903_UARTPrmDisableInt(ch,
AG903_UART_IER_THREMP_BIT);
909: UartChStat[ch].snd.stat = AG903_UART_STAT_IDLE;
910: (*event) |=
AG903_UART_EVENT_SNDEND;
911: }
912:
else {
913: sndsz = (UartChStat[ch].snd.size - UartChStat[ch].snd.cnt);
914:
if(
AG903_UART_FIFO_SIZE < sndsz) {
915: sndsz =
AG903_UART_FIFO_SIZE;
916: }
917:
AG903_UARTPrmSendData(ch, (uint8_t*)(UartChStat[ch].snd.buf+UartChStat[ch].snd.cnt), sndsz);
918: UartChStat[ch].snd.cnt += sndsz;
919: }
920: }
921: }
922:
923:
return retval;
924: }
925:
926:
932:
static int32_t UARTMgr_IntReceive(uint8_t ch, uint8_t inttype, uint32_t* event)
933: {
934: int32_t retval =
AG903_ENONE;
935: int32_t result;
936: uint32_t rs485event;
937:
938:
939: (*event) = 0;
940:
941:
if( (
AG903_UART_CH_NUM <= ch) ||
942: (NULL == event) ) {
943:
return -
AG903_EINVAL;
944: }
945:
946:
switch(inttype) {
947:
case AG903_UART_INT_LINESTATUS:
948: result = UARTMgr_IntLineStatus(ch, event);
949:
if(
AG903_ENONE != result) {
950:
951: }
952:
break;
953:
case AG903_UART_INT_DATAREADY:
954:
if(
false == UartChStat[ch].rcv.dma) {
955: (*event) |=
AG903_UART_EVENT_DATARDY;
956: }
957:
break;
958:
case AG903_UART_INT_RCVTIMEOUT:
959: (*event) |=
AG903_UART_EVENT_RCVTIMEOUT;
960:
break;
961:
default:
962:
963:
break;
964: }
965:
966:
if(
true == UartChStat[ch].rs485) {
967: result = UARTMgr_IntRs485Status(ch, &rs485event);
968:
if(
AG903_ENONE == result) {
969: (*event) |= rs485event;
970: }
971: }
972:
973:
return retval;
974: }
975:
976:
981:
static int32_t UARTMgr_IntLineStatus(uint8_t ch, uint32_t* event)
982: {
983: int32_t retval =
AG903_ENONE;
984: uint8_t linest;
985:
986: (*event) = 0;
987:
988:
if( (
AG903_UART_CH_NUM <= ch) ||
989: (NULL == event) ) {
990:
return -
AG903_EINVAL;
991: }
992:
993:
AG903_UARTPrmGetLineStatus(ch, &linest);
994:
995:
if(
AG903_UART_LSR_FIFOERR_BIT & linest) {
996: (*event) |=
AG903_UART_EVENT_FIFOERR;
997: }
998:
if(
AG903_UART_LSR_BREAK_BIT & linest) {
999: (*event) |=
AG903_UART_EVENT_BREAK;
1000: }
1001:
if(
AG903_UART_LSR_FRAMING_BIT & linest) {
1002: (*event) |=
AG903_UART_EVENT_FRAMINGERR;
1003: }
1004:
if(
AG903_UART_LSR_PARITY_BIT & linest) {
1005: (*event) |=
AG903_UART_EVENT_PARITYERR;
1006: }
1007:
if(
AG903_UART_LSR_OVERRUN_BIT & linest) {
1008: (*event) |=
AG903_UART_EVENT_OVERRUN;
1009: }
1010:
if(
AG903_UART_LSR_DATARDY_BIT & linest) {
1011: (*event) |=
AG903_UART_EVENT_DATARDY;
1012: }
1013:
1014:
return retval;
1015: }
1016:
1017:
1022:
static int32_t UARTMgr_IntRs485Status(uint8_t ch, uint32_t* event)
1023: {
1024: int32_t retval =
AG903_ENONE;
1025: uint32_t stat;
1026:
1027: (*event) = 0;
1028:
1029:
if( (
AG903_UART_CH_NUM <= ch) ||
1030: (NULL == event) ) {
1031:
return -
AG903_EINVAL;
1032: }
1033:
1034:
AG903_UARTPrmGetRs485Status(ch, &stat);
1035:
1036:
if(
AG903_UART_DETECT_RTO_BIT & stat) {
1037: (*event) |=
AG903_UART_EVENT_RS485_RTO;
1038: }
1039:
if(
AG903_UART_DETECT_CTO_BIT & stat) {
1040: (*event) |=
AG903_UART_EVENT_RS485_CTO;
1041: }
1042:
AG903_UARTPrmClerTimeoutStatus(ch,
AG903_UART_DETECT_ALL_BIT);
1043:
1044:
return retval;
1045: }