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eqsprm.c

EQS Primitive

EQS Primitive Layer.

none

AXELL CORPORATION

2017_09_04 初版 

2017_10_26 Ver2.0

1: 9: 10: 14: 15: 16: #include "AG903_common.h" 17: 18: #include "register/AG903_eqsreg.h" 19: #include "eqs/eqsprm.h" 20: #include "eqs/eqsctl.h" 21: 22: 28: void AG903_EQSPrmSetMOD(uint8_t mode) 29: { 30: AG903_EQS->MOD = (uint32_t)((mode<<AG903_EQS_MOD_CM_POS)&AG903_EQS_MOD_CM_MSK); 31: 32: return; 33: } 34: 35: 41: void AG903_EQSPrmGetMOD(uint8_t* mode) 42: { 43: uint32_t val; 44: 45: ASSERT(mode != NULL); 46: 47: val = AG903_EQS->MOD; 48: (*mode) = (uint8_t)((val&AG903_EQS_MOD_CM_MSK)>>AG903_EQS_MOD_CM_POS); 49: 50: return; 51: } 52: 53: 60: void AG903_EQSPrmSetDivide(uint16_t div) 61: { 62: ASSERT(div >= AG903_EQS_DIVIDE_MIN); 63: 64: AG903_EQS->DIVIDE = (uint32_t)((div<<AG903_EQS_DIVIDE_DIV_POS)&AG903_EQS_DIVIDE_DIV_MSK); 65: 66: return; 67: } 68: 69: 75: void AG903_EQSPrmGetDivide(uint16_t* div) 76: { 77: uint32_t val; 78: 79: ASSERT(div != NULL); 80: 81: val = AG903_EQS->DIVIDE; 82: (*div) = (uint16_t)((val&AG903_EQS_DIVIDE_DIV_MSK)>>AG903_EQS_DIVIDE_DIV_POS); 83: 84: return; 85: } 86: 87: 94: void AG903_EQSPrmSetWaitCycle(uint16_t count) 95: { 96: AG903_EQS->WAITCYCLE = (uint32_t)((count<<AG903_EQS_WAITCYCLE_COUNT_POS)&AG903_EQS_WAITCYCLE_COUNT_MSK); 97: 98: return; 99: } 100: 101: 107: void AG903_EQSPrmGetWaitCycle(uint16_t* count) 108: { 109: uint32_t val; 110: 111: ASSERT(count != NULL); 112: 113: val = AG903_EQS->WAITCYCLE; 114: (*count) = (uint16_t)((val&AG903_EQS_WAITCYCLE_COUNT_MSK)>>AG903_EQS_WAITCYCLE_COUNT_POS); 115: 116: return; 117: } 118: 119: 127: void AG903_EQSPrmGetAddress(uint8_t area, uint32_t* addr) 128: { 129: ASSERT(area < AG903_EQS_AREA_MAX); 130: ASSERT(addr != NULL); 131: 132: (*addr) = (uint32_t)(AG903_EQS_AREA_BASE + AG903_EQS_AREA_SIZ * area); 133: 134: return; 135: } 136: 137: 145: void AG903_EQSPrmSetRdFORMAT(uint8_t area, AG903_EQSPrmFormat* format) 146: { 147: uint32_t val = 0; 148: 149: ASSERT(area < AG903_EQS_AREA_MAX); 150: ASSERT(format != NULL); 151: 152: val |= (uint32_t)((format->command <<AG903_EQS_RDFMT0_CMD_POS)&AG903_EQS_RDFMT0_CMD_MSK); 153: val |= (uint32_t)((format->wait <<AG903_EQS_RDFMT0_WW_POS) &AG903_EQS_RDFMT0_WW_MSK); 154: val |= (uint32_t)((format->addr_len<<AG903_EQS_RDFMT0_AW_POS) &AG903_EQS_RDFMT0_AW_MSK); 155: val |= (uint32_t)((format->flow <<AG903_EQS_RDFMT0_FC_POS) &AG903_EQS_RDFMT0_FC_MSK); 156: 157: switch(area) { 158: case 0: 159: AG903_EQS->RDFMT0 = val; 160: break; 161: case 1: 162: AG903_EQS->RDFMT1 = val; 163: break; 164: case 2: 165: AG903_EQS->RDFMT2 = val; 166: break; 167: case 3: 168: AG903_EQS->RDFMT3 = val; 169: break; 170: } 171: 172: return; 173: } 174: 175: 183: void AG903_EQSPrmSetWrFORMAT(uint8_t area, AG903_EQSPrmFormat* format) 184: { 185: uint32_t val = 0; 186: 187: ASSERT(area < AG903_EQS_AREA_MAX); 188: ASSERT(format != NULL); 189: 190: val |= (uint32_t)((format->command <<AG903_EQS_WRFMT0_CMD_POS)&AG903_EQS_WRFMT0_CMD_MSK); 191: val |= (uint32_t)((format->wait <<AG903_EQS_WRFMT0_WW_POS) &AG903_EQS_WRFMT0_WW_MSK); 192: val |= (uint32_t)((format->data_len<<AG903_EQS_WRFMT0_DW_POS) &AG903_EQS_WRFMT0_DW_MSK); 193: val |= (uint32_t)((format->addr_len<<AG903_EQS_WRFMT0_AW_POS) &AG903_EQS_WRFMT0_AW_MSK); 194: val |= (uint32_t)((format->flow <<AG903_EQS_WRFMT0_FC_POS) &AG903_EQS_WRFMT0_FC_MSK); 195: 196: switch(area) { 197: case 0: 198: AG903_EQS->WRFMT0 = val; 199: break; 200: case 1: 201: AG903_EQS->WRFMT1 = val; 202: break; 203: case 2: 204: AG903_EQS->WRFMT2 = val; 205: break; 206: case 3: 207: AG903_EQS->WRFMT3 = val; 208: break; 209: } 210: 211: return; 212: }
 
名前 
説明 
 
Addressレジスタからの読み込み. 
 
DIVIDEレジスタからの読み込み. 
 
MODレジスタからの読み込み. 
 
WaitCycleレジスタからの読み込み. 
 
DIVIDEレジスタへの書き込み. 
 
MODレジスタへの書き込み. 
 
RdFORMATレジスタへの書き込み. 
 
WaitCycleレジスタへの書き込み. 
 
WrFORMATレジスタへの書き込み. 
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