1:
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15:
16:
#include "AG903_common.h"
17:
18:
#include "dsp/dspprm.h"
19:
#include "dsp/dspmgr.h"
20:
21:
28:
void AG903_DSPPrmGetCTRL(uint8_t ch, uint32_t *don)
29: {
30:
ASSERT(ch <
AG903_DSP_CH_NUM);
31:
32: uint32_t reg =
AG903_DSPn(ch)->CTRL;
33: *don = (reg &
AG903_DSPn_CTRL_DON_MSK) >>
AG903_DSPn_CTRL_DON_POS;
34: }
35:
36:
43:
void AG903_DSPPrmSetCTRL(uint8_t ch, uint32_t don)
44: {
45:
ASSERT(ch <
AG903_DSP_CH_NUM);
46:
47:
AG903_DSPn(ch)->CTRL = (don <<
AG903_DSPn_CTRL_DON_POS) &
AG903_DSPn_CTRL_DON_MSK;
48: }
49:
50:
58:
void AG903_DSPPrmGetMOD(uint8_t ch,
DSPPrmParamMOD *mod)
59: {
60:
ASSERT(ch <
AG903_DSP_CH_NUM);
61:
62: uint32_t reg =
AG903_DSPn(ch)->MOD;
63: mod->de = (reg &
AG903_DSPn_MOD_DE_MSK ) >>
AG903_DSPn_MOD_DE_POS;
64: mod->ip = (reg &
AG903_DSPn_MOD_IP_MSK ) >>
AG903_DSPn_MOD_IP_POS;
65: mod->upd = (reg &
AG903_DSPn_MOD_UPD_MSK ) >>
AG903_DSPn_MOD_UPD_POS;
66: mod->bmr = (reg &
AG903_DSPn_MOD_BMR_MSK ) >>
AG903_DSPn_MOD_BMR_POS;
67: mod->lut = (reg &
AG903_DSPn_MOD_LUT_MSK ) >>
AG903_DSPn_MOD_LUT_POS;
68: mod->dith = (reg &
AG903_DSPn_MOD_DITH_MSK) >>
AG903_DSPn_MOD_DITH_POS;
69: }
70:
71:
79:
void AG903_DSPPrmSetMOD(uint8_t ch,
DSPPrmParamMOD *mod)
80: {
81:
ASSERT(ch <
AG903_DSP_CH_NUM);
82:
83: uint32_t reg = 0;
84: reg |= (mod->de <<
AG903_DSPn_MOD_DE_POS ) &
AG903_DSPn_MOD_DE_MSK;
85: reg |= (mod->ip <<
AG903_DSPn_MOD_IP_POS ) &
AG903_DSPn_MOD_IP_MSK;
86: reg |= (mod->upd <<
AG903_DSPn_MOD_UPD_POS ) &
AG903_DSPn_MOD_UPD_MSK;
87: reg |= (mod->bmr <<
AG903_DSPn_MOD_BMR_POS ) &
AG903_DSPn_MOD_BMR_MSK;
88: reg |= (mod->lut <<
AG903_DSPn_MOD_LUT_POS ) &
AG903_DSPn_MOD_LUT_MSK;
89: reg |= (mod->dith <<
AG903_DSPn_MOD_DITH_POS) &
AG903_DSPn_MOD_DITH_MSK;
90:
91:
AG903_DSPn(ch)->MOD = reg;
92: }
93:
94:
102:
void AG903_DSPPrmGetSYNC(uint8_t ch,
DSPPrmParamSYNC *sync)
103: {
104:
ASSERT(ch <
AG903_DSP_CH_NUM);
105:
106: uint32_t reg =
AG903_DSPn(ch)->SYNC;
107: sync->sel = (reg &
AG903_DSPn_SYNC_SEL_MSK) >>
AG903_DSPn_SYNC_SEL_POS;
108: sync->dly = (reg &
AG903_DSPn_SYNC_DLY_MSK) >>
AG903_DSPn_SYNC_DLY_POS;
109: sync->ip = (reg &
AG903_DSPn_SYNC_IP_MSK ) >>
AG903_DSPn_SYNC_IP_POS;
110: sync->vp = (reg &
AG903_DSPn_SYNC_VP_MSK ) >>
AG903_DSPn_SYNC_VP_POS;
111: sync->fp = (reg &
AG903_DSPn_SYNC_FP_MSK ) >>
AG903_DSPn_SYNC_FP_POS;
112: sync->msk = (reg &
AG903_DSPn_SYNC_MSK_MSK) >>
AG903_DSPn_SYNC_MSK_POS;
113: }
114:
115:
123:
void AG903_DSPPrmSetSYNC(uint8_t ch,
DSPPrmParamSYNC *sync)
124: {
125:
ASSERT(ch <
AG903_DSP_CH_NUM);
126:
127: uint32_t reg = 0;
128: reg |= (sync->sel <<
AG903_DSPn_SYNC_SEL_POS) &
AG903_DSPn_SYNC_SEL_MSK;
129: reg |= (sync->dly <<
AG903_DSPn_SYNC_DLY_POS) &
AG903_DSPn_SYNC_DLY_MSK;
130: reg |= (sync->ip <<
AG903_DSPn_SYNC_IP_POS ) &
AG903_DSPn_SYNC_IP_MSK;
131: reg |= (sync->vp <<
AG903_DSPn_SYNC_VP_POS ) &
AG903_DSPn_SYNC_VP_MSK;
132: reg |= (sync->fp <<
AG903_DSPn_SYNC_FP_POS ) &
AG903_DSPn_SYNC_FP_MSK;
133: reg |= (sync->msk <<
AG903_DSPn_SYNC_MSK_POS) &
AG903_DSPn_SYNC_MSK_MSK;
134:
135:
AG903_DSPn(ch)->SYNC = reg;
136: }
137:
138:
145:
void AG903_DSPPrmGetBGCOL(uint8_t ch, uint32_t *bgcol)
146: {
147:
ASSERT(ch <
AG903_DSP_CH_NUM);
148:
149: *bgcol =
AG903_DSPn(ch)->BGCOL;
150: }
151:
152:
159:
void AG903_DSPPrmSetBGCOL(uint8_t ch, uint32_t bgcol)
160: {
161:
ASSERT(ch <
AG903_DSP_CH_NUM);
162:
163:
AG903_DSPn(ch)->BGCOL = bgcol;
164: }
165:
166:
174:
void AG903_DSPPrmGetWINNUM(uint8_t ch, uint32_t *act, uint32_t *conf)
175: {
176:
ASSERT(ch <
AG903_DSP_CH_NUM);
177:
ASSERT(act != NULL);
178:
ASSERT(conf != NULL);
179:
180: uint32_t reg =
AG903_DSPn(ch)->WINNUM;
181: *act = (reg &
AG903_DSPn_WINNUM_ACT_MSK ) >>
AG903_DSPn_WINNUM_ACT_POS;
182: *conf = (reg &
AG903_DSPn_WINNUM_CONF_MSK) >>
AG903_DSPn_WINNUM_CONF_POS;
183: }
184:
185:
192:
void AG903_DSPPrmSetWINNUM(uint8_t ch, uint32_t conf)
193: {
194:
ASSERT(ch <
AG903_DSP_CH_NUM);
195:
196:
AG903_DSPn(ch)->WINNUM = (conf <<
AG903_DSPn_WINNUM_CONF_POS) &
AG903_DSPn_WINNUM_CONF_MSK;
197: }
198:
199:
206:
void AG903_DSPPrmGetWATNUM(uint8_t ch, uint32_t *num)
207: {
208:
ASSERT(ch <
AG903_DSP_CH_NUM);
209:
ASSERT(num != NULL);
210:
211: *num = (
AG903_DSPn(ch)->WATNUM &
AG903_DSPn_WATNUM_NUM_MSK) >>
AG903_DSPn_WATNUM_NUM_POS;
212: }
213:
214:
221:
void AG903_DSPPrmSetWATNUM(uint8_t ch, uint32_t num)
222: {
223:
ASSERT(ch <
AG903_DSP_CH_NUM);
224:
225:
AG903_DSPn(ch)->WATNUM = (num <<
AG903_DSPn_WATNUM_NUM_POS) &
AG903_DSPn_WATNUM_NUM_MSK;
226: }
227:
228:
235:
void AG903_DSPPrmGetWATBASE(uint8_t ch, uint32_t *addr)
236: {
237:
ASSERT(ch <
AG903_DSP_CH_NUM);
238:
ASSERT(addr != NULL);
239:
240: *addr =
AG903_DSPn(ch)->WATBASE;
241: }
242:
243:
250:
void AG903_DSPPrmSetWATBASE(uint8_t ch, uint32_t addr)
251: {
252:
ASSERT(ch <
AG903_DSP_CH_NUM);
253:
254:
AG903_DSPn(ch)->WATBASE = addr &
AG903_DSPn_WATBASE_ADDR_MSK;
255: }
256:
257:
265:
void AG903_DSPPrmGetLSTCTRL(uint8_t ch, uint32_t *pal, uint32_t *wat)
266: {
267:
ASSERT(ch <
AG903_DSP_CH_NUM);
268:
ASSERT(pal != NULL);
269:
ASSERT(wat != NULL);
270:
271: uint32_t reg =
AG903_DSPn(ch)->LSTCTRL;
272: *pal = (reg &
AG903_DSPn_LSTCTRL_PAL_MSK) >>
AG903_DSPn_LSTCTRL_PAL_POS;
273: *wat = (reg &
AG903_DSPn_LSTCTRL_WAT_MSK) >>
AG903_DSPn_LSTCTRL_WAT_POS;
274: }
275:
276:
285:
void AG903_DSPPrmSetLSTCTRL(uint8_t ch, uint32_t pal, uint32_t wat)
286: {
287:
ASSERT(ch <
AG903_DSP_CH_NUM);
288:
289: uint32_t reg = 0;
290: reg |= (pal <<
AG903_DSPn_LSTCTRL_PAL_POS) &
AG903_DSPn_LSTCTRL_PAL_MSK;
291: reg |= (wat <<
AG903_DSPn_LSTCTRL_WAT_POS) &
AG903_DSPn_LSTCTRL_WAT_MSK;
292:
AG903_DSPn(ch)->LSTCTRL = reg;
293: }
294:
295:
302:
void AG903_DSPPrmGetHRZPRM0(uint8_t ch, uint32_t *hpw)
303: {
304:
ASSERT(ch <
AG903_DSP_CH_NUM);
305:
ASSERT(hpw != NULL);
306:
307: *hpw = (
AG903_DSPn(ch)->HRZPRM0 &
AG903_DSPn_HRZPRM0_HPW_MSK) >>
AG903_DSPn_HRZPRM0_HPW_POS;
308: }
309:
310:
317:
void AG903_DSPPrmSetHRZPRM0(uint8_t ch, uint32_t hpw)
318: {
319:
ASSERT(ch <
AG903_DSP_CH_NUM);
320:
321:
AG903_DSPn(ch)->HRZPRM0 = (hpw <<
AG903_DSPn_HRZPRM0_HPW_POS) &
AG903_DSPn_HRZPRM0_HPW_MSK;
322: }
323:
324:
332:
void AG903_DSPPrmGetHRZPRM1(uint8_t ch, uint32_t *hfp, uint32_t *hbp)
333: {
334:
ASSERT(ch <
AG903_DSP_CH_NUM);
335:
ASSERT(hfp != NULL);
336:
ASSERT(hbp != NULL);
337:
338: uint32_t reg =
AG903_DSPn(ch)->HRZPRM1;
339: *hfp = (reg &
AG903_DSPn_HRZPRM1_HFP_MSK) >>
AG903_DSPn_HRZPRM1_HFP_POS;
340: *hbp = (reg &
AG903_DSPn_HRZPRM1_HBP_MSK) >>
AG903_DSPn_HRZPRM1_HBP_POS;
341: }
342:
343:
351:
void AG903_DSPPrmSetHRZPRM1(uint8_t ch, uint32_t hfp, uint32_t hbp)
352: {
353:
ASSERT(ch <
AG903_DSP_CH_NUM);
354:
355: uint32_t reg = 0;
356: reg |= (hfp <<
AG903_DSPn_HRZPRM1_HFP_POS) &
AG903_DSPn_HRZPRM1_HFP_MSK;
357: reg |= (hbp <<
AG903_DSPn_HRZPRM1_HBP_POS) &
AG903_DSPn_HRZPRM1_HBP_MSK;
358:
AG903_DSPn(ch)->HRZPRM1 = reg;
359: }
360:
361:
369:
void AG903_DSPPrmGetVTPRM0(uint8_t ch,
DSPPrmParamVTPRM0 *vtprm0)
370: {
371:
ASSERT(ch <
AG903_DSP_CH_NUM);
372:
ASSERT(vtprm0 != NULL);
373:
374: uint32_t reg =
AG903_DSPn(ch)->VTPRM0;
375: vtprm0->vpw = (reg &
AG903_DSPn_VTPRM0_VPW_MSK) >>
AG903_DSPn_VTPRM0_VPW_POS;
376: vtprm0->ofp = (reg &
AG903_DSPn_VTPRM0_OFP_MSK) >>
AG903_DSPn_VTPRM0_OFP_POS;
377: vtprm0->obp = (reg &
AG903_DSPn_VTPRM0_OBP_MSK) >>
AG903_DSPn_VTPRM0_OBP_POS;
378: vtprm0->efp = (reg &
AG903_DSPn_VTPRM0_EFP_MSK) >>
AG903_DSPn_VTPRM0_EFP_POS;
379: vtprm0->ebp = (reg &
AG903_DSPn_VTPRM0_EBP_MSK) >>
AG903_DSPn_VTPRM0_EBP_POS;
380: }
381:
382:
390:
void AG903_DSPPrmSetVTPRM0(uint8_t ch,
DSPPrmParamVTPRM0 *vtprm0)
391: {
392:
ASSERT(ch <
AG903_DSP_CH_NUM);
393:
394: uint32_t reg = 0;
395: reg |= (vtprm0->vpw <<
AG903_DSPn_VTPRM0_VPW_POS) &
AG903_DSPn_VTPRM0_VPW_MSK;
396: reg |= (vtprm0->ofp <<
AG903_DSPn_VTPRM0_OFP_POS) &
AG903_DSPn_VTPRM0_OFP_MSK;
397: reg |= (vtprm0->obp <<
AG903_DSPn_VTPRM0_OBP_POS) &
AG903_DSPn_VTPRM0_OBP_MSK;
398: reg |= (vtprm0->efp <<
AG903_DSPn_VTPRM0_EFP_POS) &
AG903_DSPn_VTPRM0_EFP_MSK;
399: reg |= (vtprm0->ebp <<
AG903_DSPn_VTPRM0_EBP_POS) &
AG903_DSPn_VTPRM0_EBP_MSK;
400:
401:
AG903_DSPn(ch)->VTPRM0 = reg;
402: }
403:
404:
412:
void AG903_DSPPrmGetVTPRM1(uint8_t ch, uint32_t *vfp, uint32_t *vbp)
413: {
414:
ASSERT(ch <
AG903_DSP_CH_NUM);
415:
ASSERT(vfp != NULL);
416:
ASSERT(vbp != NULL);
417:
418: uint32_t reg =
AG903_DSPn(ch)->VTPRM1;
419: *vfp = (reg &
AG903_DSPn_VTPRM1_VFP_MSK) >>
AG903_DSPn_VTPRM1_VFP_POS;
420: *vbp = (reg &
AG903_DSPn_VTPRM1_VBP_MSK) >>
AG903_DSPn_VTPRM1_VBP_POS;
421: }
422:
423:
431:
void AG903_DSPPrmSetVTPRM1(uint8_t ch, uint32_t vfp, uint32_t vbp)
432: {
433:
ASSERT(ch <
AG903_DSP_CH_NUM);
434:
435: uint32_t reg = 0;
436: reg |= (vfp <<
AG903_DSPn_VTPRM1_VFP_POS) &
AG903_DSPn_VTPRM1_VFP_MSK;
437: reg |= (vbp <<
AG903_DSPn_VTPRM1_VBP_POS) &
AG903_DSPn_VTPRM1_VBP_MSK;
438:
AG903_DSPn(ch)->VTPRM1 = reg;
439: }
440:
441:
449:
void AG903_DSPPrmGetFRMSIZE(uint8_t ch, uint32_t *vfs, uint32_t *hfs)
450: {
451:
ASSERT(ch <
AG903_DSP_CH_NUM);
452:
ASSERT(vfs != NULL);
453:
ASSERT(hfs != NULL);
454:
455: uint32_t reg =
AG903_DSPn(ch)->FRMSIZE;
456: *vfs = (reg &
AG903_DSPn_FRMSIZE_VFS_MSK) >>
AG903_DSPn_FRMSIZE_VFS_POS;
457: *hfs = (reg &
AG903_DSPn_FRMSIZE_HFS_MSK) >>
AG903_DSPn_FRMSIZE_HFS_POS;
458: }
459:
460:
468:
void AG903_DSPPrmSetFRMSIZE(uint8_t ch, uint32_t vfs, uint32_t hfs)
469: {
470:
ASSERT(ch <
AG903_DSP_CH_NUM);
471:
472: uint32_t reg = 0;
473: reg |= (vfs <<
AG903_DSPn_FRMSIZE_VFS_POS) &
AG903_DSPn_FRMSIZE_VFS_MSK;
474: reg |= (hfs <<
AG903_DSPn_FRMSIZE_HFS_POS) &
AG903_DSPn_FRMSIZE_HFS_MSK;
475:
AG903_DSPn(ch)->FRMSIZE = reg;
476: }
477:
478:
486:
void AG903_DSPPrmGetCDCTRL(uint8_t ch,
DSPPrmParamCDCTRL *cdctrl)
487: {
488:
ASSERT(ch <
AG903_DSP_CH_NUM);
489:
ASSERT(cdctrl != NULL);
490:
491: uint32_t reg =
AG903_DSPn(ch)->CDCTRL;
492: cdctrl->be = (reg &
AG903_DSPn_CDCTRL_BE_MSK) >>
AG903_DSPn_CDCTRL_BE_POS;
493: cdctrl->ge = (reg &
AG903_DSPn_CDCTRL_GE_MSK) >>
AG903_DSPn_CDCTRL_GE_POS;
494: cdctrl->re = (reg &
AG903_DSPn_CDCTRL_RE_MSK) >>
AG903_DSPn_CDCTRL_RE_POS;
495: cdctrl->ae = (reg &
AG903_DSPn_CDCTRL_AE_MSK) >>
AG903_DSPn_CDCTRL_AE_POS;
496: }
497:
498:
506:
void AG903_DSPPrmSetCDCTRL(uint8_t ch,
DSPPrmParamCDCTRL *cdctrl)
507: {
508:
ASSERT(ch <
AG903_DSP_CH_NUM);
509:
510: uint32_t reg = 0;
511: reg |= (cdctrl->be <<
AG903_DSPn_CDCTRL_BE_POS) &
AG903_DSPn_CDCTRL_BE_MSK;
512: reg |= (cdctrl->ge <<
AG903_DSPn_CDCTRL_GE_POS) &
AG903_DSPn_CDCTRL_GE_MSK;
513: reg |= (cdctrl->re <<
AG903_DSPn_CDCTRL_RE_POS) &
AG903_DSPn_CDCTRL_RE_MSK;
514: reg |= (cdctrl->ae <<
AG903_DSPn_CDCTRL_AE_POS) &
AG903_DSPn_CDCTRL_AE_MSK;
515:
AG903_DSPn(ch)->CDCTRL = reg;
516: }
517:
518:
526:
void AG903_DSPPrmGetCOLDET(uint8_t ch,
DSPPrmParamCOLDET *coldet)
527: {
528:
ASSERT(ch <
AG903_DSP_CH_NUM);
529:
ASSERT(coldet != NULL);
530:
531: uint32_t reg =
AG903_DSPn(ch)->COLDET;
532: coldet->b = (reg &
AG903_DSPn_COLDET_B_MSK) >>
AG903_DSPn_COLDET_B_POS;
533: coldet->g = (reg &
AG903_DSPn_COLDET_G_MSK) >>
AG903_DSPn_COLDET_G_POS;
534: coldet->r = (reg &
AG903_DSPn_COLDET_R_MSK) >>
AG903_DSPn_COLDET_R_POS;
535: coldet->a = (reg &
AG903_DSPn_COLDET_A_MSK) >>
AG903_DSPn_COLDET_A_POS;
536: }
537:
538:
546:
void AG903_DSPPrmSetCOLDET(uint8_t ch,
DSPPrmParamCOLDET *coldet)
547: {
548:
ASSERT(ch <
AG903_DSP_CH_NUM);
549:
ASSERT(coldet != NULL);
550:
551: uint32_t reg = 0;
552: reg |= (coldet->b <<
AG903_DSPn_COLDET_B_POS) &
AG903_DSPn_COLDET_B_MSK;
553: reg |= (coldet->g <<
AG903_DSPn_COLDET_G_POS) &
AG903_DSPn_COLDET_G_MSK;
554: reg |= (coldet->r <<
AG903_DSPn_COLDET_R_POS) &
AG903_DSPn_COLDET_R_MSK;
555: reg |= (coldet->a <<
AG903_DSPn_COLDET_A_POS) &
AG903_DSPn_COLDET_A_MSK;
556:
AG903_DSPn(ch)->COLDET = reg;
557: }
558:
559:
567:
void AG903_DSPPrmGetDITHAREA0A(uint8_t ch, uint32_t *x0, uint32_t *y0)
568: {
569:
ASSERT(ch <
AG903_DSP_CH_NUM);
570:
ASSERT(y0 != NULL);
571:
ASSERT(x0 != NULL);
572:
573: uint32_t reg =
AG903_DSPn(ch)->DITHAREA0A;
574: *x0 = (reg &
AG903_DSPn_DITHAREA0A_X0_MSK) >>
AG903_DSPn_DITHAREA0A_X0_POS;
575: *y0 = (reg &
AG903_DSPn_DITHAREA0A_Y0_MSK) >>
AG903_DSPn_DITHAREA0A_Y0_POS;
576: }
577:
578:
586:
void AG903_DSPPrmSetDITHAREA0A(uint8_t ch, uint32_t x0, uint32_t y0)
587: {
588:
ASSERT(ch <
AG903_DSP_CH_NUM);
589:
590: uint32_t reg = 0;
591: reg |= (x0 <<
AG903_DSPn_DITHAREA0A_X0_POS) &
AG903_DSPn_DITHAREA0A_X0_MSK;
592: reg |= (y0 <<
AG903_DSPn_DITHAREA0A_Y0_POS) &
AG903_DSPn_DITHAREA0A_Y0_MSK;
593:
AG903_DSPn(ch)->DITHAREA0A = reg;
594: }
595:
596:
604:
void AG903_DSPPrmGetDITHAREA0B(uint8_t ch, uint32_t *x1, uint32_t *y1)
605: {
606:
ASSERT(ch <
AG903_DSP_CH_NUM);
607:
ASSERT(y1 != NULL);
608:
ASSERT(x1 != NULL);
609:
610: uint32_t reg =
AG903_DSPn(ch)->DITHAREA0B;
611: *x1 = (reg &
AG903_DSPn_DITHAREA0B_X1_MSK) >>
AG903_DSPn_DITHAREA0B_X1_POS;
612: *y1 = (reg &
AG903_DSPn_DITHAREA0B_Y1_MSK) >>
AG903_DSPn_DITHAREA0B_Y1_POS;
613: }
614:
615:
623:
void AG903_DSPPrmSetDITHAREA0B(uint8_t ch, uint32_t x1, uint32_t y1)
624: {
625:
ASSERT(ch <
AG903_DSP_CH_NUM);
626:
627: uint32_t reg = 0;
628: reg |= (x1 <<
AG903_DSPn_DITHAREA0B_X1_POS) &
AG903_DSPn_DITHAREA0B_X1_MSK;
629: reg |= (y1 <<
AG903_DSPn_DITHAREA0B_Y1_POS) &
AG903_DSPn_DITHAREA0B_Y1_MSK;
630:
AG903_DSPn(ch)->DITHAREA0B = reg;
631: }
632:
633:
641:
void AG903_DSPPrmGetDITHAREA1A(uint8_t ch, uint32_t *x0, uint32_t *y0)
642: {
643:
ASSERT(ch <
AG903_DSP_CH_NUM);
644:
ASSERT(y0 != NULL);
645:
ASSERT(x0 != NULL);
646:
647: uint32_t reg =
AG903_DSPn(ch)->DITHAREA1A;
648: *x0 = (reg &
AG903_DSPn_DITHAREA1A_X0_MSK) >>
AG903_DSPn_DITHAREA1A_X0_POS;
649: *y0 = (reg &
AG903_DSPn_DITHAREA1A_Y0_MSK) >>
AG903_DSPn_DITHAREA1A_Y0_POS;
650: }
651:
652:
660:
void AG903_DSPPrmSetDITHAREA1A(uint8_t ch, uint32_t x0, uint32_t y0)
661: {
662:
ASSERT(ch <
AG903_DSP_CH_NUM);
663:
664: uint32_t reg = 0;
665: reg |= (x0 <<
AG903_DSPn_DITHAREA1A_X0_POS) &
AG903_DSPn_DITHAREA1A_X0_MSK;
666: reg |= (y0 <<
AG903_DSPn_DITHAREA1A_Y0_POS) &
AG903_DSPn_DITHAREA1A_Y0_MSK;
667:
AG903_DSPn(ch)->DITHAREA1A = reg;
668: }
669:
670:
678:
void AG903_DSPPrmGetDITHAREA1B(uint8_t ch, uint32_t *x1, uint32_t *y1)
679: {
680:
ASSERT(ch <
AG903_DSP_CH_NUM);
681:
ASSERT(y1 != NULL);
682:
ASSERT(x1 != NULL);
683:
684: uint32_t reg =
AG903_DSPn(ch)->DITHAREA1B;
685: *x1 = (reg &
AG903_DSPn_DITHAREA1B_X1_MSK) >>
AG903_DSPn_DITHAREA1B_X1_POS;
686: *y1 = (reg &
AG903_DSPn_DITHAREA1B_Y1_MSK) >>
AG903_DSPn_DITHAREA1B_Y1_POS;
687: }
688:
689:
697:
void AG903_DSPPrmSetDITHAREA1B(uint8_t ch, uint32_t x1, uint32_t y1)
698: {
699:
ASSERT(ch <
AG903_DSP_CH_NUM);
700:
701: uint32_t reg = 0;
702: reg |= (x1 <<
AG903_DSPn_DITHAREA1B_X1_POS) &
AG903_DSPn_DITHAREA1B_X1_MSK;
703: reg |= (y1 <<
AG903_DSPn_DITHAREA1B_Y1_POS) &
AG903_DSPn_DITHAREA1B_Y1_MSK;
704:
AG903_DSPn(ch)->DITHAREA1B = reg;
705: }
706:
707:
715:
void AG903_DSPPrmGetDITHAREA2A(uint8_t ch, uint32_t *x0, uint32_t *y0)
716: {
717:
ASSERT(ch <
AG903_DSP_CH_NUM);
718:
ASSERT(y0 != NULL);
719:
ASSERT(x0 != NULL);
720:
721: uint32_t reg =
AG903_DSPn(ch)->DITHAREA2A;
722: *x0 = (reg &
AG903_DSPn_DITHAREA2A_X0_MSK) >>
AG903_DSPn_DITHAREA2A_X0_POS;
723: *y0 = (reg &
AG903_DSPn_DITHAREA2A_Y0_MSK) >>
AG903_DSPn_DITHAREA2A_Y0_POS;
724: }
725:
726:
734:
void AG903_DSPPrmSetDITHAREA2A(uint8_t ch, uint32_t x0, uint32_t y0)
735: {
736:
ASSERT(ch <
AG903_DSP_CH_NUM);
737:
738: uint32_t reg = 0;
739: reg |= (x0 <<
AG903_DSPn_DITHAREA2A_X0_POS) &
AG903_DSPn_DITHAREA2A_X0_MSK;
740: reg |= (y0 <<
AG903_DSPn_DITHAREA2A_Y0_POS) &
AG903_DSPn_DITHAREA2A_Y0_MSK;
741:
AG903_DSPn(ch)->DITHAREA2A = reg;
742: }
743:
744:
752:
void AG903_DSPPrmGetDITHAREA2B(uint8_t ch, uint32_t *x1, uint32_t *y1)
753: {
754:
ASSERT(ch <
AG903_DSP_CH_NUM);
755:
ASSERT(y1 != NULL);
756:
ASSERT(x1 != NULL);
757:
758: uint32_t reg =
AG903_DSPn(ch)->DITHAREA2B;
759: *x1 = (reg &
AG903_DSPn_DITHAREA2B_X1_MSK) >>
AG903_DSPn_DITHAREA2B_X1_POS;
760: *y1 = (reg &
AG903_DSPn_DITHAREA2B_Y1_MSK) >>
AG903_DSPn_DITHAREA2B_Y1_POS;
761: }
762:
763:
771:
void AG903_DSPPrmSetDITHAREA2B(uint8_t ch, uint32_t x1, uint32_t y1)
772: {
773:
ASSERT(ch <
AG903_DSP_CH_NUM);
774:
775: uint32_t reg = 0;
776: reg |= (x1 <<
AG903_DSPn_DITHAREA2B_X1_POS) &
AG903_DSPn_DITHAREA2B_X1_MSK;
777: reg |= (y1 <<
AG903_DSPn_DITHAREA2B_Y1_POS) &
AG903_DSPn_DITHAREA2B_Y1_MSK;
778:
AG903_DSPn(ch)->DITHAREA2B = reg;
779: }
780:
781:
789:
void AG903_DSPPrmGetDITHAREA3A(uint8_t ch, uint32_t *x0, uint32_t *y0)
790: {
791:
ASSERT(ch <
AG903_DSP_CH_NUM);
792:
ASSERT(y0 != NULL);
793:
ASSERT(x0 != NULL);
794:
795: uint32_t reg =
AG903_DSPn(ch)->DITHAREA3A;
796: *x0 = (reg &
AG903_DSPn_DITHAREA3A_X0_MSK) >>
AG903_DSPn_DITHAREA3A_X0_POS;
797: *y0 = (reg &
AG903_DSPn_DITHAREA3A_Y0_MSK) >>
AG903_DSPn_DITHAREA3A_Y0_POS;
798: }
799:
800:
808:
void AG903_DSPPrmSetDITHAREA3A(uint8_t ch, uint32_t x0, uint32_t y0)
809: {
810:
ASSERT(ch <
AG903_DSP_CH_NUM);
811:
812: uint32_t reg = 0;
813: reg |= (x0 <<
AG903_DSPn_DITHAREA3A_X0_POS) &
AG903_DSPn_DITHAREA3A_X0_MSK;
814: reg |= (y0 <<
AG903_DSPn_DITHAREA3A_Y0_POS) &
AG903_DSPn_DITHAREA3A_Y0_MSK;
815:
AG903_DSPn(ch)->DITHAREA3A = reg;
816: }
817:
818:
826:
void AG903_DSPPrmGetDITHAREA3B(uint8_t ch, uint32_t *x1, uint32_t *y1)
827: {
828:
ASSERT(ch <
AG903_DSP_CH_NUM);
829:
ASSERT(y1 != NULL);
830:
ASSERT(x1 != NULL);
831:
832: uint32_t reg =
AG903_DSPn(ch)->DITHAREA3B;
833: *x1 = (reg &
AG903_DSPn_DITHAREA3B_X1_MSK) >>
AG903_DSPn_DITHAREA3B_X1_POS;
834: *y1 = (reg &
AG903_DSPn_DITHAREA3B_Y1_MSK) >>
AG903_DSPn_DITHAREA3B_Y1_POS;
835: }
836:
837:
845:
void AG903_DSPPrmSetDITHAREA3B(uint8_t ch, uint32_t x1, uint32_t y1)
846: {
847:
ASSERT(ch <
AG903_DSP_CH_NUM);
848:
849: uint32_t reg = 0;
850: reg |= (x1 <<
AG903_DSPn_DITHAREA3B_X1_POS) &
AG903_DSPn_DITHAREA3B_X1_MSK;
851: reg |= (y1 <<
AG903_DSPn_DITHAREA3B_Y1_POS) &
AG903_DSPn_DITHAREA3B_Y1_MSK;
852:
AG903_DSPn(ch)->DITHAREA3B = reg;
853: }
854:
855:
863:
void AG903_DSPPrmGetERRSTAT(uint8_t ch,
DSPPrmParamERRSTAT *errstat)
864: {
865:
ASSERT(ch <
AG903_DSP_CH_NUM);
866:
ASSERT(errstat != NULL);
867:
868: uint32_t reg =
AG903_DSPn(ch)->ERRSTAT;
869: errstat->line = (reg &
AG903_DSPn_ERRSTAT_LINE_MSK) >>
AG903_DSPn_ERRSTAT_LINE_POS;
870: errstat->ue = (reg &
AG903_DSPn_ERRSTAT_UE_MSK ) >>
AG903_DSPn_ERRSTAT_UE_POS;
871: errstat->le = (reg &
AG903_DSPn_ERRSTAT_LE_MSK ) >>
AG903_DSPn_ERRSTAT_LE_POS;
872: errstat->pe = (reg &
AG903_DSPn_ERRSTAT_PE_MSK ) >>
AG903_DSPn_ERRSTAT_PE_POS;
873: }
874:
875:
883:
void AG903_DSPPrmSetERRCLR(uint8_t ch,
DSPPrmParamERRCLR *errclr)
884: {
885:
ASSERT(ch <
AG903_DSP_CH_NUM);
886:
ASSERT(errclr != NULL);
887:
888: uint32_t reg = 0;
889: reg |= (errclr->line <<
AG903_DSPn_ERRCLR_LINE_POS) &
AG903_DSPn_ERRCLR_LINE_MSK;
890: reg |= (errclr->ue <<
AG903_DSPn_ERRCLR_UE_POS ) &
AG903_DSPn_ERRCLR_UE_MSK;
891: reg |= (errclr->le <<
AG903_DSPn_ERRCLR_LE_POS ) &
AG903_DSPn_ERRCLR_LE_MSK;
892: reg |= (errclr->pe <<
AG903_DSPn_ERRCLR_PE_POS ) &
AG903_DSPn_ERRCLR_PE_MSK;
893:
AG903_DSPn(ch)->ERRCLR = reg;
894: }
895:
896:
904:
void AG903_DSPPrmGetINT(uint8_t ch,
DSPPrmParamINT *intprm)
905: {
906:
ASSERT(ch <
AG903_DSP_CH_NUM);
907:
ASSERT(intprm != NULL);
908:
909: uint32_t reg =
AG903_DSPn(ch)->
INT;
910: intprm->line = (reg &
AG903_DSPn_INT_LINE_MSK ) >>
AG903_DSPn_INT_LINE_POS;
911: intprm->fcnt = (reg &
AG903_DSPn_INT_FCNT_MSK ) >>
AG903_DSPn_INT_FCNT_POS;
912: intprm->hline = (reg &
AG903_DSPn_INT_HLINE_MSK) >>
AG903_DSPn_INT_HLINE_POS;
913: intprm->vblk = (reg &
AG903_DSPn_INT_VBLK_MSK ) >>
AG903_DSPn_INT_VBLK_POS;
914: }
915:
916:
924:
void AG903_DSPPrmSetINT(uint8_t ch,
DSPPrmParamINT *intprm)
925: {
926:
ASSERT(ch <
AG903_DSP_CH_NUM);
927:
ASSERT(intprm != NULL);
928:
929: uint32_t reg = 0;
930: reg |= (intprm->line <<
AG903_DSPn_INT_LINE_POS ) &
AG903_DSPn_INT_LINE_MSK;
931: reg |= (intprm->fcnt <<
AG903_DSPn_INT_FCNT_POS ) &
AG903_DSPn_INT_FCNT_MSK;
932: reg |= (intprm->hline <<
AG903_DSPn_INT_HLINE_POS) &
AG903_DSPn_INT_HLINE_MSK;
933: reg |= (intprm->vblk <<
AG903_DSPn_INT_VBLK_POS ) &
AG903_DSPn_INT_VBLK_MSK;
934:
AG903_DSPn(ch)->
INT = reg;
935: }
936:
937:
946:
void AG903_DSPPrmGetTRIGGER(uint8_t ch, uint32_t *out, uint32_t *hrz, uint32_t *vt)
947: {
948:
ASSERT(ch <
AG903_DSP_CH_NUM);
949:
ASSERT(out != NULL);
950:
ASSERT(hrz != NULL);
951:
ASSERT(vt != NULL);
952:
953: uint32_t reg =
AG903_DSPn(ch)->TRIGGER;
954: *out = (reg &
AG903_DSPn_TRIGGER_OUT_MSK ) >>
AG903_DSPn_TRIGGER_OUT_POS;
955: *hrz = (reg &
AG903_DSPn_TRIGGER_HRZ_MSK ) >>
AG903_DSPn_TRIGGER_HRZ_POS;
956: *vt = (reg &
AG903_DSPn_TRIGGER_VT_MSK ) >>
AG903_DSPn_TRIGGER_VT_POS;
957: }
958:
959:
968:
void AG903_DSPPrmSetTRIGGER(uint8_t ch, uint32_t out, uint32_t hrz, uint32_t vt)
969: {
970:
ASSERT(ch <
AG903_DSP_CH_NUM);
971:
972: uint32_t reg = 0;
973: reg |= (out <<
AG903_DSPn_TRIGGER_OUT_POS) &
AG903_DSPn_TRIGGER_OUT_MSK;
974: reg |= (hrz <<
AG903_DSPn_TRIGGER_HRZ_POS) &
AG903_DSPn_TRIGGER_HRZ_MSK;
975: reg |= (vt <<
AG903_DSPn_TRIGGER_VT_POS ) &
AG903_DSPn_TRIGGER_VT_MSK;
976:
AG903_DSPn(ch)->TRIGGER = reg;
977: }
978:
979:
987:
void AG903_DSPPrmGetINTSTAT(uint8_t ch,
DSPPrmParamINTSTAT *intstat)
988: {
989:
ASSERT(ch <
AG903_DSP_CH_NUM);
990:
ASSERT(intstat != NULL);
991:
992: uint32_t reg =
AG903_DSPn(ch)->INTSTAT;
993: intstat->vblk = (reg &
AG903_DSPn_INTSTAT_VBLK_MSK ) >>
AG903_DSPn_INTSTAT_VBLK_POS;
994: intstat->hline = (reg &
AG903_DSPn_INTSTAT_HLINE_MSK) >>
AG903_DSPn_INTSTAT_HLINE_POS;
995: intstat->doff = (reg &
AG903_DSPn_INTSTAT_DOFF_MSK ) >>
AG903_DSPn_INTSTAT_DOFF_POS;
996: intstat->dreq = (reg &
AG903_DSPn_INTSTAT_DREQ_MSK ) >>
AG903_DSPn_INTSTAT_DREQ_POS;
997: }
998:
999:
1008:
void AG903_DSPPrmSetINTCLR(uint8_t ch, uint32_t vblk, uint32_t hline, uint32_t doff)
1009: {
1010:
ASSERT(ch <
AG903_DSP_CH_NUM);
1011:
1012: uint32_t reg = 0;
1013: reg |= (vblk <<
AG903_DSPn_INTCLR_VBLK_POS ) &
AG903_DSPn_INTCLR_VBLK_MSK;
1014: reg |= (hline <<
AG903_DSPn_INTCLR_HLINE_POS) &
AG903_DSPn_INTCLR_HLINE_MSK;
1015: reg |= (doff <<
AG903_DSPn_INTCLR_DOFF_POS ) &
AG903_DSPn_INTCLR_DOFF_MSK;
1016:
AG903_DSPn(ch)->INTCLR = reg;
1017: }
1018:
1019:
1027:
void AG903_DSPPrmGetINTMASK(uint8_t ch,
DSPPrmParamINTMASK *intmask)
1028: {
1029:
ASSERT(ch <
AG903_DSP_CH_NUM);
1030:
ASSERT(intmask != NULL);
1031:
1032: uint32_t reg =
AG903_DSPn(ch)->INTMASK;
1033: intmask->vblk = (reg &
AG903_DSPn_INTMASK_VBLK_MSK ) >>
AG903_DSPn_INTMASK_VBLK_POS;
1034: intmask->hline = (reg &
AG903_DSPn_INTMASK_HLINE_MSK) >>
AG903_DSPn_INTMASK_HLINE_POS;
1035: intmask->doff = (reg &
AG903_DSPn_INTMASK_DOFF_MSK ) >>
AG903_DSPn_INTMASK_DOFF_POS;
1036: intmask->err = (reg &
AG903_DSPn_INTMASK_ERR_MSK ) >>
AG903_DSPn_INTMASK_ERR_POS;
1037: }
1038:
1039:
1047:
void AG903_DSPPrmSetINTMASK(uint8_t ch,
DSPPrmParamINTMASK *intmask)
1048: {
1049:
ASSERT(ch <
AG903_DSP_CH_NUM);
1050:
ASSERT(intmask != NULL);
1051:
1052: uint32_t reg = 0;
1053: reg |= (intmask->vblk <<
AG903_DSPn_INTMASK_VBLK_POS ) &
AG903_DSPn_INTMASK_VBLK_MSK;
1054: reg |= (intmask->hline <<
AG903_DSPn_INTMASK_HLINE_POS) &
AG903_DSPn_INTMASK_HLINE_MSK;
1055: reg |= (intmask->doff <<
AG903_DSPn_INTMASK_DOFF_POS ) &
AG903_DSPn_INTMASK_DOFF_MSK;
1056: reg |= (intmask->err <<
AG903_DSPn_INTMASK_ERR_POS ) &
AG903_DSPn_INTMASK_ERR_MSK;
1057:
AG903_DSPn(ch)->INTMASK = reg;
1058: }
1059:
1060:
1067:
void AG903_DSPPrmGetDMAREQ(uint8_t ch, uint32_t *req)
1068: {
1069:
ASSERT(ch <
AG903_DSP_CH_NUM);
1070:
ASSERT(req != NULL);
1071:
1072: *req = (
AG903_DSPn(ch)->DMAREQ &
AG903_DSPn_DMAREQ_REQ_MSK) >>
AG903_DSPn_DMAREQ_REQ_POS;
1073: }
1074:
1075:
1082:
void AG903_DSPPrmSetDMAREQ(uint8_t ch, uint32_t req)
1083: {
1084:
ASSERT(ch <
AG903_DSP_CH_NUM);
1085:
1086:
AG903_DSPn(ch)->DMAREQ = (req <<
AG903_DSPn_DMAREQ_REQ_POS) &
AG903_DSPn_DMAREQ_REQ_MSK;
1087: }
1088:
1089:
1097:
void AG903_DSPPrmGetHRZSTAT(uint8_t ch, uint32_t *pix, uint32_t *stat)
1098: {
1099:
ASSERT(ch <
AG903_DSP_CH_NUM);
1100:
ASSERT(pix != NULL);
1101:
ASSERT(stat != NULL);
1102:
1103: uint32_t reg =
AG903_DSPn(ch)->HRZSTAT;
1104: *pix = (reg &
AG903_DSPn_HRZSTAT_PIX_MSK ) >>
AG903_DSPn_HRZSTAT_PIX_POS;
1105: *stat = (reg &
AG903_DSPn_HRZSTAT_STAT_MSK) >>
AG903_DSPn_HRZSTAT_STAT_POS;
1106: }
1107:
1108:
1117:
void AG903_DSPPrmGetVTSTAT(uint8_t ch, uint32_t *line, uint32_t *stat, uint32_t *fcnt)
1118: {
1119:
ASSERT(ch <
AG903_DSP_CH_NUM);
1120:
ASSERT(line != NULL);
1121:
ASSERT(stat != NULL);
1122:
ASSERT(fcnt != NULL);
1123:
1124: uint32_t reg =
AG903_DSPn(ch)->VTSTAT;
1125: *line = (reg &
AG903_DSPn_VTSTAT_LINE_MSK) >>
AG903_DSPn_VTSTAT_LINE_POS;
1126: *stat = (reg &
AG903_DSPn_VTSTAT_STAT_MSK) >>
AG903_DSPn_VTSTAT_STAT_POS;
1127: *fcnt = (reg &
AG903_DSPn_VTSTAT_FCNT_MSK) >>
AG903_DSPn_VTSTAT_FCNT_POS;
1128: }
1129:
1130:
1139:
void AG903_DSPPrmGetLUTR(uint8_t ch, uint8_t table_no,
DSPPrmParamLUTR *lutr)
1140: {
1141:
ASSERT(ch <
AG903_DSP_CH_NUM);
1142:
ASSERT(lutr != NULL);
1143:
1144: uint32_t reg =
AG903_DSPn(ch)->LUTR[table_no];
1145: lutr->r0 = (reg &
AG903_DSPn_LUTR_R0_MSK) >>
AG903_DSPn_LUTR_R0_POS;
1146: lutr->r1 = (reg &
AG903_DSPn_LUTR_R1_MSK) >>
AG903_DSPn_LUTR_R1_POS;
1147: lutr->r2 = (reg &
AG903_DSPn_LUTR_R2_MSK) >>
AG903_DSPn_LUTR_R2_POS;
1148: lutr->r3 = (reg &
AG903_DSPn_LUTR_R3_MSK) >>
AG903_DSPn_LUTR_R3_POS;
1149: }
1150:
1151:
1160:
void AG903_DSPPrmSetLUTR(uint8_t ch, uint8_t table_no,
DSPPrmParamLUTR *lutr)
1161: {
1162:
ASSERT(ch <
AG903_DSP_CH_NUM);
1163:
ASSERT(lutr != NULL);
1164:
1165: uint32_t reg = 0;
1166: reg |= (lutr->r0 <<
AG903_DSPn_LUTR_R0_POS) &
AG903_DSPn_LUTR_R0_MSK;
1167: reg |= (lutr->r1 <<
AG903_DSPn_LUTR_R1_POS) &
AG903_DSPn_LUTR_R1_MSK;
1168: reg |= (lutr->r2 <<
AG903_DSPn_LUTR_R2_POS) &
AG903_DSPn_LUTR_R2_MSK;
1169: reg |= (lutr->r3 <<
AG903_DSPn_LUTR_R3_POS) &
AG903_DSPn_LUTR_R3_MSK;
1170:
AG903_DSPn(ch)->LUTR[table_no] = reg;
1171: }
1172:
1173:
1182:
void AG903_DSPPrmGetLUTG(uint8_t ch, uint8_t table_no,
DSPPrmParamLUTG *lutg)
1183: {
1184:
ASSERT(ch <
AG903_DSP_CH_NUM);
1185:
ASSERT(lutg != NULL);
1186:
1187: uint32_t reg =
AG903_DSPn(ch)->LUTG[table_no];
1188: lutg->g0 = (reg &
AG903_DSPn_LUTG_G0_MSK) >>
AG903_DSPn_LUTG_G0_POS;
1189: lutg->g1 = (reg &
AG903_DSPn_LUTG_G1_MSK) >>
AG903_DSPn_LUTG_G1_POS;
1190: lutg->g2 = (reg &
AG903_DSPn_LUTG_G2_MSK) >>
AG903_DSPn_LUTG_G2_POS;
1191: lutg->g3 = (reg &
AG903_DSPn_LUTG_G3_MSK) >>
AG903_DSPn_LUTG_G3_POS;
1192: }
1193:
1194:
1203:
void AG903_DSPPrmSetLUTG(uint8_t ch, uint8_t table_no,
DSPPrmParamLUTG *lutg)
1204: {
1205:
ASSERT(ch <
AG903_DSP_CH_NUM);
1206:
ASSERT(lutg != NULL);
1207:
1208: uint32_t reg = 0;
1209: reg |= (lutg->g0 <<
AG903_DSPn_LUTG_G0_POS) &
AG903_DSPn_LUTG_G0_MSK;
1210: reg |= (lutg->g1 <<
AG903_DSPn_LUTG_G1_POS) &
AG903_DSPn_LUTG_G1_MSK;
1211: reg |= (lutg->g2 <<
AG903_DSPn_LUTG_G2_POS) &
AG903_DSPn_LUTG_G2_MSK;
1212: reg |= (lutg->g3 <<
AG903_DSPn_LUTG_G3_POS) &
AG903_DSPn_LUTG_G3_MSK;
1213:
AG903_DSPn(ch)->LUTG[table_no] = reg;
1214: }
1215:
1216:
1217:
1226:
void AG903_DSPPrmGetLUTB(uint8_t ch, uint8_t table_no,
DSPPrmParamLUTB *lutb)
1227: {
1228:
ASSERT(ch <
AG903_DSP_CH_NUM);
1229:
ASSERT(lutb != NULL);
1230:
1231: uint32_t reg =
AG903_DSPn(ch)->LUTB[table_no];
1232: lutb->b0 = (reg &
AG903_DSPn_LUTB_B0_MSK) >>
AG903_DSPn_LUTB_B0_POS;
1233: lutb->b1 = (reg &
AG903_DSPn_LUTB_B1_MSK) >>
AG903_DSPn_LUTB_B1_POS;
1234: lutb->b2 = (reg &
AG903_DSPn_LUTB_B2_MSK) >>
AG903_DSPn_LUTB_B2_POS;
1235: lutb->b3 = (reg &
AG903_DSPn_LUTB_B3_MSK) >>
AG903_DSPn_LUTB_B3_POS;
1236: }
1237:
1238:
1247:
void AG903_DSPPrmSetLUTB(uint8_t ch, uint8_t table_no,
DSPPrmParamLUTB *lutb)
1248: {
1249:
ASSERT(ch <
AG903_DSP_CH_NUM);
1250:
ASSERT(lutb != NULL);
1251:
1252: uint32_t reg = 0;
1253: reg |= (lutb->b0 <<
AG903_DSPn_LUTB_B0_POS) &
AG903_DSPn_LUTB_B0_MSK;
1254: reg |= (lutb->b1 <<
AG903_DSPn_LUTB_B1_POS) &
AG903_DSPn_LUTB_B1_MSK;
1255: reg |= (lutb->b2 <<
AG903_DSPn_LUTB_B2_POS) &
AG903_DSPn_LUTB_B2_MSK;
1256: reg |= (lutb->b3 <<
AG903_DSPn_LUTB_B3_POS) &
AG903_DSPn_LUTB_B3_MSK;
1257:
AG903_DSPn(ch)->LUTB[table_no] = reg;
1258: }
1259: