AG903ライブラリリファレンス
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AG903_pgpreg.h
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1: 8: 9: 13: 14:
#ifndef
_AG903_PGP_REGMAP_H_ 15:
#define
_AG903_PGP_REGMAP_H_ 16: 17: 18:
#include
"AG903_regmap.h" 19: 20:
#ifndef
__I
21: 22:
#define
__I
volatile
const
23:
#endif
24:
#ifndef
__O
25: 26:
#define
__O
volatile
27:
#endif
28:
#ifndef
__IO
29: 30:
#define
__IO
volatile
31:
#endif
32: 33: 34:
typedef
struct
{ 35: 36:
union
{ 37:
__O
uint32_t CMD; 38: 39:
struct
{ 40:
__O
uint32_t CMD : 4; 41: } CMD_bits; 42: }; 43: 44:
union
{ 45:
__I
uint32_t STATE; 46: 47:
struct
{ 48:
__I
uint32_t ST : 4; 49:
__I
uint32_t SST : 4; 50:
__I
uint32_t QUEUE : 2; 51: uint32_t : 2; 52:
__I
uint32_t VRMACC : 1; 53:
__I
uint32_t BLANK : 1; 54: } STATE_bits; 55: }; 56: 57:
union
{ 58:
__IO
uint32_t INTCTRLI; 59: 60:
struct
{ 61:
__IO
uint32_t LINE : 13; 62: uint32_t : 3; 63:
__IO
uint32_t FCNT : 4; 64:
__IO
uint32_t FIELD : 2; 65: } INTCTRLI_bits; 66: }; 67: 68:
union
{ 69:
__IO
uint32_t INTCTRLO; 70: 71:
struct
{ 72:
__IO
uint32_t LINE : 12; 73: uint32_t : 4; 74:
__IO
uint32_t FCNT : 4; 75:
__IO
uint32_t FIELD : 2; 76: } INTCTRLO_bits; 77: }; 78: 79:
union
{ 80:
__IO
uint32_t INTEN; 81: 82:
struct
{ 83:
__IO
uint32_t VLINEI : 1; 84:
__IO
uint32_t VSYNCI : 1; 85:
__IO
uint32_t VLINEO : 1; 86:
__IO
uint32_t VSYNCO : 1; 87:
__IO
uint32_t HGMCPL : 1; 88:
__IO
uint32_t HGMICPL : 1; 89:
__IO
uint32_t LBLCPL : 1; 90:
__IO
uint32_t LBLCRPT : 1; 91:
__IO
uint32_t IFCOFM : 1; 92:
__IO
uint32_t IFCOFS : 1; 93:
__IO
uint32_t VOOFLW : 1; 94:
__IO
uint32_t VOICPL : 1; 95:
__IO
uint32_t ND : 1; 96: } INTEN_bits; 97: }; 98: 99:
union
{ 100:
__I
uint32_t INTSTAT; 101: 102:
struct
{ 103:
__I
uint32_t VLINEI : 1; 104:
__I
uint32_t VSYNCI : 1; 105:
__I
uint32_t VLINEO : 1; 106:
__I
uint32_t VSYNCO : 1; 107:
__I
uint32_t HGMCPL : 1; 108:
__I
uint32_t HGMICPL : 1; 109:
__I
uint32_t LBLCPL : 1; 110:
__I
uint32_t LBLCRPT : 1; 111:
__I
uint32_t IFCOFM : 1; 112:
__I
uint32_t IFCOFS : 1; 113:
__I
uint32_t VOOFLW : 1; 114:
__I
uint32_t VOICPL : 1; 115:
__I
uint32_t ND : 1; 116: } INTSTAT_bits; 117: }; 118: 119:
union
{ 120:
__O
uint32_t INTCLR; 121: 122:
struct
{ 123:
__O
uint32_t VLINEI : 1; 124:
__O
uint32_t VSYNCI : 1; 125:
__O
uint32_t VLINEO : 1; 126:
__O
uint32_t VSYNCO : 1; 127:
__O
uint32_t HGMCPL : 1; 128:
__O
uint32_t HGMICPL : 1; 129:
__O
uint32_t LBLCPL : 1; 130:
__O
uint32_t LBLCRPT : 1; 131:
__O
uint32_t IFCOFM : 1; 132:
__O
uint32_t IFCOFS : 1; 133:
__O
uint32_t VOOFLW : 1; 134:
__O
uint32_t VOICPL : 1; 135:
__O
uint32_t ND : 1; 136: } INTCLR_bits; 137: }; 138: 139:
union
{ 140:
__IO
uint32_t TRGCTRLI; 141: 142:
struct
{ 143:
__IO
uint32_t LINE : 13; 144: uint32_t : 3; 145:
__IO
uint32_t FCNT : 4; 146:
__IO
uint32_t FIELD : 2; 147: } TRGCTRLI_bits; 148: }; 149: 150:
union
{ 151:
__IO
uint32_t TRGCTRLO; 152: 153:
struct
{ 154:
__IO
uint32_t LINE : 12; 155: uint32_t : 4; 156:
__IO
uint32_t FCNT : 4; 157:
__IO
uint32_t FIELD : 2; 158: } TRGCTRLO_bits; 159: }; 160: 161:
union
{ 162:
__IO
uint32_t TRGEN; 163: 164:
struct
{ 165:
__IO
uint32_t VLINEI : 1; 166:
__IO
uint32_t VSYNCI : 1; 167:
__IO
uint32_t VLINEO : 1; 168:
__IO
uint32_t VSYNCO : 1; 169: } TRGEN_bits; 170: }; 171: 172:
union
{ 173:
__IO
uint32_t INCTRL; 174: 175:
struct
{ 176:
__IO
uint32_t FMT : 3; 177: uint32_t : 5; 178:
__IO
uint32_t SEL : 4; 179: uint32_t : 4; 180:
__IO
uint32_t TRG : 3; 181: uint32_t : 5; 182:
__IO
uint32_t TICK : 1; 183:
__IO
uint32_t MD : 2; 184: uint32_t : 1; 185:
__IO
uint32_t HDLY : 3; 186: } INCTRL_bits; 187: }; 188: 189:
union
{ 190:
__IO
uint32_t FUNCCTRL; 191: 192:
struct
{ 193:
__IO
uint32_t NRF : 1; 194:
__IO
uint32_t CSC1 : 1; 195:
__IO
uint32_t SCALE : 1; 196:
__IO
uint32_t SPF : 1; 197:
__IO
uint32_t HSV1 : 1; 198:
__IO
uint32_t DGC : 1; 199:
__IO
uint32_t THR : 1; 200:
__IO
uint32_t IFC : 1; 201:
__IO
uint32_t IFCODR : 1; 202:
__IO
uint32_t OUT : 1; 203: } FUNCCTRL_bits; 204: }; 205: 206:
union
{ 207:
__IO
uint32_t SIZE; 208: 209:
struct
{ 210:
__IO
uint32_t HSIZE : 12; 211: uint32_t : 4; 212:
__IO
uint32_t VSIZE : 12; 213: } SIZE_bits; 214: }; 215: 216:
union
{ 217:
__IO
uint32_t POS; 218: 219:
struct
{ 220:
__IO
uint32_t HPOS : 13; 221: uint32_t : 3; 222:
__IO
uint32_t VPOS : 13; 223:
__IO
uint32_t SCAN : 1; 224:
__IO
uint32_t OPOS : 1; 225:
__IO
uint32_t EPOS : 1; 226: } POS_bits; 227: }; 228: 229:
union
{ 230:
__IO
uint32_t OUTCTRL0; 231: 232:
struct
{ 233:
__IO
uint32_t FMT : 4; 234:
__IO
uint32_t MD : 3; 235: uint32_t : 1; 236:
__IO
uint32_t SWAP1 : 1; 237:
__IO
uint32_t SWAP4 : 1; 238:
__IO
uint32_t SWAPH : 1; 239:
__IO
uint32_t SWAPW : 1; 240:
__IO
uint32_t DIM : 1; 241:
__IO
uint32_t SCAN : 1; 242:
__IO
uint32_t
BMU
: 2; 243:
__IO
uint32_t DTH : 1; 244:
__IO
uint32_t FAI : 1; 245:
__IO
uint32_t LIMIT : 1; 246: uint32_t : 5; 247:
__IO
uint32_t PAD : 8; 248: } OUTCTRL0_bits; 249: }; 250: 251:
union
{ 252:
__IO
uint32_t OUTCTRL1; 253: 254:
struct
{ 255:
__IO
uint32_t BE : 1; 256:
__IO
uint32_t GE : 1; 257:
__IO
uint32_t RE : 1; 258: } OUTCTRL1_bits; 259: }; 260: 261:
union
{ 262:
__IO
uint32_t OUTBASE; 263: 264:
struct
{ 265: uint32_t : 3; 266:
__IO
uint32_t ADR : 29; 267: } OUTBASE_bits; 268: }; 269: 270:
union
{ 271:
__IO
uint32_t OUTHSIZE; 272: 273:
struct
{ 274:
__IO
uint32_t HSIZE : 14; 275: } OUTHSIZE_bits; 276: }; 277: 278:
__I
uint32_t RESERVED1[6]; 279: 280:
union
{ 281:
__I
uint32_t FAIVAL0; 282: }; 283: 284:
union
{ 285:
__I
uint32_t FAIVAL1; 286: 287:
struct
{ 288:
__I
uint32_t FNUM : 16; 289:
__I
uint32_t PORT : 3; 290:
__I
uint32_t FIELD : 1; 291: } FAIVAL1_bits; 292: }; 293: 294:
__I
uint32_t RESERVED2[6]; 295: 296:
union
{ 297:
__IO
uint32_t IPCPRM; 298: 299:
struct
{ 300:
__IO
uint32_t BLKC : 8; 301:
__IO
uint32_t BLKY : 8; 302:
__IO
uint32_t LIMIT : 1; 303: } IPCPRM_bits; 304: }; 305: 306:
__I
uint32_t RESERVED3[1]; 307: 308:
union
{ 309:
__IO
uint32_t CSC1CTRL; 310: 311:
struct
{ 312:
__IO
uint32_t SFT : 4; 313:
__IO
uint32_t LIMIT : 1; 314: } CSC1CTRL_bits; 315: }; 316: 317:
union
{ 318:
__IO
uint32_t CSC1PRM0; 319: 320:
struct
{ 321:
__IO
uint32_t M11 : 12; 322: uint32_t : 4; 323:
__IO
uint32_t M12 : 12; 324: } CSC1PRM0_bits; 325: }; 326: 327:
union
{ 328:
__IO
uint32_t CSC1PRM1; 329: 330:
struct
{ 331:
__IO
uint32_t M13 : 12; 332: } CSC1PRM1_bits; 333: }; 334: 335:
union
{ 336:
__IO
uint32_t CSC1PRM2; 337: 338:
struct
{ 339:
__IO
uint32_t M14 : 20; 340: } CSC1PRM2_bits; 341: }; 342: 343:
union
{ 344:
__IO
uint32_t CSC1PRM3; 345: 346:
struct
{ 347:
__IO
uint32_t M21 : 12; 348: uint32_t : 4; 349:
__IO
uint32_t M22 : 12; 350: } CSC1PRM3_bits; 351: }; 352: 353:
union
{ 354:
__IO
uint32_t CSC1PRM4; 355: 356:
struct
{ 357:
__IO
uint32_t M23 : 12; 358: } CSC1PRM4_bits; 359: }; 360: 361:
union
{ 362:
__IO
uint32_t CSC1PRM5; 363: 364:
struct
{ 365:
__IO
uint32_t M24 : 20; 366: } CSC1PRM5_bits; 367: }; 368: 369:
union
{ 370:
__IO
uint32_t CSC1PRM6; 371: 372:
struct
{ 373:
__IO
uint32_t M31 : 12; 374: uint32_t : 4; 375:
__IO
uint32_t M32 : 12; 376: } CSC1PRM6_bits; 377: }; 378: 379:
union
{ 380:
__IO
uint32_t CSC1PRM7; 381: 382:
struct
{ 383:
__IO
uint32_t M33 : 12; 384: } CSC1PRM7_bits; 385: }; 386: 387:
union
{ 388:
__IO
uint32_t CSC1PRM8; 389: 390:
struct
{ 391:
__IO
uint32_t M34 : 20; 392: } CSC1PRM8_bits; 393: }; 394: 395:
union
{ 396:
__IO
uint32_t SCCTRL; 397: 398:
struct
{ 399:
__IO
uint32_t DNMH : 4; 400:
__IO
uint32_t NMRH : 4; 401:
__IO
uint32_t DNMV : 4; 402:
__IO
uint32_t NMRV : 4; 403:
__IO
uint32_t MTD : 1; 404:
__IO
uint32_t LIMIT : 1; 405: } SCCTRL_bits; 406: }; 407: 408:
__I
uint32_t RESERVED4[19]; 409: 410:
union
{ 411:
__IO
uint32_t SPFCTRL; 412: 413:
struct
{ 414:
__IO
uint32_t B : 8; 415:
__IO
uint32_t G : 8; 416:
__IO
uint32_t R : 8; 417:
__IO
uint32_t BC : 1; 418: uint32_t : 3; 419:
__IO
uint32_t SFT : 4; 420: } SPFCTRL_bits; 421: }; 422: 423:
union
{ 424:
__IO
uint32_t SPFPRM0; 425: 426:
struct
{ 427:
__IO
uint32_t HMM : 8; 428:
__IO
uint32_t H0M : 8; 429:
__IO
uint32_t H1M : 8; 430: } SPFPRM0_bits; 431: }; 432: 433:
union
{ 434:
__IO
uint32_t SPFPRM1; 435: 436:
struct
{ 437:
__IO
uint32_t HM0 : 8; 438:
__IO
uint32_t H00 : 8; 439:
__IO
uint32_t H10 : 8; 440: } SPFPRM1_bits; 441: }; 442: 443:
union
{ 444:
__IO
uint32_t SPFPRM2; 445: 446:
struct
{ 447:
__IO
uint32_t HM1 : 8; 448:
__IO
uint32_t H01 : 8; 449:
__IO
uint32_t H11 : 8; 450: } SPFPRM2_bits; 451: }; 452: 453:
union
{ 454:
__IO
uint32_t SPFPRM3; 455: 456:
struct
{ 457:
__IO
uint32_t OFS : 9; 458: } SPFPRM3_bits; 459: }; 460: 461:
union
{ 462:
__IO
uint32_t HSV1CTRL; 463: 464:
struct
{ 465:
__IO
uint32_t FMT : 1; 466: } HSV1CTRL_bits; 467: }; 468: 469:
union
{ 470:
__I
uint32_t DGCSTAT; 471: 472:
struct
{ 473:
__I
uint32_t QUEUE : 3; 474: } DGCSTAT_bits; 475: }; 476: 477:
union
{ 478:
__O
uint32_t HGMCMD; 479: 480:
struct
{ 481:
__O
uint32_t CMD : 3; 482: } HGMCMD_bits; 483: }; 484: 485:
union
{ 486:
__IO
uint32_t HGMCTRL; 487: 488:
struct
{ 489:
__IO
uint32_t HINC : 4; 490:
__IO
uint32_t VINC : 4; 491:
__IO
uint32_t SFT : 4; 492:
__IO
uint32_t THR : 4; 493:
__IO
uint32_t EXC : 2; 494:
__IO
uint32_t
BMU
: 1; 495: uint32_t : 5; 496:
__IO
uint32_t INV : 4; 497: } HGMCTRL_bits; 498: }; 499: 500:
union
{ 501:
__IO
uint32_t HGMSIZE; 502: 503:
struct
{ 504:
__IO
uint32_t HSIZE : 10; 505: uint32_t : 6; 506:
__IO
uint32_t VSIZE : 10; 507: } HGMSIZE_bits; 508: }; 509: 510:
union
{ 511:
__IO
uint32_t HGMPOS; 512: 513:
struct
{ 514:
__IO
uint32_t HPOS : 12; 515: uint32_t : 4; 516:
__IO
uint32_t VPOS : 12; 517: } HGMPOS_bits; 518: }; 519: 520:
union
{ 521:
__IO
uint32_t HGMDST; 522: 523:
struct
{ 524: uint32_t : 3; 525:
__IO
uint32_t ADR : 29; 526: } HGMDST_bits; 527: }; 528: 529:
union
{ 530:
__I
uint32_t HGMMOD0; 531: 532:
struct
{ 533:
__I
uint32_t CNT : 16; 534:
__I
uint32_t VAL : 8; 535:
__I
uint32_t BW : 5; 536: } HGMMOD0_bits; 537: }; 538: 539:
union
{ 540:
__I
uint32_t HGMRNG0; 541: 542:
struct
{ 543:
__I
uint32_t MINVAL : 8; 544:
__I
uint32_t MAXVAL : 8; 545: } HGMRNG0_bits; 546: }; 547: 548:
union
{ 549:
__I
uint32_t HGMMOD1; 550: 551:
struct
{ 552:
__I
uint32_t CNT : 16; 553:
__I
uint32_t VAL : 8; 554:
__I
uint32_t BW : 5; 555: } HGMMOD1_bits; 556: }; 557: 558:
union
{ 559:
__I
uint32_t HGMRNG1; 560: 561:
struct
{ 562:
__I
uint32_t MINVAL : 8; 563:
__I
uint32_t MAXVAL : 8; 564: } HGMRNG1_bits; 565: }; 566: 567:
union
{ 568:
__I
uint32_t HGMMOD2; 569: 570:
struct
{ 571:
__I
uint32_t CNT : 16; 572:
__I
uint32_t VAL : 8; 573:
__I
uint32_t BW : 5; 574: } HGMMOD2_bits; 575: }; 576: 577:
union
{ 578:
__I
uint32_t HGMRNG2; 579: 580:
struct
{ 581:
__I
uint32_t MINVAL : 8; 582:
__I
uint32_t MAXVAL : 8; 583: } HGMRNG2_bits; 584: }; 585: 586:
union
{ 587:
__I
uint32_t HGMSTAT; 588: 589:
struct
{ 590:
__I
uint32_t CMD : 3; 591: uint32_t : 1; 592:
__I
uint32_t QUEUE : 2; 593:
__I
uint32_t ACT : 1; 594:
__I
uint32_t VRMACC : 1; 595:
__I
uint32_t INIT : 1; 596: } HGMSTAT_bits; 597: }; 598: 599:
union
{ 600:
__IO
uint32_t THRCTRL; 601: 602:
struct
{ 603:
__IO
uint32_t C8SEL : 2; 604:
__IO
uint32_t OUTSEL : 2; 605:
__IO
uint32_t THR8 : 1; 606:
__IO
uint32_t HSV2 : 1; 607:
__IO
uint32_t CSC2 : 1; 608:
__IO
uint32_t MSK : 1; 609:
__IO
uint32_t SPF1 : 1; 610:
__IO
uint32_t LIMIT : 1; 611: } THRCTRL_bits; 612: }; 613: 614:
union
{ 615:
__IO
uint32_t HSV2CTRL; 616: 617:
struct
{ 618:
__IO
uint32_t FMT : 1; 619: } HSV2CTRL_bits; 620: }; 621: 622:
union
{ 623:
__IO
uint32_t CSC2CTRL; 624: 625:
struct
{ 626:
__IO
uint32_t SFT : 4; 627:
__IO
uint32_t LIMIT : 1; 628: } CSC2CTRL_bits; 629: }; 630: 631:
union
{ 632:
__IO
uint32_t CSC2PRM0; 633: 634:
struct
{ 635:
__IO
uint32_t M11 : 12; 636: uint32_t : 4; 637:
__IO
uint32_t M12 : 12; 638: } CSC2PRM0_bits; 639: }; 640: 641:
union
{ 642:
__IO
uint32_t CSC2PRM1; 643: 644:
struct
{ 645:
__IO
uint32_t M13 : 12; 646: } CSC2PRM1_bits; 647: }; 648: 649:
union
{ 650:
__IO
uint32_t CSC2PRM2; 651: 652:
struct
{ 653:
__IO
uint32_t M14 : 20; 654: } CSC2PRM2_bits; 655: }; 656: 657:
union
{ 658:
__IO
uint32_t CSC2PRM3; 659: 660:
struct
{ 661:
__IO
uint32_t M21 : 12; 662: uint32_t : 4; 663:
__IO
uint32_t M22 : 12; 664: } CSC2PRM3_bits; 665: }; 666: 667:
union
{ 668:
__IO
uint32_t CSC2PRM4; 669: 670:
struct
{ 671:
__IO
uint32_t M23 : 12; 672: } CSC2PRM4_bits; 673: }; 674: 675:
union
{ 676:
__IO
uint32_t CSC2PRM5; 677: 678:
struct
{ 679:
__IO
uint32_t M24 : 20; 680: } CSC2PRM5_bits; 681: }; 682: 683:
union
{ 684:
__IO
uint32_t CSC2PRM6; 685: 686:
struct
{ 687:
__IO
uint32_t M31 : 12; 688: uint32_t : 4; 689:
__IO
uint32_t M32 : 12; 690: } CSC2PRM6_bits; 691: }; 692: 693:
union
{ 694:
__IO
uint32_t CSC2PRM7; 695: 696:
struct
{ 697:
__IO
uint32_t M33 : 12; 698: } CSC2PRM7_bits; 699: }; 700: 701:
union
{ 702:
__IO
uint32_t CSC2PRM8; 703: 704:
struct
{ 705:
__IO
uint32_t M34 : 20; 706: } CSC2PRM8_bits; 707: }; 708: 709:
union
{ 710:
__IO
uint32_t MSK0PRM0; 711: 712:
struct
{ 713:
__IO
uint32_t X : 1; 714:
__IO
uint32_t L : 1; 715:
__IO
uint32_t H : 1; 716: } MSK0PRM0_bits; 717: }; 718: 719:
union
{ 720:
__IO
uint32_t MSK0PRM1; 721: 722:
struct
{ 723:
__IO
uint32_t LMIN : 8; 724:
__IO
uint32_t LMAX : 8; 725:
__IO
uint32_t HMIN : 8; 726:
__IO
uint32_t HMAX : 8; 727: } MSK0PRM1_bits; 728: }; 729: 730:
union
{ 731:
__IO
uint32_t MSK1PRM0; 732: 733:
struct
{ 734:
__IO
uint32_t X : 1; 735:
__IO
uint32_t L : 1; 736:
__IO
uint32_t H : 1; 737: } MSK1PRM0_bits; 738: }; 739: 740:
union
{ 741:
__IO
uint32_t MSK1PRM1; 742: 743:
struct
{ 744:
__IO
uint32_t LMIN : 8; 745:
__IO
uint32_t LMAX : 8; 746:
__IO
uint32_t HMIN : 8; 747:
__IO
uint32_t HMAX : 8; 748: } MSK1PRM1_bits; 749: }; 750: 751:
union
{ 752:
__IO
uint32_t MSK2PRM0; 753: 754:
struct
{ 755:
__IO
uint32_t X : 1; 756:
__IO
uint32_t L : 1; 757:
__IO
uint32_t H : 1; 758: } MSK2PRM0_bits; 759: }; 760: 761:
union
{ 762:
__IO
uint32_t MSK2PRM1; 763: 764:
struct
{ 765:
__IO
uint32_t LMIN : 8; 766:
__IO
uint32_t LMAX : 8; 767:
__IO
uint32_t HMIN : 8; 768:
__IO
uint32_t HMAX : 8; 769: } MSK2PRM1_bits; 770: }; 771: 772:
union
{ 773:
__IO
uint32_t THR8PRM0; 774: 775:
struct
{ 776:
__IO
uint32_t MINTHR : 8; 777:
__IO
uint32_t MAXTHR : 8; 778:
__IO
uint32_t MAXVAL : 8; 779:
__IO
uint32_t TYPE : 4; 780: } THR8PRM0_bits; 781: }; 782: 783:
union
{ 784:
__IO
uint32_t THR8PRM1; 785: 786:
struct
{ 787:
__IO
uint32_t MINTHR : 8; 788:
__IO
uint32_t MAXTHR : 8; 789:
__IO
uint32_t MAXVAL : 8; 790:
__IO
uint32_t TYPE : 4; 791: } THR8PRM1_bits; 792: }; 793: 794:
union
{ 795:
__IO
uint32_t THR8PRM2; 796: 797:
struct
{ 798:
__IO
uint32_t MINTHR : 8; 799:
__IO
uint32_t MAXTHR : 8; 800:
__IO
uint32_t MAXVAL : 8; 801:
__IO
uint32_t TYPE : 4; 802: } THR8PRM2_bits; 803: }; 804: 805:
union
{ 806:
__IO
uint32_t THR1PRM0; 807: 808:
struct
{ 809:
__IO
uint32_t X : 1; 810:
__IO
uint32_t L : 1; 811:
__IO
uint32_t H : 1; 812: } THR1PRM0_bits; 813: }; 814: 815:
union
{ 816:
__IO
uint32_t THR1PRM1; 817: 818:
struct
{ 819:
__IO
uint32_t LMIN : 8; 820:
__IO
uint32_t LMAX : 8; 821:
__IO
uint32_t HMIN : 8; 822:
__IO
uint32_t HMAX : 8; 823: } THR1PRM1_bits; 824: }; 825: 826:
union
{ 827:
__IO
uint32_t SPF1PRM0; 828: 829:
struct
{ 830:
__IO
uint32_t HMM : 3; 831: uint32_t : 1; 832:
__IO
uint32_t H0M : 3; 833: uint32_t : 1; 834:
__IO
uint32_t H1M : 3; 835: uint32_t : 1; 836:
__IO
uint32_t HM0 : 3; 837: uint32_t : 1; 838:
__IO
uint32_t H00 : 3; 839: uint32_t : 1; 840:
__IO
uint32_t H10 : 3; 841: } SPF1PRM0_bits; 842: }; 843: 844:
union
{ 845:
__IO
uint32_t SPF1PRM1; 846: 847:
struct
{ 848:
__IO
uint32_t HM1 : 3; 849: uint32_t : 1; 850:
__IO
uint32_t H01 : 3; 851: uint32_t : 1; 852:
__IO
uint32_t H11 : 3; 853: uint32_t : 5; 854:
__IO
uint32_t THR : 6; 855: } SPF1PRM1_bits; 856: }; 857: 858:
union
{ 859:
__I
uint32_t THR1CNT; 860: 861:
struct
{ 862:
__I
uint32_t CNT : 24; 863: } THR1CNT_bits; 864: }; 865: 866:
union
{ 867:
__O
uint32_t LBLCMD; 868: 869:
struct
{ 870:
__O
uint32_t CMD : 3; 871: } LBLCMD_bits; 872: }; 873: 874:
union
{ 875:
__IO
uint32_t LBLCTRL; 876: 877:
struct
{ 878:
__IO
uint32_t MAXID : 8; 879:
__IO
uint32_t FLTHR : 8; 880:
__IO
uint32_t
BMU
: 1; 881:
__IO
uint32_t CNCT : 1; 882: uint32_t : 6; 883:
__IO
uint32_t INV : 4; 884:
__IO
uint32_t VLD : 4; 885: } LBLCTRL_bits; 886: }; 887: 888:
union
{ 889:
__IO
uint32_t LBLSIZE; 890: 891:
struct
{ 892:
__IO
uint32_t HSIZE : 10; 893: uint32_t : 6; 894:
__IO
uint32_t VSIZE : 10; 895: } LBLSIZE_bits; 896: }; 897: 898:
union
{ 899:
__IO
uint32_t LBLPOS; 900: 901:
struct
{ 902:
__IO
uint32_t HPOS : 12; 903: uint32_t : 4; 904:
__IO
uint32_t VPOS : 12; 905: } LBLPOS_bits; 906: }; 907: 908:
union
{ 909:
__IO
uint32_t LBLDST; 910: 911:
struct
{ 912: uint32_t : 3; 913:
__IO
uint32_t ADR : 29; 914: } LBLDST_bits; 915: }; 916: 917:
union
{ 918:
__I
uint32_t LBLSTAT; 919: 920:
struct
{ 921:
__I
uint32_t CMD : 3; 922: uint32_t : 1; 923:
__I
uint32_t QUEUE : 2; 924:
__I
uint32_t ACT : 1; 925:
__I
uint32_t VRMACC : 1; 926:
__I
uint32_t ID : 8; 927: } LBLSTAT_bits; 928: }; 929: 930:
union
{ 931:
__O
uint32_t IFCCMD; 932: 933:
struct
{ 934:
__O
uint32_t CMD : 3; 935: } IFCCMD_bits; 936: }; 937: 938:
union
{ 939:
__IO
uint32_t IFCCTRL; 940: 941:
struct
{ 942:
__IO
uint32_t SFT0 : 3; 943: uint32_t : 1; 944:
__IO
uint32_t SFT1 : 3; 945: uint32_t : 1; 946:
__IO
uint32_t OP : 3; 947: uint32_t : 5; 948:
__IO
uint32_t SRC : 2; 949:
__IO
uint32_t LIMIT : 2; 950:
__IO
uint32_t SCAN : 1; 951: } IFCCTRL_bits; 952: }; 953: 954:
union
{ 955:
__IO
uint32_t IFCPRM; 956: 957:
struct
{ 958:
__IO
uint32_t GAIN0 : 8; 959:
__IO
uint32_t GAIN1 : 8; 960: } IFCPRM_bits; 961: }; 962: 963: 964: }
AG903_PGPn_Type
; 965: 966: 967:
typedef
struct
{ 968: 969:
union
{ 970:
__O
uint32_t CMD; 971: 972:
struct
{ 973:
__O
uint32_t CMD : 4; 974: } CMD_bits; 975: }; 976: 977:
union
{ 978:
__I
uint32_t STATE; 979: 980:
struct
{ 981:
__I
uint32_t ST : 4; 982: uint32_t : 4; 983:
__I
uint32_t QUEUE : 2; 984: uint32_t : 2; 985:
__I
uint32_t VRMACC : 1; 986: } STATE_bits; 987: }; 988: 989:
union
{ 990:
__IO
uint32_t CTRL0; 991: 992:
struct
{ 993:
__IO
uint32_t FMT : 4; 994:
__IO
uint32_t MD : 3; 995: uint32_t : 1; 996:
__IO
uint32_t SWAP1 : 1; 997:
__IO
uint32_t SWAP4 : 1; 998:
__IO
uint32_t SWAPH : 1; 999:
__IO
uint32_t SWAPW : 1; 1000:
__IO
uint32_t DIM : 1; 1001:
__IO
uint32_t SCAN : 1; 1002:
__IO
uint32_t
BMU
: 2; 1003: uint32_t : 1; 1004:
__IO
uint32_t FAI : 1; 1005: } CTRL0_bits; 1006: }; 1007: 1008:
union
{ 1009:
__IO
uint32_t CTRL1; 1010: 1011:
struct
{ 1012:
__IO
uint32_t INV : 4; 1013:
__IO
uint32_t VLD : 4; 1014:
__IO
uint32_t DIV : 8; 1015: } CTRL1_bits; 1016: }; 1017: 1018:
union
{ 1019:
__IO
uint32_t BASE; 1020: 1021:
struct
{ 1022: uint32_t : 3; 1023:
__IO
uint32_t ADR : 29; 1024: } BASE_bits; 1025: }; 1026: 1027:
union
{ 1028:
__IO
uint32_t HSIZE; 1029: 1030:
struct
{ 1031:
__IO
uint32_t HSIZE : 14; 1032: } HSIZE_bits; 1033: }; 1034: 1035:
union
{ 1036:
__IO
uint32_t HPRM0; 1037: 1038:
struct
{ 1039:
__IO
uint32_t HPW : 12; 1040: } HPRM0_bits; 1041: }; 1042: 1043:
union
{ 1044:
__IO
uint32_t HPRM1; 1045: 1046:
struct
{ 1047:
__IO
uint32_t HBP : 12; 1048: uint32_t : 4; 1049:
__IO
uint32_t HFP : 12; 1050: } HPRM1_bits; 1051: }; 1052: 1053:
union
{ 1054:
__IO
uint32_t VPRM0; 1055: 1056:
struct
{ 1057:
__IO
uint32_t VPW : 12; 1058: uint32_t : 4; 1059:
__IO
uint32_t OFP : 1; 1060:
__IO
uint32_t OBP : 1; 1061:
__IO
uint32_t EFP : 1; 1062:
__IO
uint32_t EBP : 1; 1063: } VPRM0_bits; 1064: }; 1065: 1066:
union
{ 1067:
__IO
uint32_t VPRM1; 1068: 1069:
struct
{ 1070:
__IO
uint32_t VBP : 12; 1071: uint32_t : 4; 1072:
__IO
uint32_t VFP : 12; 1073: } VPRM1_bits; 1074: }; 1075: 1076:
union
{ 1077:
__IO
uint32_t SIZE; 1078: 1079:
struct
{ 1080:
__IO
uint32_t HSIZE : 12; 1081: uint32_t : 4; 1082:
__IO
uint32_t VSIZE : 12; 1083:
__IO
uint32_t OVSIZE : 1; 1084: } SIZE_bits; 1085: }; 1086: 1087: 1088: }
AG903_PGPVIn_Type
; 1089: 1090: 1091:
typedef
struct
{ 1092: 1093:
union
{ 1094:
__IO
uint32_t JPGOUTSEL; 1095: 1096:
struct
{ 1097:
__IO
uint32_t SEL : 3; 1098:
__IO
uint32_t EN : 1; 1099: } JPGOUTSEL_bits; 1100: }; 1101: 1102: 1103: }
AG903_PGP_Type
; 1104: 1105: 1106:
typedef
struct
{ 1107: 1108:
union
{ 1109:
__IO
uint32_t LUTB[64]; 1110: 1111:
struct
{ 1112:
__IO
uint32_t B0 : 8; 1113:
__IO
uint32_t B1 : 8; 1114:
__IO
uint32_t B2 : 8; 1115:
__IO
uint32_t B3 : 8; 1116: } LUTB_bits[64]; 1117: }; 1118: 1119:
union
{ 1120:
__IO
uint32_t LUTG[64]; 1121: 1122:
struct
{ 1123:
__IO
uint32_t G0 : 8; 1124:
__IO
uint32_t G1 : 8; 1125:
__IO
uint32_t G2 : 8; 1126:
__IO
uint32_t G3 : 8; 1127: } LUTG_bits[64]; 1128: }; 1129: 1130:
union
{ 1131:
__IO
uint32_t LUTR[64]; 1132: 1133:
struct
{ 1134:
__IO
uint32_t R0 : 8; 1135:
__IO
uint32_t R1 : 8; 1136:
__IO
uint32_t R2 : 8; 1137:
__IO
uint32_t R3 : 8; 1138: } LUTR_bits[64]; 1139: }; 1140: 1141: 1142: }
AG903_PGP0DGC_Type
; 1143: 1144: 1145:
typedef
struct
{ 1146: 1147:
union
{ 1148:
__O
uint32_t LUTB[64]; 1149: 1150:
struct
{ 1151:
__O
uint32_t B0 : 8; 1152:
__O
uint32_t B1 : 8; 1153:
__O
uint32_t B2 : 8; 1154:
__O
uint32_t B3 : 8; 1155: } LUTB_bits[64]; 1156: }; 1157: 1158:
union
{ 1159:
__O
uint32_t LUTG[64]; 1160: 1161:
struct
{ 1162:
__O
uint32_t G0 : 8; 1163:
__O
uint32_t G1 : 8; 1164:
__O
uint32_t G2 : 8; 1165:
__O
uint32_t G3 : 8; 1166: } LUTG_bits[64]; 1167: }; 1168: 1169:
union
{ 1170:
__O
uint32_t LUTR[64]; 1171: 1172:
struct
{ 1173:
__O
uint32_t R0 : 8; 1174:
__O
uint32_t R1 : 8; 1175:
__O
uint32_t R2 : 8; 1176:
__O
uint32_t R3 : 8; 1177: } LUTR_bits[64]; 1178: }; 1179: 1180: 1181: }
AG903_PGP0DGCF_Type
; 1182: 1183: 1184:
typedef
struct
{ 1185: 1186:
union
{ 1187:
__IO
uint32_t LUTB[64]; 1188: 1189:
struct
{ 1190:
__IO
uint32_t B0 : 8; 1191:
__IO
uint32_t B1 : 8; 1192:
__IO
uint32_t B2 : 8; 1193:
__IO
uint32_t B3 : 8; 1194: } LUTB_bits[64]; 1195: }; 1196: 1197:
union
{ 1198:
__IO
uint32_t LUTG[64]; 1199: 1200:
struct
{ 1201:
__IO
uint32_t G0 : 8; 1202:
__IO
uint32_t G1 : 8; 1203:
__IO
uint32_t G2 : 8; 1204:
__IO
uint32_t G3 : 8; 1205: } LUTG_bits[64]; 1206: }; 1207: 1208:
union
{ 1209:
__IO
uint32_t LUTR[64]; 1210: 1211:
struct
{ 1212:
__IO
uint32_t R0 : 8; 1213:
__IO
uint32_t R1 : 8; 1214:
__IO
uint32_t R2 : 8; 1215:
__IO
uint32_t R3 : 8; 1216: } LUTR_bits[64]; 1217: }; 1218: 1219: 1220: }
AG903_PGP1DGC_Type
; 1221: 1222: 1223:
typedef
struct
{ 1224: 1225:
union
{ 1226:
__O
uint32_t LUTB[64]; 1227: 1228:
struct
{ 1229:
__O
uint32_t B0 : 8; 1230:
__O
uint32_t B1 : 8; 1231:
__O
uint32_t B2 : 8; 1232:
__O
uint32_t B3 : 8; 1233: } LUTB_bits[64]; 1234: }; 1235: 1236:
union
{ 1237:
__O
uint32_t LUTG[64]; 1238: 1239:
struct
{ 1240:
__O
uint32_t G0 : 8; 1241:
__O
uint32_t G1 : 8; 1242:
__O
uint32_t G2 : 8; 1243:
__O
uint32_t G3 : 8; 1244: } LUTG_bits[64]; 1245: }; 1246: 1247:
union
{ 1248:
__O
uint32_t LUTR[64]; 1249: 1250:
struct
{ 1251:
__O
uint32_t R0 : 8; 1252:
__O
uint32_t R1 : 8; 1253:
__O
uint32_t R2 : 8; 1254:
__O
uint32_t R3 : 8; 1255: } LUTR_bits[64]; 1256: }; 1257: 1258: 1259: }
AG903_PGP1DGCF_Type
; 1260: 1261:
#define
AG903_PGPn
(ch) ((
volatile
AG903_PGPn_Type
*)(
AG903_PGP0_BASE
+ 0x200 * ch)) 1262:
#define
AG903_PGPn_CMD
(ch)
AG903_PGPn
(ch)->CMD 1263:
#define
AG903_PGPn_STATE
(ch)
AG903_PGPn
(ch)->STATE 1264:
#define
AG903_PGPn_INTCTRLI
(ch)
AG903_PGPn
(ch)->INTCTRLI 1265:
#define
AG903_PGPn_INTCTRLO
(ch)
AG903_PGPn
(ch)->INTCTRLO 1266:
#define
AG903_PGPn_INTEN
(ch)
AG903_PGPn
(ch)->INTEN 1267:
#define
AG903_PGPn_INTSTAT
(ch)
AG903_PGPn
(ch)->INTSTAT 1268:
#define
AG903_PGPn_INTCLR
(ch)
AG903_PGPn
(ch)->INTCLR 1269:
#define
AG903_PGPn_TRGCTRLI
(ch)
AG903_PGPn
(ch)->TRGCTRLI 1270:
#define
AG903_PGPn_TRGCTRLO
(ch)
AG903_PGPn
(ch)->TRGCTRLO 1271:
#define
AG903_PGPn_TRGEN
(ch)
AG903_PGPn
(ch)->TRGEN 1272:
#define
AG903_PGPn_INCTRL
(ch)
AG903_PGPn
(ch)->INCTRL 1273:
#define
AG903_PGPn_FUNCCTRL
(ch)
AG903_PGPn
(ch)->FUNCCTRL 1274:
#define
AG903_PGPn_SIZE
(ch)
AG903_PGPn
(ch)->SIZE 1275:
#define
AG903_PGPn_POS
(ch)
AG903_PGPn
(ch)->POS 1276:
#define
AG903_PGPn_OUTCTRL0
(ch)
AG903_PGPn
(ch)->OUTCTRL0 1277:
#define
AG903_PGPn_OUTCTRL1
(ch)
AG903_PGPn
(ch)->OUTCTRL1 1278:
#define
AG903_PGPn_OUTBASE
(ch)
AG903_PGPn
(ch)->OUTBASE 1279:
#define
AG903_PGPn_OUTHSIZE
(ch)
AG903_PGPn
(ch)->OUTHSIZE 1280:
#define
AG903_PGPn_FAIVAL0
(ch)
AG903_PGPn
(ch)->FAIVAL0 1281:
#define
AG903_PGPn_FAIVAL1
(ch)
AG903_PGPn
(ch)->FAIVAL1 1282:
#define
AG903_PGPn_IPCPRM
(ch)
AG903_PGPn
(ch)->IPCPRM 1283:
#define
AG903_PGPn_CSC1CTRL
(ch)
AG903_PGPn
(ch)->CSC1CTRL 1284:
#define
AG903_PGPn_CSC1PRM0
(ch)
AG903_PGPn
(ch)->CSC1PRM0 1285:
#define
AG903_PGPn_CSC1PRM1
(ch)
AG903_PGPn
(ch)->CSC1PRM1 1286:
#define
AG903_PGPn_CSC1PRM2
(ch)
AG903_PGPn
(ch)->CSC1PRM2 1287:
#define
AG903_PGPn_CSC1PRM3
(ch)
AG903_PGPn
(ch)->CSC1PRM3 1288:
#define
AG903_PGPn_CSC1PRM4
(ch)
AG903_PGPn
(ch)->CSC1PRM4 1289:
#define
AG903_PGPn_CSC1PRM5
(ch)
AG903_PGPn
(ch)->CSC1PRM5 1290:
#define
AG903_PGPn_CSC1PRM6
(ch)
AG903_PGPn
(ch)->CSC1PRM6 1291:
#define
AG903_PGPn_CSC1PRM7
(ch)
AG903_PGPn
(ch)->CSC1PRM7 1292:
#define
AG903_PGPn_CSC1PRM8
(ch)
AG903_PGPn
(ch)->CSC1PRM8 1293:
#define
AG903_PGPn_SCCTRL
(ch)
AG903_PGPn
(ch)->SCCTRL 1294:
#define
AG903_PGPn_SPFCTRL
(ch)
AG903_PGPn
(ch)->SPFCTRL 1295:
#define
AG903_PGPn_SPFPRM0
(ch)
AG903_PGPn
(ch)->SPFPRM0 1296:
#define
AG903_PGPn_SPFPRM1
(ch)
AG903_PGPn
(ch)->SPFPRM1 1297:
#define
AG903_PGPn_SPFPRM2
(ch)
AG903_PGPn
(ch)->SPFPRM2 1298:
#define
AG903_PGPn_SPFPRM3
(ch)
AG903_PGPn
(ch)->SPFPRM3 1299:
#define
AG903_PGPn_HSV1CTRL
(ch)
AG903_PGPn
(ch)->HSV1CTRL 1300:
#define
AG903_PGPn_DGCSTAT
(ch)
AG903_PGPn
(ch)->DGCSTAT 1301:
#define
AG903_PGPn_HGMCMD
(ch)
AG903_PGPn
(ch)->HGMCMD 1302:
#define
AG903_PGPn_HGMCTRL
(ch)
AG903_PGPn
(ch)->HGMCTRL 1303:
#define
AG903_PGPn_HGMSIZE
(ch)
AG903_PGPn
(ch)->HGMSIZE 1304:
#define
AG903_PGPn_HGMPOS
(ch)
AG903_PGPn
(ch)->HGMPOS 1305:
#define
AG903_PGPn_HGMDST
(ch)
AG903_PGPn
(ch)->HGMDST 1306:
#define
AG903_PGPn_HGMMOD0
(ch)
AG903_PGPn
(ch)->HGMMOD0 1307:
#define
AG903_PGPn_HGMRNG0
(ch)
AG903_PGPn
(ch)->HGMRNG0 1308:
#define
AG903_PGPn_HGMMOD1
(ch)
AG903_PGPn
(ch)->HGMMOD1 1309:
#define
AG903_PGPn_HGMRNG1
(ch)
AG903_PGPn
(ch)->HGMRNG1 1310:
#define
AG903_PGPn_HGMMOD2
(ch)
AG903_PGPn
(ch)->HGMMOD2 1311:
#define
AG903_PGPn_HGMRNG2
(ch)
AG903_PGPn
(ch)->HGMRNG2 1312:
#define
AG903_PGPn_HGMSTAT
(ch)
AG903_PGPn
(ch)->HGMSTAT 1313:
#define
AG903_PGPn_THRCTRL
(ch)
AG903_PGPn
(ch)->THRCTRL 1314:
#define
AG903_PGPn_HSV2CTRL
(ch)
AG903_PGPn
(ch)->HSV2CTRL 1315:
#define
AG903_PGPn_CSC2CTRL
(ch)
AG903_PGPn
(ch)->CSC2CTRL 1316:
#define
AG903_PGPn_CSC2PRM0
(ch)
AG903_PGPn
(ch)->CSC2PRM0 1317:
#define
AG903_PGPn_CSC2PRM1
(ch)
AG903_PGPn
(ch)->CSC2PRM1 1318:
#define
AG903_PGPn_CSC2PRM2
(ch)
AG903_PGPn
(ch)->CSC2PRM2 1319:
#define
AG903_PGPn_CSC2PRM3
(ch)
AG903_PGPn
(ch)->CSC2PRM3 1320:
#define
AG903_PGPn_CSC2PRM4
(ch)
AG903_PGPn
(ch)->CSC2PRM4 1321:
#define
AG903_PGPn_CSC2PRM5
(ch)
AG903_PGPn
(ch)->CSC2PRM5 1322:
#define
AG903_PGPn_CSC2PRM6
(ch)
AG903_PGPn
(ch)->CSC2PRM6 1323:
#define
AG903_PGPn_CSC2PRM7
(ch)
AG903_PGPn
(ch)->CSC2PRM7 1324:
#define
AG903_PGPn_CSC2PRM8
(ch)
AG903_PGPn
(ch)->CSC2PRM8 1325:
#define
AG903_PGPn_MSK0PRM0
(ch)
AG903_PGPn
(ch)->MSK0PRM0 1326:
#define
AG903_PGPn_MSK0PRM1
(ch)
AG903_PGPn
(ch)->MSK0PRM1 1327:
#define
AG903_PGPn_MSK1PRM0
(ch)
AG903_PGPn
(ch)->MSK1PRM0 1328:
#define
AG903_PGPn_MSK1PRM1
(ch)
AG903_PGPn
(ch)->MSK1PRM1 1329:
#define
AG903_PGPn_MSK2PRM0
(ch)
AG903_PGPn
(ch)->MSK2PRM0 1330:
#define
AG903_PGPn_MSK2PRM1
(ch)
AG903_PGPn
(ch)->MSK2PRM1 1331:
#define
AG903_PGPn_THR8PRM0
(ch)
AG903_PGPn
(ch)->THR8PRM0 1332:
#define
AG903_PGPn_THR8PRM1
(ch)
AG903_PGPn
(ch)->THR8PRM1 1333:
#define
AG903_PGPn_THR8PRM2
(ch)
AG903_PGPn
(ch)->THR8PRM2 1334:
#define
AG903_PGPn_THR1PRM0
(ch)
AG903_PGPn
(ch)->THR1PRM0 1335:
#define
AG903_PGPn_THR1PRM1
(ch)
AG903_PGPn
(ch)->THR1PRM1 1336:
#define
AG903_PGPn_SPF1PRM0
(ch)
AG903_PGPn
(ch)->SPF1PRM0 1337:
#define
AG903_PGPn_SPF1PRM1
(ch)
AG903_PGPn
(ch)->SPF1PRM1 1338:
#define
AG903_PGPn_THR1CNT
(ch)
AG903_PGPn
(ch)->THR1CNT 1339:
#define
AG903_PGPn_LBLCMD
(ch)
AG903_PGPn
(ch)->LBLCMD 1340:
#define
AG903_PGPn_LBLCTRL
(ch)
AG903_PGPn
(ch)->LBLCTRL 1341:
#define
AG903_PGPn_LBLSIZE
(ch)
AG903_PGPn
(ch)->LBLSIZE 1342:
#define
AG903_PGPn_LBLPOS
(ch)
AG903_PGPn
(ch)->LBLPOS 1343:
#define
AG903_PGPn_LBLDST
(ch)
AG903_PGPn
(ch)->LBLDST 1344:
#define
AG903_PGPn_LBLSTAT
(ch)
AG903_PGPn
(ch)->LBLSTAT 1345:
#define
AG903_PGPn_IFCCMD
(ch)
AG903_PGPn
(ch)->IFCCMD 1346:
#define
AG903_PGPn_IFCCTRL
(ch)
AG903_PGPn
(ch)->IFCCTRL 1347:
#define
AG903_PGPn_IFCPRM
(ch)
AG903_PGPn
(ch)->IFCPRM 1348: 1349:
#define
AG903_PGPVIn
(ch) ((
volatile
AG903_PGPVIn_Type
*)(
AG903_PGPVI0_BASE
+ 0x100 * ch)) 1350:
#define
AG903_PGPVIn_CMD
(ch)
AG903_PGPVIn
(ch)->CMD 1351:
#define
AG903_PGPVIn_STATE
(ch)
AG903_PGPVIn
(ch)->STATE 1352:
#define
AG903_PGPVIn_CTRL0
(ch)
AG903_PGPVIn
(ch)->CTRL0 1353:
#define
AG903_PGPVIn_CTRL1
(ch)
AG903_PGPVIn
(ch)->CTRL1 1354:
#define
AG903_PGPVIn_BASE
(ch)
AG903_PGPVIn
(ch)->BASE 1355:
#define
AG903_PGPVIn_HSIZE
(ch)
AG903_PGPVIn
(ch)->HSIZE 1356:
#define
AG903_PGPVIn_HPRM0
(ch)
AG903_PGPVIn
(ch)->HPRM0 1357:
#define
AG903_PGPVIn_HPRM1
(ch)
AG903_PGPVIn
(ch)->HPRM1 1358:
#define
AG903_PGPVIn_VPRM0
(ch)
AG903_PGPVIn
(ch)->VPRM0 1359:
#define
AG903_PGPVIn_VPRM1
(ch)
AG903_PGPVIn
(ch)->VPRM1 1360:
#define
AG903_PGPVIn_SIZE
(ch)
AG903_PGPVIn
(ch)->SIZE 1361: 1362:
#define
AG903_PGP0
((
volatile
AG903_PGPn_Type
*)
AG903_PGP0_BASE
) 1363:
#define
AG903_PGP1
((
volatile
AG903_PGPn_Type
*)
AG903_PGP1_BASE
) 1364:
#define
AG903_PGP2
((
volatile
AG903_PGPn_Type
*)
AG903_PGP2_BASE
) 1365:
#define
AG903_PGP3
((
volatile
AG903_PGPn_Type
*)
AG903_PGP3_BASE
) 1366:
#define
AG903_PGP4
((
volatile
AG903_PGPn_Type
*)
AG903_PGP4_BASE
) 1367:
#define
AG903_PGP5
((
volatile
AG903_PGPn_Type
*)
AG903_PGP5_BASE
) 1368:
#define
AG903_PGPVI0
((
volatile
AG903_PGPVIn_Type
*)
AG903_PGPVI0_BASE
) 1369:
#define
AG903_PGPVI1
((
volatile
AG903_PGPVIn_Type
*)
AG903_PGPVI1_BASE
) 1370:
#define
AG903_PGPVI2
((
volatile
AG903_PGPVIn_Type
*)
AG903_PGPVI2_BASE
) 1371:
#define
AG903_PGPVI3
((
volatile
AG903_PGPVIn_Type
*)
AG903_PGPVI3_BASE
) 1372:
#define
AG903_PGP
((
volatile
AG903_PGP_Type
*)
AG903_PGP_BASE
) 1373:
#define
AG903_PGP0DGC
((
volatile
AG903_PGP0DGC_Type
*)
AG903_PGP0DGC_BASE
) 1374:
#define
AG903_PGP0DGCF
((
volatile
AG903_PGP0DGCF_Type
*)
AG903_PGP0DGCF_BASE
) 1375:
#define
AG903_PGP1DGC
((
volatile
AG903_PGP1DGC_Type
*)
AG903_PGP1DGC_BASE
) 1376:
#define
AG903_PGP1DGCF
((
volatile
AG903_PGP1DGCF_Type
*)
AG903_PGP1DGCF_BASE
) 1377: 1378: 1379:
#define
AG903_PGPn_CMD_CMD_POS
0 1380:
#define
AG903_PGPn_CMD_CMD_MSK
(0xfUL <<
AG903_PGPn_CMD_CMD_POS
) 1381: 1382:
#define
AG903_PGPn_STATE_ST_POS
0 1383:
#define
AG903_PGPn_STATE_ST_MSK
(0xfUL <<
AG903_PGPn_STATE_ST_POS
) 1384:
#define
AG903_PGPn_STATE_SST_POS
4 1385:
#define
AG903_PGPn_STATE_SST_MSK
(0xfUL <<
AG903_PGPn_STATE_SST_POS
) 1386:
#define
AG903_PGPn_STATE_QUEUE_POS
8 1387:
#define
AG903_PGPn_STATE_QUEUE_MSK
(0x3UL <<
AG903_PGPn_STATE_QUEUE_POS
) 1388:
#define
AG903_PGPn_STATE_VRMACC_POS
12 1389:
#define
AG903_PGPn_STATE_VRMACC_MSK
(0x1UL <<
AG903_PGPn_STATE_VRMACC_POS
) 1390:
#define
AG903_PGPn_STATE_BLANK_POS
13 1391:
#define
AG903_PGPn_STATE_BLANK_MSK
(0x1UL <<
AG903_PGPn_STATE_BLANK_POS
) 1392: 1393:
#define
AG903_PGPn_INTCTRLI_LINE_POS
0 1394:
#define
AG903_PGPn_INTCTRLI_LINE_MSK
(0x1fffUL <<
AG903_PGPn_INTCTRLI_LINE_POS
) 1395:
#define
AG903_PGPn_INTCTRLI_FCNT_POS
16 1396:
#define
AG903_PGPn_INTCTRLI_FCNT_MSK
(0xfUL <<
AG903_PGPn_INTCTRLI_FCNT_POS
) 1397:
#define
AG903_PGPn_INTCTRLI_FIELD_POS
20 1398:
#define
AG903_PGPn_INTCTRLI_FIELD_MSK
(0x3UL <<
AG903_PGPn_INTCTRLI_FIELD_POS
) 1399: 1400:
#define
AG903_PGPn_INTCTRLO_LINE_POS
0 1401:
#define
AG903_PGPn_INTCTRLO_LINE_MSK
(0xfffUL <<
AG903_PGPn_INTCTRLO_LINE_POS
) 1402:
#define
AG903_PGPn_INTCTRLO_FCNT_POS
16 1403:
#define
AG903_PGPn_INTCTRLO_FCNT_MSK
(0xfUL <<
AG903_PGPn_INTCTRLO_FCNT_POS
) 1404:
#define
AG903_PGPn_INTCTRLO_FIELD_POS
20 1405:
#define
AG903_PGPn_INTCTRLO_FIELD_MSK
(0x3UL <<
AG903_PGPn_INTCTRLO_FIELD_POS
) 1406: 1407:
#define
AG903_PGPn_INTEN_VLINEI_POS
0 1408:
#define
AG903_PGPn_INTEN_VLINEI_MSK
(0x1UL <<
AG903_PGPn_INTEN_VLINEI_POS
) 1409:
#define
AG903_PGPn_INTEN_VSYNCI_POS
1 1410:
#define
AG903_PGPn_INTEN_VSYNCI_MSK
(0x1UL <<
AG903_PGPn_INTEN_VSYNCI_POS
) 1411:
#define
AG903_PGPn_INTEN_VLINEO_POS
2 1412:
#define
AG903_PGPn_INTEN_VLINEO_MSK
(0x1UL <<
AG903_PGPn_INTEN_VLINEO_POS
) 1413:
#define
AG903_PGPn_INTEN_VSYNCO_POS
3 1414:
#define
AG903_PGPn_INTEN_VSYNCO_MSK
(0x1UL <<
AG903_PGPn_INTEN_VSYNCO_POS
) 1415:
#define
AG903_PGPn_INTEN_HGMCPL_POS
4 1416:
#define
AG903_PGPn_INTEN_HGMCPL_MSK
(0x1UL <<
AG903_PGPn_INTEN_HGMCPL_POS
) 1417:
#define
AG903_PGPn_INTEN_HGMICPL_POS
5 1418:
#define
AG903_PGPn_INTEN_HGMICPL_MSK
(0x1UL <<
AG903_PGPn_INTEN_HGMICPL_POS
) 1419:
#define
AG903_PGPn_INTEN_LBLCPL_POS
6 1420:
#define
AG903_PGPn_INTEN_LBLCPL_MSK
(0x1UL <<
AG903_PGPn_INTEN_LBLCPL_POS
) 1421:
#define
AG903_PGPn_INTEN_LBLCRPT_POS
7 1422:
#define
AG903_PGPn_INTEN_LBLCRPT_MSK
(0x1UL <<
AG903_PGPn_INTEN_LBLCRPT_POS
) 1423:
#define
AG903_PGPn_INTEN_IFCOFM_POS
8 1424:
#define
AG903_PGPn_INTEN_IFCOFM_MSK
(0x1UL <<
AG903_PGPn_INTEN_IFCOFM_POS
) 1425:
#define
AG903_PGPn_INTEN_IFCOFS_POS
9 1426:
#define
AG903_PGPn_INTEN_IFCOFS_MSK
(0x1UL <<
AG903_PGPn_INTEN_IFCOFS_POS
) 1427:
#define
AG903_PGPn_INTEN_VOOFLW_POS
10 1428:
#define
AG903_PGPn_INTEN_VOOFLW_MSK
(0x1UL <<
AG903_PGPn_INTEN_VOOFLW_POS
) 1429:
#define
AG903_PGPn_INTEN_VOICPL_POS
11 1430:
#define
AG903_PGPn_INTEN_VOICPL_MSK
(0x1UL <<
AG903_PGPn_INTEN_VOICPL_POS
) 1431:
#define
AG903_PGPn_INTEN_ND_POS
12 1432:
#define
AG903_PGPn_INTEN_ND_MSK
(0x1UL <<
AG903_PGPn_INTEN_ND_POS
) 1433: 1434:
#define
AG903_PGPn_INTSTAT_VLINEI_POS
0 1435:
#define
AG903_PGPn_INTSTAT_VLINEI_MSK
(0x1UL <<
AG903_PGPn_INTSTAT_VLINEI_POS
) 1436:
#define
AG903_PGPn_INTSTAT_VSYNCI_POS
1 1437:
#define
AG903_PGPn_INTSTAT_VSYNCI_MSK
(0x1UL <<
AG903_PGPn_INTSTAT_VSYNCI_POS
) 1438:
#define
AG903_PGPn_INTSTAT_VLINEO_POS
2 1439:
#define
AG903_PGPn_INTSTAT_VLINEO_MSK
(0x1UL <<
AG903_PGPn_INTSTAT_VLINEO_POS
) 1440:
#define
AG903_PGPn_INTSTAT_VSYNCO_POS
3 1441:
#define
AG903_PGPn_INTSTAT_VSYNCO_MSK
(0x1UL <<
AG903_PGPn_INTSTAT_VSYNCO_POS
) 1442:
#define
AG903_PGPn_INTSTAT_HGMCPL_POS
4 1443:
#define
AG903_PGPn_INTSTAT_HGMCPL_MSK
(0x1UL <<
AG903_PGPn_INTSTAT_HGMCPL_POS
) 1444:
#define
AG903_PGPn_INTSTAT_HGMICPL_POS
5 1445:
#define
AG903_PGPn_INTSTAT_HGMICPL_MSK
(0x1UL <<
AG903_PGPn_INTSTAT_HGMICPL_POS
) 1446:
#define
AG903_PGPn_INTSTAT_LBLCPL_POS
6 1447:
#define
AG903_PGPn_INTSTAT_LBLCPL_MSK
(0x1UL <<
AG903_PGPn_INTSTAT_LBLCPL_POS
) 1448:
#define
AG903_PGPn_INTSTAT_LBLCRPT_POS
7 1449:
#define
AG903_PGPn_INTSTAT_LBLCRPT_MSK
(0x1UL <<
AG903_PGPn_INTSTAT_LBLCRPT_POS
) 1450:
#define
AG903_PGPn_INTSTAT_IFCOFM_POS
8 1451:
#define
AG903_PGPn_INTSTAT_IFCOFM_MSK
(0x1UL <<
AG903_PGPn_INTSTAT_IFCOFM_POS
) 1452:
#define
AG903_PGPn_INTSTAT_IFCOFS_POS
9 1453:
#define
AG903_PGPn_INTSTAT_IFCOFS_MSK
(0x1UL <<
AG903_PGPn_INTSTAT_IFCOFS_POS
) 1454:
#define
AG903_PGPn_INTSTAT_VOOFLW_POS
10 1455:
#define
AG903_PGPn_INTSTAT_VOOFLW_MSK
(0x1UL <<
AG903_PGPn_INTSTAT_VOOFLW_POS
) 1456:
#define
AG903_PGPn_INTSTAT_VOICPL_POS
11 1457:
#define
AG903_PGPn_INTSTAT_VOICPL_MSK
(0x1UL <<
AG903_PGPn_INTSTAT_VOICPL_POS
) 1458:
#define
AG903_PGPn_INTSTAT_ND_POS
12 1459:
#define
AG903_PGPn_INTSTAT_ND_MSK
(0x1UL <<
AG903_PGPn_INTSTAT_ND_POS
) 1460: 1461:
#define
AG903_PGPn_INTCLR_VLINEI_POS
0 1462:
#define
AG903_PGPn_INTCLR_VLINEI_MSK
(0x1UL <<
AG903_PGPn_INTCLR_VLINEI_POS
) 1463:
#define
AG903_PGPn_INTCLR_VSYNCI_POS
1 1464:
#define
AG903_PGPn_INTCLR_VSYNCI_MSK
(0x1UL <<
AG903_PGPn_INTCLR_VSYNCI_POS
) 1465:
#define
AG903_PGPn_INTCLR_VLINEO_POS
2 1466:
#define
AG903_PGPn_INTCLR_VLINEO_MSK
(0x1UL <<
AG903_PGPn_INTCLR_VLINEO_POS
) 1467:
#define
AG903_PGPn_INTCLR_VSYNCO_POS
3 1468:
#define
AG903_PGPn_INTCLR_VSYNCO_MSK
(0x1UL <<
AG903_PGPn_INTCLR_VSYNCO_POS
) 1469:
#define
AG903_PGPn_INTCLR_HGMCPL_POS
4 1470:
#define
AG903_PGPn_INTCLR_HGMCPL_MSK
(0x1UL <<
AG903_PGPn_INTCLR_HGMCPL_POS
) 1471:
#define
AG903_PGPn_INTCLR_HGMICPL_POS
5 1472:
#define
AG903_PGPn_INTCLR_HGMICPL_MSK
(0x1UL <<
AG903_PGPn_INTCLR_HGMICPL_POS
) 1473:
#define
AG903_PGPn_INTCLR_LBLCPL_POS
6 1474:
#define
AG903_PGPn_INTCLR_LBLCPL_MSK
(0x1UL <<
AG903_PGPn_INTCLR_LBLCPL_POS
) 1475:
#define
AG903_PGPn_INTCLR_LBLCRPT_POS
7 1476:
#define
AG903_PGPn_INTCLR_LBLCRPT_MSK
(0x1UL <<
AG903_PGPn_INTCLR_LBLCRPT_POS
) 1477:
#define
AG903_PGPn_INTCLR_IFCOFM_POS
8 1478:
#define
AG903_PGPn_INTCLR_IFCOFM_MSK
(0x1UL <<
AG903_PGPn_INTCLR_IFCOFM_POS
) 1479:
#define
AG903_PGPn_INTCLR_IFCOFS_POS
9 1480:
#define
AG903_PGPn_INTCLR_IFCOFS_MSK
(0x1UL <<
AG903_PGPn_INTCLR_IFCOFS_POS
) 1481:
#define
AG903_PGPn_INTCLR_VOOFLW_POS
10 1482:
#define
AG903_PGPn_INTCLR_VOOFLW_MSK
(0x1UL <<
AG903_PGPn_INTCLR_VOOFLW_POS
) 1483:
#define
AG903_PGPn_INTCLR_VOICPL_POS
11 1484:
#define
AG903_PGPn_INTCLR_VOICPL_MSK
(0x1UL <<
AG903_PGPn_INTCLR_VOICPL_POS
) 1485:
#define
AG903_PGPn_INTCLR_ND_POS
12 1486:
#define
AG903_PGPn_INTCLR_ND_MSK
(0x1UL <<
AG903_PGPn_INTCLR_ND_POS
) 1487: 1488:
#define
AG903_PGPn_TRGCTRLI_LINE_POS
0 1489:
#define
AG903_PGPn_TRGCTRLI_LINE_MSK
(0x1fffUL <<
AG903_PGPn_TRGCTRLI_LINE_POS
) 1490:
#define
AG903_PGPn_TRGCTRLI_FCNT_POS
16 1491:
#define
AG903_PGPn_TRGCTRLI_FCNT_MSK
(0xfUL <<
AG903_PGPn_TRGCTRLI_FCNT_POS
) 1492:
#define
AG903_PGPn_TRGCTRLI_FIELD_POS
20 1493:
#define
AG903_PGPn_TRGCTRLI_FIELD_MSK
(0x3UL <<
AG903_PGPn_TRGCTRLI_FIELD_POS
) 1494: 1495:
#define
AG903_PGPn_TRGCTRLO_LINE_POS
0 1496:
#define
AG903_PGPn_TRGCTRLO_LINE_MSK
(0xfffUL <<
AG903_PGPn_TRGCTRLO_LINE_POS
) 1497:
#define
AG903_PGPn_TRGCTRLO_FCNT_POS
16 1498:
#define
AG903_PGPn_TRGCTRLO_FCNT_MSK
(0xfUL <<
AG903_PGPn_TRGCTRLO_FCNT_POS
) 1499:
#define
AG903_PGPn_TRGCTRLO_FIELD_POS
20 1500:
#define
AG903_PGPn_TRGCTRLO_FIELD_MSK
(0x3UL <<
AG903_PGPn_TRGCTRLO_FIELD_POS
) 1501: 1502:
#define
AG903_PGPn_TRGEN_VLINEI_POS
0 1503:
#define
AG903_PGPn_TRGEN_VLINEI_MSK
(0x1UL <<
AG903_PGPn_TRGEN_VLINEI_POS
) 1504:
#define
AG903_PGPn_TRGEN_VSYNCI_POS
1 1505:
#define
AG903_PGPn_TRGEN_VSYNCI_MSK
(0x1UL <<
AG903_PGPn_TRGEN_VSYNCI_POS
) 1506:
#define
AG903_PGPn_TRGEN_VLINEO_POS
2 1507:
#define
AG903_PGPn_TRGEN_VLINEO_MSK
(0x1UL <<
AG903_PGPn_TRGEN_VLINEO_POS
) 1508:
#define
AG903_PGPn_TRGEN_VSYNCO_POS
3 1509:
#define
AG903_PGPn_TRGEN_VSYNCO_MSK
(0x1UL <<
AG903_PGPn_TRGEN_VSYNCO_POS
) 1510: 1511:
#define
AG903_PGPn_INCTRL_FMT_POS
0 1512:
#define
AG903_PGPn_INCTRL_FMT_MSK
(0x7UL <<
AG903_PGPn_INCTRL_FMT_POS
) 1513:
#define
AG903_PGPn_INCTRL_SEL_POS
8 1514:
#define
AG903_PGPn_INCTRL_SEL_MSK
(0xfUL <<
AG903_PGPn_INCTRL_SEL_POS
) 1515:
#define
AG903_PGPn_INCTRL_TRG_POS
16 1516:
#define
AG903_PGPn_INCTRL_TRG_MSK
(0x7UL <<
AG903_PGPn_INCTRL_TRG_POS
) 1517:
#define
AG903_PGPn_INCTRL_TICK_POS
24 1518:
#define
AG903_PGPn_INCTRL_TICK_MSK
(0x1UL <<
AG903_PGPn_INCTRL_TICK_POS
) 1519:
#define
AG903_PGPn_INCTRL_MD_POS
25 1520:
#define
AG903_PGPn_INCTRL_MD_MSK
(0x3UL <<
AG903_PGPn_INCTRL_MD_POS
) 1521:
#define
AG903_PGPn_INCTRL_HDLY_POS
28 1522:
#define
AG903_PGPn_INCTRL_HDLY_MSK
(0x7UL <<
AG903_PGPn_INCTRL_HDLY_POS
) 1523: 1524:
#define
AG903_PGPn_FUNCCTRL_NRF_POS
0 1525:
#define
AG903_PGPn_FUNCCTRL_NRF_MSK
(0x1UL <<
AG903_PGPn_FUNCCTRL_NRF_POS
) 1526:
#define
AG903_PGPn_FUNCCTRL_CSC1_POS
1 1527:
#define
AG903_PGPn_FUNCCTRL_CSC1_MSK
(0x1UL <<
AG903_PGPn_FUNCCTRL_CSC1_POS
) 1528:
#define
AG903_PGPn_FUNCCTRL_SCALE_POS
2 1529:
#define
AG903_PGPn_FUNCCTRL_SCALE_MSK
(0x1UL <<
AG903_PGPn_FUNCCTRL_SCALE_POS
) 1530:
#define
AG903_PGPn_FUNCCTRL_SPF_POS
3 1531:
#define
AG903_PGPn_FUNCCTRL_SPF_MSK
(0x1UL <<
AG903_PGPn_FUNCCTRL_SPF_POS
) 1532:
#define
AG903_PGPn_FUNCCTRL_HSV1_POS
4 1533:
#define
AG903_PGPn_FUNCCTRL_HSV1_MSK
(0x1UL <<
AG903_PGPn_FUNCCTRL_HSV1_POS
) 1534:
#define
AG903_PGPn_FUNCCTRL_DGC_POS
5 1535:
#define
AG903_PGPn_FUNCCTRL_DGC_MSK
(0x1UL <<
AG903_PGPn_FUNCCTRL_DGC_POS
) 1536:
#define
AG903_PGPn_FUNCCTRL_THR_POS
6 1537:
#define
AG903_PGPn_FUNCCTRL_THR_MSK
(0x1UL <<
AG903_PGPn_FUNCCTRL_THR_POS
) 1538:
#define
AG903_PGPn_FUNCCTRL_IFC_POS
7 1539:
#define
AG903_PGPn_FUNCCTRL_IFC_MSK
(0x1UL <<
AG903_PGPn_FUNCCTRL_IFC_POS
) 1540:
#define
AG903_PGPn_FUNCCTRL_IFCODR_POS
8 1541:
#define
AG903_PGPn_FUNCCTRL_IFCODR_MSK
(0x1UL <<
AG903_PGPn_FUNCCTRL_IFCODR_POS
) 1542:
#define
AG903_PGPn_FUNCCTRL_OUT_POS
9 1543:
#define
AG903_PGPn_FUNCCTRL_OUT_MSK
(0x1UL <<
AG903_PGPn_FUNCCTRL_OUT_POS
) 1544: 1545:
#define
AG903_PGPn_SIZE_HSIZE_POS
0 1546:
#define
AG903_PGPn_SIZE_HSIZE_MSK
(0xfffUL <<
AG903_PGPn_SIZE_HSIZE_POS
) 1547:
#define
AG903_PGPn_SIZE_VSIZE_POS
16 1548:
#define
AG903_PGPn_SIZE_VSIZE_MSK
(0xfffUL <<
AG903_PGPn_SIZE_VSIZE_POS
) 1549: 1550:
#define
AG903_PGPn_POS_HPOS_POS
0 1551:
#define
AG903_PGPn_POS_HPOS_MSK
(0x1fffUL <<
AG903_PGPn_POS_HPOS_POS
) 1552:
#define
AG903_PGPn_POS_VPOS_POS
16 1553:
#define
AG903_PGPn_POS_VPOS_MSK
(0x1fffUL <<
AG903_PGPn_POS_VPOS_POS
) 1554:
#define
AG903_PGPn_POS_SCAN_POS
29 1555:
#define
AG903_PGPn_POS_SCAN_MSK
(0x1UL <<
AG903_PGPn_POS_SCAN_POS
) 1556:
#define
AG903_PGPn_POS_OPOS_POS
30 1557:
#define
AG903_PGPn_POS_OPOS_MSK
(0x1UL <<
AG903_PGPn_POS_OPOS_POS
) 1558:
#define
AG903_PGPn_POS_EPOS_POS
31 1559:
#define
AG903_PGPn_POS_EPOS_MSK
(0x1UL <<
AG903_PGPn_POS_EPOS_POS
) 1560: 1561:
#define
AG903_PGPn_OUTCTRL0_FMT_POS
0 1562:
#define
AG903_PGPn_OUTCTRL0_FMT_MSK
(0xfUL <<
AG903_PGPn_OUTCTRL0_FMT_POS
) 1563:
#define
AG903_PGPn_OUTCTRL0_MD_POS
4 1564:
#define
AG903_PGPn_OUTCTRL0_MD_MSK
(0x7UL <<
AG903_PGPn_OUTCTRL0_MD_POS
) 1565:
#define
AG903_PGPn_OUTCTRL0_SWAP1_POS
8 1566:
#define
AG903_PGPn_OUTCTRL0_SWAP1_MSK
(0x1UL <<
AG903_PGPn_OUTCTRL0_SWAP1_POS
) 1567:
#define
AG903_PGPn_OUTCTRL0_SWAP4_POS
9 1568:
#define
AG903_PGPn_OUTCTRL0_SWAP4_MSK
(0x1UL <<
AG903_PGPn_OUTCTRL0_SWAP4_POS
) 1569:
#define
AG903_PGPn_OUTCTRL0_SWAPH_POS
10 1570:
#define
AG903_PGPn_OUTCTRL0_SWAPH_MSK
(0x1UL <<
AG903_PGPn_OUTCTRL0_SWAPH_POS
) 1571:
#define
AG903_PGPn_OUTCTRL0_SWAPW_POS
11 1572:
#define
AG903_PGPn_OUTCTRL0_SWAPW_MSK
(0x1UL <<
AG903_PGPn_OUTCTRL0_SWAPW_POS
) 1573:
#define
AG903_PGPn_OUTCTRL0_DIM_POS
12 1574:
#define
AG903_PGPn_OUTCTRL0_DIM_MSK
(0x1UL <<
AG903_PGPn_OUTCTRL0_DIM_POS
) 1575:
#define
AG903_PGPn_OUTCTRL0_SCAN_POS
13 1576:
#define
AG903_PGPn_OUTCTRL0_SCAN_MSK
(0x1UL <<
AG903_PGPn_OUTCTRL0_SCAN_POS
) 1577:
#define
AG903_PGPn_OUTCTRL0_BMU_POS
14 1578:
#define
AG903_PGPn_OUTCTRL0_BMU_MSK
(0x3UL <<
AG903_PGPn_OUTCTRL0_BMU_POS
) 1579:
#define
AG903_PGPn_OUTCTRL0_DTH_POS
16 1580:
#define
AG903_PGPn_OUTCTRL0_DTH_MSK
(0x1UL <<
AG903_PGPn_OUTCTRL0_DTH_POS
) 1581:
#define
AG903_PGPn_OUTCTRL0_FAI_POS
17 1582:
#define
AG903_PGPn_OUTCTRL0_FAI_MSK
(0x1UL <<
AG903_PGPn_OUTCTRL0_FAI_POS
) 1583:
#define
AG903_PGPn_OUTCTRL0_LIMIT_POS
18 1584:
#define
AG903_PGPn_OUTCTRL0_LIMIT_MSK
(0x1UL <<
AG903_PGPn_OUTCTRL0_LIMIT_POS
) 1585:
#define
AG903_PGPn_OUTCTRL0_PAD_POS
24 1586:
#define
AG903_PGPn_OUTCTRL0_PAD_MSK
(0xffUL <<
AG903_PGPn_OUTCTRL0_PAD_POS
) 1587: 1588:
#define
AG903_PGPn_OUTCTRL1_BE_POS
0 1589:
#define
AG903_PGPn_OUTCTRL1_BE_MSK
(0x1UL <<
AG903_PGPn_OUTCTRL1_BE_POS
) 1590:
#define
AG903_PGPn_OUTCTRL1_GE_POS
1 1591:
#define
AG903_PGPn_OUTCTRL1_GE_MSK
(0x1UL <<
AG903_PGPn_OUTCTRL1_GE_POS
) 1592:
#define
AG903_PGPn_OUTCTRL1_RE_POS
2 1593:
#define
AG903_PGPn_OUTCTRL1_RE_MSK
(0x1UL <<
AG903_PGPn_OUTCTRL1_RE_POS
) 1594: 1595:
#define
AG903_PGPn_OUTBASE_ADR_POS
3 1596:
#define
AG903_PGPn_OUTBASE_ADR_MSK
(0x1fffffffUL <<
AG903_PGPn_OUTBASE_ADR_POS
) 1597: 1598:
#define
AG903_PGPn_OUTHSIZE_HSIZE_POS
0 1599:
#define
AG903_PGPn_OUTHSIZE_HSIZE_MSK
(0x3fffUL <<
AG903_PGPn_OUTHSIZE_HSIZE_POS
) 1600: 1601:
#define
AG903_PGPn_FAIVAL0_TMSTMP_POS
0 1602:
#define
AG903_PGPn_FAIVAL0_TMSTMP_MSK
(0xffffffffUL <<
AG903_PGPn_FAIVAL0_TMSTMP_POS
) 1603: 1604:
#define
AG903_PGPn_FAIVAL1_FNUM_POS
0 1605:
#define
AG903_PGPn_FAIVAL1_FNUM_MSK
(0xffffUL <<
AG903_PGPn_FAIVAL1_FNUM_POS
) 1606:
#define
AG903_PGPn_FAIVAL1_PORT_POS
16 1607:
#define
AG903_PGPn_FAIVAL1_PORT_MSK
(0x7UL <<
AG903_PGPn_FAIVAL1_PORT_POS
) 1608:
#define
AG903_PGPn_FAIVAL1_FIELD_POS
19 1609:
#define
AG903_PGPn_FAIVAL1_FIELD_MSK
(0x1UL <<
AG903_PGPn_FAIVAL1_FIELD_POS
) 1610: 1611:
#define
AG903_PGPn_IPCPRM_BLKC_POS
0 1612:
#define
AG903_PGPn_IPCPRM_BLKC_MSK
(0xffUL <<
AG903_PGPn_IPCPRM_BLKC_POS
) 1613:
#define
AG903_PGPn_IPCPRM_BLKY_POS
8 1614:
#define
AG903_PGPn_IPCPRM_BLKY_MSK
(0xffUL <<
AG903_PGPn_IPCPRM_BLKY_POS
) 1615:
#define
AG903_PGPn_IPCPRM_LIMIT_POS
16 1616:
#define
AG903_PGPn_IPCPRM_LIMIT_MSK
(0x1UL <<
AG903_PGPn_IPCPRM_LIMIT_POS
) 1617: 1618:
#define
AG903_PGPn_CSC1CTRL_SFT_POS
0 1619:
#define
AG903_PGPn_CSC1CTRL_SFT_MSK
(0xfUL <<
AG903_PGPn_CSC1CTRL_SFT_POS
) 1620:
#define
AG903_PGPn_CSC1CTRL_LIMIT_POS
4 1621:
#define
AG903_PGPn_CSC1CTRL_LIMIT_MSK
(0x1UL <<
AG903_PGPn_CSC1CTRL_LIMIT_POS
) 1622: 1623:
#define
AG903_PGPn_CSC1PRM0_M11_POS
0 1624:
#define
AG903_PGPn_CSC1PRM0_M11_MSK
(0xfffUL <<
AG903_PGPn_CSC1PRM0_M11_POS
) 1625:
#define
AG903_PGPn_CSC1PRM0_M12_POS
16 1626:
#define
AG903_PGPn_CSC1PRM0_M12_MSK
(0xfffUL <<
AG903_PGPn_CSC1PRM0_M12_POS
) 1627: 1628:
#define
AG903_PGPn_CSC1PRM1_M13_POS
0 1629:
#define
AG903_PGPn_CSC1PRM1_M13_MSK
(0xfffUL <<
AG903_PGPn_CSC1PRM1_M13_POS
) 1630: 1631:
#define
AG903_PGPn_CSC1PRM2_M14_POS
0 1632:
#define
AG903_PGPn_CSC1PRM2_M14_MSK
(0xfffffUL <<
AG903_PGPn_CSC1PRM2_M14_POS
) 1633: 1634:
#define
AG903_PGPn_CSC1PRM3_M21_POS
0 1635:
#define
AG903_PGPn_CSC1PRM3_M21_MSK
(0xfffUL <<
AG903_PGPn_CSC1PRM3_M21_POS
) 1636:
#define
AG903_PGPn_CSC1PRM3_M22_POS
16 1637:
#define
AG903_PGPn_CSC1PRM3_M22_MSK
(0xfffUL <<
AG903_PGPn_CSC1PRM3_M22_POS
) 1638: 1639:
#define
AG903_PGPn_CSC1PRM4_M23_POS
0 1640:
#define
AG903_PGPn_CSC1PRM4_M23_MSK
(0xfffUL <<
AG903_PGPn_CSC1PRM4_M23_POS
) 1641: 1642:
#define
AG903_PGPn_CSC1PRM5_M24_POS
0 1643:
#define
AG903_PGPn_CSC1PRM5_M24_MSK
(0xfffffUL <<
AG903_PGPn_CSC1PRM5_M24_POS
) 1644: 1645:
#define
AG903_PGPn_CSC1PRM6_M31_POS
0 1646:
#define
AG903_PGPn_CSC1PRM6_M31_MSK
(0xfffUL <<
AG903_PGPn_CSC1PRM6_M31_POS
) 1647:
#define
AG903_PGPn_CSC1PRM6_M32_POS
16 1648:
#define
AG903_PGPn_CSC1PRM6_M32_MSK
(0xfffUL <<
AG903_PGPn_CSC1PRM6_M32_POS
) 1649: 1650:
#define
AG903_PGPn_CSC1PRM7_M33_POS
0 1651:
#define
AG903_PGPn_CSC1PRM7_M33_MSK
(0xfffUL <<
AG903_PGPn_CSC1PRM7_M33_POS
) 1652: 1653:
#define
AG903_PGPn_CSC1PRM8_M34_POS
0 1654:
#define
AG903_PGPn_CSC1PRM8_M34_MSK
(0xfffffUL <<
AG903_PGPn_CSC1PRM8_M34_POS
) 1655: 1656:
#define
AG903_PGPn_SCCTRL_DNMH_POS
0 1657:
#define
AG903_PGPn_SCCTRL_DNMH_MSK
(0xfUL <<
AG903_PGPn_SCCTRL_DNMH_POS
) 1658:
#define
AG903_PGPn_SCCTRL_NMRH_POS
4 1659:
#define
AG903_PGPn_SCCTRL_NMRH_MSK
(0xfUL <<
AG903_PGPn_SCCTRL_NMRH_POS
) 1660:
#define
AG903_PGPn_SCCTRL_DNMV_POS
8 1661:
#define
AG903_PGPn_SCCTRL_DNMV_MSK
(0xfUL <<
AG903_PGPn_SCCTRL_DNMV_POS
) 1662:
#define
AG903_PGPn_SCCTRL_NMRV_POS
12 1663:
#define
AG903_PGPn_SCCTRL_NMRV_MSK
(0xfUL <<
AG903_PGPn_SCCTRL_NMRV_POS
) 1664:
#define
AG903_PGPn_SCCTRL_MTD_POS
16 1665:
#define
AG903_PGPn_SCCTRL_MTD_MSK
(0x1UL <<
AG903_PGPn_SCCTRL_MTD_POS
) 1666:
#define
AG903_PGPn_SCCTRL_LIMIT_POS
17 1667:
#define
AG903_PGPn_SCCTRL_LIMIT_MSK
(0x1UL <<
AG903_PGPn_SCCTRL_LIMIT_POS
) 1668: 1669:
#define
AG903_PGPn_SPFCTRL_B_POS
0 1670:
#define
AG903_PGPn_SPFCTRL_B_MSK
(0xffUL <<
AG903_PGPn_SPFCTRL_B_POS
) 1671:
#define
AG903_PGPn_SPFCTRL_G_POS
8 1672:
#define
AG903_PGPn_SPFCTRL_G_MSK
(0xffUL <<
AG903_PGPn_SPFCTRL_G_POS
) 1673:
#define
AG903_PGPn_SPFCTRL_R_POS
16 1674:
#define
AG903_PGPn_SPFCTRL_R_MSK
(0xffUL <<
AG903_PGPn_SPFCTRL_R_POS
) 1675:
#define
AG903_PGPn_SPFCTRL_BC_POS
24 1676:
#define
AG903_PGPn_SPFCTRL_BC_MSK
(0x1UL <<
AG903_PGPn_SPFCTRL_BC_POS
) 1677:
#define
AG903_PGPn_SPFCTRL_SFT_POS
28 1678:
#define
AG903_PGPn_SPFCTRL_SFT_MSK
(0xfUL <<
AG903_PGPn_SPFCTRL_SFT_POS
) 1679: 1680:
#define
AG903_PGPn_SPFPRM0_HMM_POS
0 1681:
#define
AG903_PGPn_SPFPRM0_HMM_MSK
(0xffUL <<
AG903_PGPn_SPFPRM0_HMM_POS
) 1682:
#define
AG903_PGPn_SPFPRM0_H0M_POS
8 1683:
#define
AG903_PGPn_SPFPRM0_H0M_MSK
(0xffUL <<
AG903_PGPn_SPFPRM0_H0M_POS
) 1684:
#define
AG903_PGPn_SPFPRM0_H1M_POS
16 1685:
#define
AG903_PGPn_SPFPRM0_H1M_MSK
(0xffUL <<
AG903_PGPn_SPFPRM0_H1M_POS
) 1686: 1687:
#define
AG903_PGPn_SPFPRM1_HM0_POS
0 1688:
#define
AG903_PGPn_SPFPRM1_HM0_MSK
(0xffUL <<
AG903_PGPn_SPFPRM1_HM0_POS
) 1689:
#define
AG903_PGPn_SPFPRM1_H00_POS
8 1690:
#define
AG903_PGPn_SPFPRM1_H00_MSK
(0xffUL <<
AG903_PGPn_SPFPRM1_H00_POS
) 1691:
#define
AG903_PGPn_SPFPRM1_H10_POS
16 1692:
#define
AG903_PGPn_SPFPRM1_H10_MSK
(0xffUL <<
AG903_PGPn_SPFPRM1_H10_POS
) 1693: 1694:
#define
AG903_PGPn_SPFPRM2_HM1_POS
0 1695:
#define
AG903_PGPn_SPFPRM2_HM1_MSK
(0xffUL <<
AG903_PGPn_SPFPRM2_HM1_POS
) 1696:
#define
AG903_PGPn_SPFPRM2_H01_POS
8 1697:
#define
AG903_PGPn_SPFPRM2_H01_MSK
(0xffUL <<
AG903_PGPn_SPFPRM2_H01_POS
) 1698:
#define
AG903_PGPn_SPFPRM2_H11_POS
16 1699:
#define
AG903_PGPn_SPFPRM2_H11_MSK
(0xffUL <<
AG903_PGPn_SPFPRM2_H11_POS
) 1700: 1701:
#define
AG903_PGPn_SPFPRM3_OFS_POS
0 1702:
#define
AG903_PGPn_SPFPRM3_OFS_MSK
(0x1ffUL <<
AG903_PGPn_SPFPRM3_OFS_POS
) 1703: 1704:
#define
AG903_PGPn_HSV1CTRL_FMT_POS
0 1705:
#define
AG903_PGPn_HSV1CTRL_FMT_MSK
(0x1UL <<
AG903_PGPn_HSV1CTRL_FMT_POS
) 1706: 1707:
#define
AG903_PGPn_DGCSTAT_QUEUE_POS
0 1708:
#define
AG903_PGPn_DGCSTAT_QUEUE_MSK
(0x7UL <<
AG903_PGPn_DGCSTAT_QUEUE_POS
) 1709: 1710:
#define
AG903_PGPn_HGMCMD_CMD_POS
0 1711:
#define
AG903_PGPn_HGMCMD_CMD_MSK
(0x7UL <<
AG903_PGPn_HGMCMD_CMD_POS
) 1712: 1713:
#define
AG903_PGPn_HGMCTRL_HINC_POS
0 1714:
#define
AG903_PGPn_HGMCTRL_HINC_MSK
(0xfUL <<
AG903_PGPn_HGMCTRL_HINC_POS
) 1715:
#define
AG903_PGPn_HGMCTRL_VINC_POS
4 1716:
#define
AG903_PGPn_HGMCTRL_VINC_MSK
(0xfUL <<
AG903_PGPn_HGMCTRL_VINC_POS
) 1717:
#define
AG903_PGPn_HGMCTRL_SFT_POS
8 1718:
#define
AG903_PGPn_HGMCTRL_SFT_MSK
(0xfUL <<
AG903_PGPn_HGMCTRL_SFT_POS
) 1719:
#define
AG903_PGPn_HGMCTRL_THR_POS
12 1720:
#define
AG903_PGPn_HGMCTRL_THR_MSK
(0xfUL <<
AG903_PGPn_HGMCTRL_THR_POS
) 1721:
#define
AG903_PGPn_HGMCTRL_EXC_POS
16 1722:
#define
AG903_PGPn_HGMCTRL_EXC_MSK
(0x3UL <<
AG903_PGPn_HGMCTRL_EXC_POS
) 1723:
#define
AG903_PGPn_HGMCTRL_BMU_POS
18 1724:
#define
AG903_PGPn_HGMCTRL_BMU_MSK
(0x1UL <<
AG903_PGPn_HGMCTRL_BMU_POS
) 1725:
#define
AG903_PGPn_HGMCTRL_INV_POS
24 1726:
#define
AG903_PGPn_HGMCTRL_INV_MSK
(0xfUL <<
AG903_PGPn_HGMCTRL_INV_POS
) 1727: 1728:
#define
AG903_PGPn_HGMSIZE_HSIZE_POS
0 1729:
#define
AG903_PGPn_HGMSIZE_HSIZE_MSK
(0x3ffUL <<
AG903_PGPn_HGMSIZE_HSIZE_POS
) 1730:
#define
AG903_PGPn_HGMSIZE_VSIZE_POS
16 1731:
#define
AG903_PGPn_HGMSIZE_VSIZE_MSK
(0x3ffUL <<
AG903_PGPn_HGMSIZE_VSIZE_POS
) 1732: 1733:
#define
AG903_PGPn_HGMPOS_HPOS_POS
0 1734:
#define
AG903_PGPn_HGMPOS_HPOS_MSK
(0xfffUL <<
AG903_PGPn_HGMPOS_HPOS_POS
) 1735:
#define
AG903_PGPn_HGMPOS_VPOS_POS
16 1736:
#define
AG903_PGPn_HGMPOS_VPOS_MSK
(0xfffUL <<
AG903_PGPn_HGMPOS_VPOS_POS
) 1737: 1738:
#define
AG903_PGPn_HGMDST_ADR_POS
3 1739:
#define
AG903_PGPn_HGMDST_ADR_MSK
(0x1fffffffUL <<
AG903_PGPn_HGMDST_ADR_POS
) 1740: 1741:
#define
AG903_PGPn_HGMMOD0_CNT_POS
0 1742:
#define
AG903_PGPn_HGMMOD0_CNT_MSK
(0xffffUL <<
AG903_PGPn_HGMMOD0_CNT_POS
) 1743:
#define
AG903_PGPn_HGMMOD0_VAL_POS
16 1744:
#define
AG903_PGPn_HGMMOD0_VAL_MSK
(0xffUL <<
AG903_PGPn_HGMMOD0_VAL_POS
) 1745:
#define
AG903_PGPn_HGMMOD0_BW_POS
24 1746:
#define
AG903_PGPn_HGMMOD0_BW_MSK
(0x1fUL <<
AG903_PGPn_HGMMOD0_BW_POS
) 1747: 1748:
#define
AG903_PGPn_HGMRNG0_MINVAL_POS
0 1749:
#define
AG903_PGPn_HGMRNG0_MINVAL_MSK
(0xffUL <<
AG903_PGPn_HGMRNG0_MINVAL_POS
) 1750:
#define
AG903_PGPn_HGMRNG0_MAXVAL_POS
8 1751:
#define
AG903_PGPn_HGMRNG0_MAXVAL_MSK
(0xffUL <<
AG903_PGPn_HGMRNG0_MAXVAL_POS
) 1752: 1753:
#define
AG903_PGPn_HGMMOD1_CNT_POS
0 1754:
#define
AG903_PGPn_HGMMOD1_CNT_MSK
(0xffffUL <<
AG903_PGPn_HGMMOD1_CNT_POS
) 1755:
#define
AG903_PGPn_HGMMOD1_VAL_POS
16 1756:
#define
AG903_PGPn_HGMMOD1_VAL_MSK
(0xffUL <<
AG903_PGPn_HGMMOD1_VAL_POS
) 1757:
#define
AG903_PGPn_HGMMOD1_BW_POS
24 1758:
#define
AG903_PGPn_HGMMOD1_BW_MSK
(0x1fUL <<
AG903_PGPn_HGMMOD1_BW_POS
) 1759: 1760:
#define
AG903_PGPn_HGMRNG1_MINVAL_POS
0 1761:
#define
AG903_PGPn_HGMRNG1_MINVAL_MSK
(0xffUL <<
AG903_PGPn_HGMRNG1_MINVAL_POS
) 1762:
#define
AG903_PGPn_HGMRNG1_MAXVAL_POS
8 1763:
#define
AG903_PGPn_HGMRNG1_MAXVAL_MSK
(0xffUL <<
AG903_PGPn_HGMRNG1_MAXVAL_POS
) 1764: 1765:
#define
AG903_PGPn_HGMMOD2_CNT_POS
0 1766:
#define
AG903_PGPn_HGMMOD2_CNT_MSK
(0xffffUL <<
AG903_PGPn_HGMMOD2_CNT_POS
) 1767:
#define
AG903_PGPn_HGMMOD2_VAL_POS
16 1768:
#define
AG903_PGPn_HGMMOD2_VAL_MSK
(0xffUL <<
AG903_PGPn_HGMMOD2_VAL_POS
) 1769:
#define
AG903_PGPn_HGMMOD2_BW_POS
24 1770:
#define
AG903_PGPn_HGMMOD2_BW_MSK
(0x1fUL <<
AG903_PGPn_HGMMOD2_BW_POS
) 1771: 1772:
#define
AG903_PGPn_HGMRNG2_MINVAL_POS
0 1773:
#define
AG903_PGPn_HGMRNG2_MINVAL_MSK
(0xffUL <<
AG903_PGPn_HGMRNG2_MINVAL_POS
) 1774:
#define
AG903_PGPn_HGMRNG2_MAXVAL_POS
8 1775:
#define
AG903_PGPn_HGMRNG2_MAXVAL_MSK
(0xffUL <<
AG903_PGPn_HGMRNG2_MAXVAL_POS
) 1776: 1777:
#define
AG903_PGPn_HGMSTAT_CMD_POS
0 1778:
#define
AG903_PGPn_HGMSTAT_CMD_MSK
(0x7UL <<
AG903_PGPn_HGMSTAT_CMD_POS
) 1779:
#define
AG903_PGPn_HGMSTAT_QUEUE_POS
4 1780:
#define
AG903_PGPn_HGMSTAT_QUEUE_MSK
(0x3UL <<
AG903_PGPn_HGMSTAT_QUEUE_POS
) 1781:
#define
AG903_PGPn_HGMSTAT_ACT_POS
6 1782:
#define
AG903_PGPn_HGMSTAT_ACT_MSK
(0x1UL <<
AG903_PGPn_HGMSTAT_ACT_POS
) 1783:
#define
AG903_PGPn_HGMSTAT_VRMACC_POS
7 1784:
#define
AG903_PGPn_HGMSTAT_VRMACC_MSK
(0x1UL <<
AG903_PGPn_HGMSTAT_VRMACC_POS
) 1785:
#define
AG903_PGPn_HGMSTAT_INIT_POS
8 1786:
#define
AG903_PGPn_HGMSTAT_INIT_MSK
(0x1UL <<
AG903_PGPn_HGMSTAT_INIT_POS
) 1787: 1788:
#define
AG903_PGPn_THRCTRL_C8SEL_POS
0 1789:
#define
AG903_PGPn_THRCTRL_C8SEL_MSK
(0x3UL <<
AG903_PGPn_THRCTRL_C8SEL_POS
) 1790:
#define
AG903_PGPn_THRCTRL_OUTSEL_POS
2 1791:
#define
AG903_PGPn_THRCTRL_OUTSEL_MSK
(0x3UL <<
AG903_PGPn_THRCTRL_OUTSEL_POS
) 1792:
#define
AG903_PGPn_THRCTRL_THR8_POS
4 1793:
#define
AG903_PGPn_THRCTRL_THR8_MSK
(0x1UL <<
AG903_PGPn_THRCTRL_THR8_POS
) 1794:
#define
AG903_PGPn_THRCTRL_HSV2_POS
5 1795:
#define
AG903_PGPn_THRCTRL_HSV2_MSK
(0x1UL <<
AG903_PGPn_THRCTRL_HSV2_POS
) 1796:
#define
AG903_PGPn_THRCTRL_CSC2_POS
6 1797:
#define
AG903_PGPn_THRCTRL_CSC2_MSK
(0x1UL <<
AG903_PGPn_THRCTRL_CSC2_POS
) 1798:
#define
AG903_PGPn_THRCTRL_MSK_POS
7 1799:
#define
AG903_PGPn_THRCTRL_MSK_MSK
(0x1UL <<
AG903_PGPn_THRCTRL_MSK_POS
) 1800:
#define
AG903_PGPn_THRCTRL_SPF1_POS
8 1801:
#define
AG903_PGPn_THRCTRL_SPF1_MSK
(0x1UL <<
AG903_PGPn_THRCTRL_SPF1_POS
) 1802:
#define
AG903_PGPn_THRCTRL_LIMIT_POS
9 1803:
#define
AG903_PGPn_THRCTRL_LIMIT_MSK
(0x1UL <<
AG903_PGPn_THRCTRL_LIMIT_POS
) 1804: 1805:
#define
AG903_PGPn_HSV2CTRL_FMT_POS
0 1806:
#define
AG903_PGPn_HSV2CTRL_FMT_MSK
(0x1UL <<
AG903_PGPn_HSV2CTRL_FMT_POS
) 1807: 1808:
#define
AG903_PGPn_CSC2CTRL_SFT_POS
0 1809:
#define
AG903_PGPn_CSC2CTRL_SFT_MSK
(0xfUL <<
AG903_PGPn_CSC2CTRL_SFT_POS
) 1810:
#define
AG903_PGPn_CSC2CTRL_LIMIT_POS
4 1811:
#define
AG903_PGPn_CSC2CTRL_LIMIT_MSK
(0x1UL <<
AG903_PGPn_CSC2CTRL_LIMIT_POS
) 1812: 1813:
#define
AG903_PGPn_CSC2PRM0_M11_POS
0 1814:
#define
AG903_PGPn_CSC2PRM0_M11_MSK
(0xfffUL <<
AG903_PGPn_CSC2PRM0_M11_POS
) 1815:
#define
AG903_PGPn_CSC2PRM0_M12_POS
16 1816:
#define
AG903_PGPn_CSC2PRM0_M12_MSK
(0xfffUL <<
AG903_PGPn_CSC2PRM0_M12_POS
) 1817: 1818:
#define
AG903_PGPn_CSC2PRM1_M13_POS
0 1819:
#define
AG903_PGPn_CSC2PRM1_M13_MSK
(0xfffUL <<
AG903_PGPn_CSC2PRM1_M13_POS
) 1820: 1821:
#define
AG903_PGPn_CSC2PRM2_M14_POS
0 1822:
#define
AG903_PGPn_CSC2PRM2_M14_MSK
(0xfffffUL <<
AG903_PGPn_CSC2PRM2_M14_POS
) 1823: 1824:
#define
AG903_PGPn_CSC2PRM3_M21_POS
0 1825:
#define
AG903_PGPn_CSC2PRM3_M21_MSK
(0xfffUL <<
AG903_PGPn_CSC2PRM3_M21_POS
) 1826:
#define
AG903_PGPn_CSC2PRM3_M22_POS
16 1827:
#define
AG903_PGPn_CSC2PRM3_M22_MSK
(0xfffUL <<
AG903_PGPn_CSC2PRM3_M22_POS
) 1828: 1829:
#define
AG903_PGPn_CSC2PRM4_M23_POS
0 1830:
#define
AG903_PGPn_CSC2PRM4_M23_MSK
(0xfffUL <<
AG903_PGPn_CSC2PRM4_M23_POS
) 1831: 1832:
#define
AG903_PGPn_CSC2PRM5_M24_POS
0 1833:
#define
AG903_PGPn_CSC2PRM5_M24_MSK
(0xfffffUL <<
AG903_PGPn_CSC2PRM5_M24_POS
) 1834: 1835:
#define
AG903_PGPn_CSC2PRM6_M31_POS
0 1836:
#define
AG903_PGPn_CSC2PRM6_M31_MSK
(0xfffUL <<
AG903_PGPn_CSC2PRM6_M31_POS
) 1837:
#define
AG903_PGPn_CSC2PRM6_M32_POS
16 1838:
#define
AG903_PGPn_CSC2PRM6_M32_MSK
(0xfffUL <<
AG903_PGPn_CSC2PRM6_M32_POS
) 1839: 1840:
#define
AG903_PGPn_CSC2PRM7_M33_POS
0 1841:
#define
AG903_PGPn_CSC2PRM7_M33_MSK
(0xfffUL <<
AG903_PGPn_CSC2PRM7_M33_POS
) 1842: 1843:
#define
AG903_PGPn_CSC2PRM8_M34_POS
0 1844:
#define
AG903_PGPn_CSC2PRM8_M34_MSK
(0xfffffUL <<
AG903_PGPn_CSC2PRM8_M34_POS
) 1845: 1846:
#define
AG903_PGPn_MSK0PRM0_X_POS
0 1847:
#define
AG903_PGPn_MSK0PRM0_X_MSK
(0x1UL <<
AG903_PGPn_MSK0PRM0_X_POS
) 1848:
#define
AG903_PGPn_MSK0PRM0_L_POS
1 1849:
#define
AG903_PGPn_MSK0PRM0_L_MSK
(0x1UL <<
AG903_PGPn_MSK0PRM0_L_POS
) 1850:
#define
AG903_PGPn_MSK0PRM0_H_POS
2 1851:
#define
AG903_PGPn_MSK0PRM0_H_MSK
(0x1UL <<
AG903_PGPn_MSK0PRM0_H_POS
) 1852: 1853:
#define
AG903_PGPn_MSK0PRM1_LMIN_POS
0 1854:
#define
AG903_PGPn_MSK0PRM1_LMIN_MSK
(0xffUL <<
AG903_PGPn_MSK0PRM1_LMIN_POS
) 1855:
#define
AG903_PGPn_MSK0PRM1_LMAX_POS
8 1856:
#define
AG903_PGPn_MSK0PRM1_LMAX_MSK
(0xffUL <<
AG903_PGPn_MSK0PRM1_LMAX_POS
) 1857:
#define
AG903_PGPn_MSK0PRM1_HMIN_POS
16 1858:
#define
AG903_PGPn_MSK0PRM1_HMIN_MSK
(0xffUL <<
AG903_PGPn_MSK0PRM1_HMIN_POS
) 1859:
#define
AG903_PGPn_MSK0PRM1_HMAX_POS
24 1860:
#define
AG903_PGPn_MSK0PRM1_HMAX_MSK
(0xffUL <<
AG903_PGPn_MSK0PRM1_HMAX_POS
) 1861: 1862:
#define
AG903_PGPn_MSK1PRM0_X_POS
0 1863:
#define
AG903_PGPn_MSK1PRM0_X_MSK
(0x1UL <<
AG903_PGPn_MSK1PRM0_X_POS
) 1864:
#define
AG903_PGPn_MSK1PRM0_L_POS
1 1865:
#define
AG903_PGPn_MSK1PRM0_L_MSK
(0x1UL <<
AG903_PGPn_MSK1PRM0_L_POS
) 1866:
#define
AG903_PGPn_MSK1PRM0_H_POS
2 1867:
#define
AG903_PGPn_MSK1PRM0_H_MSK
(0x1UL <<
AG903_PGPn_MSK1PRM0_H_POS
) 1868: 1869:
#define
AG903_PGPn_MSK1PRM1_LMIN_POS
0 1870:
#define
AG903_PGPn_MSK1PRM1_LMIN_MSK
(0xffUL <<
AG903_PGPn_MSK1PRM1_LMIN_POS
) 1871:
#define
AG903_PGPn_MSK1PRM1_LMAX_POS
8 1872:
#define
AG903_PGPn_MSK1PRM1_LMAX_MSK
(0xffUL <<
AG903_PGPn_MSK1PRM1_LMAX_POS
) 1873:
#define
AG903_PGPn_MSK1PRM1_HMIN_POS
16 1874:
#define
AG903_PGPn_MSK1PRM1_HMIN_MSK
(0xffUL <<
AG903_PGPn_MSK1PRM1_HMIN_POS
) 1875:
#define
AG903_PGPn_MSK1PRM1_HMAX_POS
24 1876:
#define
AG903_PGPn_MSK1PRM1_HMAX_MSK
(0xffUL <<
AG903_PGPn_MSK1PRM1_HMAX_POS
) 1877: 1878:
#define
AG903_PGPn_MSK2PRM0_X_POS
0 1879:
#define
AG903_PGPn_MSK2PRM0_X_MSK
(0x1UL <<
AG903_PGPn_MSK2PRM0_X_POS
) 1880:
#define
AG903_PGPn_MSK2PRM0_L_POS
1 1881:
#define
AG903_PGPn_MSK2PRM0_L_MSK
(0x1UL <<
AG903_PGPn_MSK2PRM0_L_POS
) 1882:
#define
AG903_PGPn_MSK2PRM0_H_POS
2 1883:
#define
AG903_PGPn_MSK2PRM0_H_MSK
(0x1UL <<
AG903_PGPn_MSK2PRM0_H_POS
) 1884: 1885:
#define
AG903_PGPn_MSK2PRM1_LMIN_POS
0 1886:
#define
AG903_PGPn_MSK2PRM1_LMIN_MSK
(0xffUL <<
AG903_PGPn_MSK2PRM1_LMIN_POS
) 1887:
#define
AG903_PGPn_MSK2PRM1_LMAX_POS
8 1888:
#define
AG903_PGPn_MSK2PRM1_LMAX_MSK
(0xffUL <<
AG903_PGPn_MSK2PRM1_LMAX_POS
) 1889:
#define
AG903_PGPn_MSK2PRM1_HMIN_POS
16 1890:
#define
AG903_PGPn_MSK2PRM1_HMIN_MSK
(0xffUL <<
AG903_PGPn_MSK2PRM1_HMIN_POS
) 1891:
#define
AG903_PGPn_MSK2PRM1_HMAX_POS
24 1892:
#define
AG903_PGPn_MSK2PRM1_HMAX_MSK
(0xffUL <<
AG903_PGPn_MSK2PRM1_HMAX_POS
) 1893: 1894:
#define
AG903_PGPn_THR8PRM0_MINTHR_POS
0 1895:
#define
AG903_PGPn_THR8PRM0_MINTHR_MSK
(0xffUL <<
AG903_PGPn_THR8PRM0_MINTHR_POS
) 1896:
#define
AG903_PGPn_THR8PRM0_MAXTHR_POS
8 1897:
#define
AG903_PGPn_THR8PRM0_MAXTHR_MSK
(0xffUL <<
AG903_PGPn_THR8PRM0_MAXTHR_POS
) 1898:
#define
AG903_PGPn_THR8PRM0_MAXVAL_POS
16 1899:
#define
AG903_PGPn_THR8PRM0_MAXVAL_MSK
(0xffUL <<
AG903_PGPn_THR8PRM0_MAXVAL_POS
) 1900:
#define
AG903_PGPn_THR8PRM0_TYPE_POS
24 1901:
#define
AG903_PGPn_THR8PRM0_TYPE_MSK
(0xfUL <<
AG903_PGPn_THR8PRM0_TYPE_POS
) 1902: 1903:
#define
AG903_PGPn_THR8PRM1_MINTHR_POS
0 1904:
#define
AG903_PGPn_THR8PRM1_MINTHR_MSK
(0xffUL <<
AG903_PGPn_THR8PRM1_MINTHR_POS
) 1905:
#define
AG903_PGPn_THR8PRM1_MAXTHR_POS
8 1906:
#define
AG903_PGPn_THR8PRM1_MAXTHR_MSK
(0xffUL <<
AG903_PGPn_THR8PRM1_MAXTHR_POS
) 1907:
#define
AG903_PGPn_THR8PRM1_MAXVAL_POS
16 1908:
#define
AG903_PGPn_THR8PRM1_MAXVAL_MSK
(0xffUL <<
AG903_PGPn_THR8PRM1_MAXVAL_POS
) 1909:
#define
AG903_PGPn_THR8PRM1_TYPE_POS
24 1910:
#define
AG903_PGPn_THR8PRM1_TYPE_MSK
(0xfUL <<
AG903_PGPn_THR8PRM1_TYPE_POS
) 1911: 1912:
#define
AG903_PGPn_THR8PRM2_MINTHR_POS
0 1913:
#define
AG903_PGPn_THR8PRM2_MINTHR_MSK
(0xffUL <<
AG903_PGPn_THR8PRM2_MINTHR_POS
) 1914:
#define
AG903_PGPn_THR8PRM2_MAXTHR_POS
8 1915:
#define
AG903_PGPn_THR8PRM2_MAXTHR_MSK
(0xffUL <<
AG903_PGPn_THR8PRM2_MAXTHR_POS
) 1916:
#define
AG903_PGPn_THR8PRM2_MAXVAL_POS
16 1917:
#define
AG903_PGPn_THR8PRM2_MAXVAL_MSK
(0xffUL <<
AG903_PGPn_THR8PRM2_MAXVAL_POS
) 1918:
#define
AG903_PGPn_THR8PRM2_TYPE_POS
24 1919:
#define
AG903_PGPn_THR8PRM2_TYPE_MSK
(0xfUL <<
AG903_PGPn_THR8PRM2_TYPE_POS
) 1920: 1921:
#define
AG903_PGPn_THR1PRM0_X_POS
0 1922:
#define
AG903_PGPn_THR1PRM0_X_MSK
(0x1UL <<
AG903_PGPn_THR1PRM0_X_POS
) 1923:
#define
AG903_PGPn_THR1PRM0_L_POS
1 1924:
#define
AG903_PGPn_THR1PRM0_L_MSK
(0x1UL <<
AG903_PGPn_THR1PRM0_L_POS
) 1925:
#define
AG903_PGPn_THR1PRM0_H_POS
2 1926:
#define
AG903_PGPn_THR1PRM0_H_MSK
(0x1UL <<
AG903_PGPn_THR1PRM0_H_POS
) 1927: 1928:
#define
AG903_PGPn_THR1PRM1_LMIN_POS
0 1929:
#define
AG903_PGPn_THR1PRM1_LMIN_MSK
(0xffUL <<
AG903_PGPn_THR1PRM1_LMIN_POS
) 1930:
#define
AG903_PGPn_THR1PRM1_LMAX_POS
8 1931:
#define
AG903_PGPn_THR1PRM1_LMAX_MSK
(0xffUL <<
AG903_PGPn_THR1PRM1_LMAX_POS
) 1932:
#define
AG903_PGPn_THR1PRM1_HMIN_POS
16 1933:
#define
AG903_PGPn_THR1PRM1_HMIN_MSK
(0xffUL <<
AG903_PGPn_THR1PRM1_HMIN_POS
) 1934:
#define
AG903_PGPn_THR1PRM1_HMAX_POS
24 1935:
#define
AG903_PGPn_THR1PRM1_HMAX_MSK
(0xffUL <<
AG903_PGPn_THR1PRM1_HMAX_POS
) 1936: 1937:
#define
AG903_PGPn_SPF1PRM0_HMM_POS
0 1938:
#define
AG903_PGPn_SPF1PRM0_HMM_MSK
(0x7UL <<
AG903_PGPn_SPF1PRM0_HMM_POS
) 1939:
#define
AG903_PGPn_SPF1PRM0_H0M_POS
4 1940:
#define
AG903_PGPn_SPF1PRM0_H0M_MSK
(0x7UL <<
AG903_PGPn_SPF1PRM0_H0M_POS
) 1941:
#define
AG903_PGPn_SPF1PRM0_H1M_POS
8 1942:
#define
AG903_PGPn_SPF1PRM0_H1M_MSK
(0x7UL <<
AG903_PGPn_SPF1PRM0_H1M_POS
) 1943:
#define
AG903_PGPn_SPF1PRM0_HM0_POS
12 1944:
#define
AG903_PGPn_SPF1PRM0_HM0_MSK
(0x7UL <<
AG903_PGPn_SPF1PRM0_HM0_POS
) 1945:
#define
AG903_PGPn_SPF1PRM0_H00_POS
16 1946:
#define
AG903_PGPn_SPF1PRM0_H00_MSK
(0x7UL <<
AG903_PGPn_SPF1PRM0_H00_POS
) 1947:
#define
AG903_PGPn_SPF1PRM0_H10_POS
20 1948:
#define
AG903_PGPn_SPF1PRM0_H10_MSK
(0x7UL <<
AG903_PGPn_SPF1PRM0_H10_POS
) 1949: 1950:
#define
AG903_PGPn_SPF1PRM1_HM1_POS
0 1951:
#define
AG903_PGPn_SPF1PRM1_HM1_MSK
(0x7UL <<
AG903_PGPn_SPF1PRM1_HM1_POS
) 1952:
#define
AG903_PGPn_SPF1PRM1_H01_POS
4 1953:
#define
AG903_PGPn_SPF1PRM1_H01_MSK
(0x7UL <<
AG903_PGPn_SPF1PRM1_H01_POS
) 1954:
#define
AG903_PGPn_SPF1PRM1_H11_POS
8 1955:
#define
AG903_PGPn_SPF1PRM1_H11_MSK
(0x7UL <<
AG903_PGPn_SPF1PRM1_H11_POS
) 1956:
#define
AG903_PGPn_SPF1PRM1_THR_POS
16 1957:
#define
AG903_PGPn_SPF1PRM1_THR_MSK
(0x3fUL <<
AG903_PGPn_SPF1PRM1_THR_POS
) 1958: 1959:
#define
AG903_PGPn_THR1CNT_CNT_POS
0 1960:
#define
AG903_PGPn_THR1CNT_CNT_MSK
(0xffffffUL <<
AG903_PGPn_THR1CNT_CNT_POS
) 1961: 1962:
#define
AG903_PGPn_LBLCMD_CMD_POS
0 1963:
#define
AG903_PGPn_LBLCMD_CMD_MSK
(0x7UL <<
AG903_PGPn_LBLCMD_CMD_POS
) 1964: 1965:
#define
AG903_PGPn_LBLCTRL_MAXID_POS
0 1966:
#define
AG903_PGPn_LBLCTRL_MAXID_MSK
(0xffUL <<
AG903_PGPn_LBLCTRL_MAXID_POS
) 1967:
#define
AG903_PGPn_LBLCTRL_FLTHR_POS
8 1968:
#define
AG903_PGPn_LBLCTRL_FLTHR_MSK
(0xffUL <<
AG903_PGPn_LBLCTRL_FLTHR_POS
) 1969:
#define
AG903_PGPn_LBLCTRL_BMU_POS
16 1970:
#define
AG903_PGPn_LBLCTRL_BMU_MSK
(0x1UL <<
AG903_PGPn_LBLCTRL_BMU_POS
) 1971:
#define
AG903_PGPn_LBLCTRL_CNCT_POS
17 1972:
#define
AG903_PGPn_LBLCTRL_CNCT_MSK
(0x1UL <<
AG903_PGPn_LBLCTRL_CNCT_POS
) 1973:
#define
AG903_PGPn_LBLCTRL_INV_POS
24 1974:
#define
AG903_PGPn_LBLCTRL_INV_MSK
(0xfUL <<
AG903_PGPn_LBLCTRL_INV_POS
) 1975:
#define
AG903_PGPn_LBLCTRL_VLD_POS
28 1976:
#define
AG903_PGPn_LBLCTRL_VLD_MSK
(0xfUL <<
AG903_PGPn_LBLCTRL_VLD_POS
) 1977: 1978:
#define
AG903_PGPn_LBLSIZE_HSIZE_POS
0 1979:
#define
AG903_PGPn_LBLSIZE_HSIZE_MSK
(0x3ffUL <<
AG903_PGPn_LBLSIZE_HSIZE_POS
) 1980:
#define
AG903_PGPn_LBLSIZE_VSIZE_POS
16 1981:
#define
AG903_PGPn_LBLSIZE_VSIZE_MSK
(0x3ffUL <<
AG903_PGPn_LBLSIZE_VSIZE_POS
) 1982: 1983:
#define
AG903_PGPn_LBLPOS_HPOS_POS
0 1984:
#define
AG903_PGPn_LBLPOS_HPOS_MSK
(0xfffUL <<
AG903_PGPn_LBLPOS_HPOS_POS
) 1985:
#define
AG903_PGPn_LBLPOS_VPOS_POS
16 1986:
#define
AG903_PGPn_LBLPOS_VPOS_MSK
(0xfffUL <<
AG903_PGPn_LBLPOS_VPOS_POS
) 1987: 1988:
#define
AG903_PGPn_LBLDST_ADR_POS
3 1989:
#define
AG903_PGPn_LBLDST_ADR_MSK
(0x1fffffffUL <<
AG903_PGPn_LBLDST_ADR_POS
) 1990: 1991:
#define
AG903_PGPn_LBLSTAT_CMD_POS
0 1992:
#define
AG903_PGPn_LBLSTAT_CMD_MSK
(0x7UL <<
AG903_PGPn_LBLSTAT_CMD_POS
) 1993:
#define
AG903_PGPn_LBLSTAT_QUEUE_POS
4 1994:
#define
AG903_PGPn_LBLSTAT_QUEUE_MSK
(0x3UL <<
AG903_PGPn_LBLSTAT_QUEUE_POS
) 1995:
#define
AG903_PGPn_LBLSTAT_ACT_POS
6 1996:
#define
AG903_PGPn_LBLSTAT_ACT_MSK
(0x1UL <<
AG903_PGPn_LBLSTAT_ACT_POS
) 1997:
#define
AG903_PGPn_LBLSTAT_VRMACC_POS
7 1998:
#define
AG903_PGPn_LBLSTAT_VRMACC_MSK
(0x1UL <<
AG903_PGPn_LBLSTAT_VRMACC_POS
) 1999:
#define
AG903_PGPn_LBLSTAT_ID_POS
8 2000:
#define
AG903_PGPn_LBLSTAT_ID_MSK
(0xffUL <<
AG903_PGPn_LBLSTAT_ID_POS
) 2001: 2002:
#define
AG903_PGPn_IFCCMD_CMD_POS
0 2003:
#define
AG903_PGPn_IFCCMD_CMD_MSK
(0x7UL <<
AG903_PGPn_IFCCMD_CMD_POS
) 2004: 2005:
#define
AG903_PGPn_IFCCTRL_SFT0_POS
0 2006:
#define
AG903_PGPn_IFCCTRL_SFT0_MSK
(0x7UL <<
AG903_PGPn_IFCCTRL_SFT0_POS
) 2007:
#define
AG903_PGPn_IFCCTRL_SFT1_POS
4 2008:
#define
AG903_PGPn_IFCCTRL_SFT1_MSK
(0x7UL <<
AG903_PGPn_IFCCTRL_SFT1_POS
) 2009:
#define
AG903_PGPn_IFCCTRL_OP_POS
8 2010:
#define
AG903_PGPn_IFCCTRL_OP_MSK
(0x7UL <<
AG903_PGPn_IFCCTRL_OP_POS
) 2011:
#define
AG903_PGPn_IFCCTRL_SRC_POS
16 2012:
#define
AG903_PGPn_IFCCTRL_SRC_MSK
(0x3UL <<
AG903_PGPn_IFCCTRL_SRC_POS
) 2013:
#define
AG903_PGPn_IFCCTRL_LIMIT_POS
18 2014:
#define
AG903_PGPn_IFCCTRL_LIMIT_MSK
(0x3UL <<
AG903_PGPn_IFCCTRL_LIMIT_POS
) 2015:
#define
AG903_PGPn_IFCCTRL_SCAN_POS
20 2016:
#define
AG903_PGPn_IFCCTRL_SCAN_MSK
(0x1UL <<
AG903_PGPn_IFCCTRL_SCAN_POS
) 2017: 2018:
#define
AG903_PGPn_IFCPRM_GAIN0_POS
0 2019:
#define
AG903_PGPn_IFCPRM_GAIN0_MSK
(0xffUL <<
AG903_PGPn_IFCPRM_GAIN0_POS
) 2020:
#define
AG903_PGPn_IFCPRM_GAIN1_POS
8 2021:
#define
AG903_PGPn_IFCPRM_GAIN1_MSK
(0xffUL <<
AG903_PGPn_IFCPRM_GAIN1_POS
) 2022: 2023:
#define
AG903_PGPVIn_CMD_CMD_POS
0 2024:
#define
AG903_PGPVIn_CMD_CMD_MSK
(0xfUL <<
AG903_PGPVIn_CMD_CMD_POS
) 2025: 2026:
#define
AG903_PGPVIn_STATE_ST_POS
0 2027:
#define
AG903_PGPVIn_STATE_ST_MSK
(0xfUL <<
AG903_PGPVIn_STATE_ST_POS
) 2028:
#define
AG903_PGPVIn_STATE_QUEUE_POS
8 2029:
#define
AG903_PGPVIn_STATE_QUEUE_MSK
(0x3UL <<
AG903_PGPVIn_STATE_QUEUE_POS
) 2030:
#define
AG903_PGPVIn_STATE_VRMACC_POS
12 2031:
#define
AG903_PGPVIn_STATE_VRMACC_MSK
(0x1UL <<
AG903_PGPVIn_STATE_VRMACC_POS
) 2032: 2033:
#define
AG903_PGPVIn_CTRL0_FMT_POS
0 2034:
#define
AG903_PGPVIn_CTRL0_FMT_MSK
(0xfUL <<
AG903_PGPVIn_CTRL0_FMT_POS
) 2035:
#define
AG903_PGPVIn_CTRL0_MD_POS
4 2036:
#define
AG903_PGPVIn_CTRL0_MD_MSK
(0x7UL <<
AG903_PGPVIn_CTRL0_MD_POS
) 2037:
#define
AG903_PGPVIn_CTRL0_SWAP1_POS
8 2038:
#define
AG903_PGPVIn_CTRL0_SWAP1_MSK
(0x1UL <<
AG903_PGPVIn_CTRL0_SWAP1_POS
) 2039:
#define
AG903_PGPVIn_CTRL0_SWAP4_POS
9 2040:
#define
AG903_PGPVIn_CTRL0_SWAP4_MSK
(0x1UL <<
AG903_PGPVIn_CTRL0_SWAP4_POS
) 2041:
#define
AG903_PGPVIn_CTRL0_SWAPH_POS
10 2042:
#define
AG903_PGPVIn_CTRL0_SWAPH_MSK
(0x1UL <<
AG903_PGPVIn_CTRL0_SWAPH_POS
) 2043:
#define
AG903_PGPVIn_CTRL0_SWAPW_POS
11 2044:
#define
AG903_PGPVIn_CTRL0_SWAPW_MSK
(0x1UL <<
AG903_PGPVIn_CTRL0_SWAPW_POS
) 2045:
#define
AG903_PGPVIn_CTRL0_DIM_POS
12 2046:
#define
AG903_PGPVIn_CTRL0_DIM_MSK
(0x1UL <<
AG903_PGPVIn_CTRL0_DIM_POS
) 2047:
#define
AG903_PGPVIn_CTRL0_SCAN_POS
13 2048:
#define
AG903_PGPVIn_CTRL0_SCAN_MSK
(0x1UL <<
AG903_PGPVIn_CTRL0_SCAN_POS
) 2049:
#define
AG903_PGPVIn_CTRL0_BMU_POS
14 2050:
#define
AG903_PGPVIn_CTRL0_BMU_MSK
(0x3UL <<
AG903_PGPVIn_CTRL0_BMU_POS
) 2051:
#define
AG903_PGPVIn_CTRL0_FAI_POS
17 2052:
#define
AG903_PGPVIn_CTRL0_FAI_MSK
(0x1UL <<
AG903_PGPVIn_CTRL0_FAI_POS
) 2053: 2054:
#define
AG903_PGPVIn_CTRL1_INV_POS
0 2055:
#define
AG903_PGPVIn_CTRL1_INV_MSK
(0xfUL <<
AG903_PGPVIn_CTRL1_INV_POS
) 2056:
#define
AG903_PGPVIn_CTRL1_VLD_POS
4 2057:
#define
AG903_PGPVIn_CTRL1_VLD_MSK
(0xfUL <<
AG903_PGPVIn_CTRL1_VLD_POS
) 2058:
#define
AG903_PGPVIn_CTRL1_DIV_POS
8 2059:
#define
AG903_PGPVIn_CTRL1_DIV_MSK
(0xffUL <<
AG903_PGPVIn_CTRL1_DIV_POS
) 2060: 2061:
#define
AG903_PGPVIn_BASE_ADR_POS
3 2062:
#define
AG903_PGPVIn_BASE_ADR_MSK
(0x1fffffffUL <<
AG903_PGPVIn_BASE_ADR_POS
) 2063: 2064:
#define
AG903_PGPVIn_HSIZE_HSIZE_POS
0 2065:
#define
AG903_PGPVIn_HSIZE_HSIZE_MSK
(0x3fffUL <<
AG903_PGPVIn_HSIZE_HSIZE_POS
) 2066: 2067:
#define
AG903_PGPVIn_HPRM0_HPW_POS
0 2068:
#define
AG903_PGPVIn_HPRM0_HPW_MSK
(0xfffUL <<
AG903_PGPVIn_HPRM0_HPW_POS
) 2069: 2070:
#define
AG903_PGPVIn_HPRM1_HBP_POS
0 2071:
#define
AG903_PGPVIn_HPRM1_HBP_MSK
(0xfffUL <<
AG903_PGPVIn_HPRM1_HBP_POS
) 2072:
#define
AG903_PGPVIn_HPRM1_HFP_POS
16 2073:
#define
AG903_PGPVIn_HPRM1_HFP_MSK
(0xfffUL <<
AG903_PGPVIn_HPRM1_HFP_POS
) 2074: 2075:
#define
AG903_PGPVIn_VPRM0_VPW_POS
0 2076:
#define
AG903_PGPVIn_VPRM0_VPW_MSK
(0xfffUL <<
AG903_PGPVIn_VPRM0_VPW_POS
) 2077:
#define
AG903_PGPVIn_VPRM0_OFP_POS
16 2078:
#define
AG903_PGPVIn_VPRM0_OFP_MSK
(0x1UL <<
AG903_PGPVIn_VPRM0_OFP_POS
) 2079:
#define
AG903_PGPVIn_VPRM0_OBP_POS
17 2080:
#define
AG903_PGPVIn_VPRM0_OBP_MSK
(0x1UL <<
AG903_PGPVIn_VPRM0_OBP_POS
) 2081:
#define
AG903_PGPVIn_VPRM0_EFP_POS
18 2082:
#define
AG903_PGPVIn_VPRM0_EFP_MSK
(0x1UL <<
AG903_PGPVIn_VPRM0_EFP_POS
) 2083:
#define
AG903_PGPVIn_VPRM0_EBP_POS
19 2084:
#define
AG903_PGPVIn_VPRM0_EBP_MSK
(0x1UL <<
AG903_PGPVIn_VPRM0_EBP_POS
) 2085: 2086:
#define
AG903_PGPVIn_VPRM1_VBP_POS
0 2087:
#define
AG903_PGPVIn_VPRM1_VBP_MSK
(0xfffUL <<
AG903_PGPVIn_VPRM1_VBP_POS
) 2088:
#define
AG903_PGPVIn_VPRM1_VFP_POS
16 2089:
#define
AG903_PGPVIn_VPRM1_VFP_MSK
(0xfffUL <<
AG903_PGPVIn_VPRM1_VFP_POS
) 2090: 2091:
#define
AG903_PGPVIn_SIZE_HSIZE_POS
0 2092:
#define
AG903_PGPVIn_SIZE_HSIZE_MSK
(0xfffUL <<
AG903_PGPVIn_SIZE_HSIZE_POS
) 2093:
#define
AG903_PGPVIn_SIZE_VSIZE_POS
16 2094:
#define
AG903_PGPVIn_SIZE_VSIZE_MSK
(0xfffUL <<
AG903_PGPVIn_SIZE_VSIZE_POS
) 2095:
#define
AG903_PGPVIn_SIZE_OVSIZE_POS
28 2096:
#define
AG903_PGPVIn_SIZE_OVSIZE_MSK
(0x1UL <<
AG903_PGPVIn_SIZE_OVSIZE_POS
) 2097: 2098:
#define
AG903_PGP_JPGOUTSEL_SEL_POS
0 2099:
#define
AG903_PGP_JPGOUTSEL_SEL_MSK
(0x7UL <<
AG903_PGP_JPGOUTSEL_SEL_POS
) 2100:
#define
AG903_PGP_JPGOUTSEL_EN_POS
3 2101:
#define
AG903_PGP_JPGOUTSEL_EN_MSK
(0x1UL <<
AG903_PGP_JPGOUTSEL_EN_POS
) 2102: 2103: 2104:
#define
AG903_PGP0DGC_LUTB_B0_POS
0 2105:
#define
AG903_PGP0DGC_LUTB_B0_MSK
(0xffUL <<
AG903_PGP0DGC_LUTB_B0_POS
) 2106:
#define
AG903_PGP0DGC_LUTB_B1_POS
8 2107:
#define
AG903_PGP0DGC_LUTB_B1_MSK
(0xffUL <<
AG903_PGP0DGC_LUTB_B1_POS
) 2108:
#define
AG903_PGP0DGC_LUTB_B2_POS
16 2109:
#define
AG903_PGP0DGC_LUTB_B2_MSK
(0xffUL <<
AG903_PGP0DGC_LUTB_B2_POS
) 2110:
#define
AG903_PGP0DGC_LUTB_B3_POS
24 2111:
#define
AG903_PGP0DGC_LUTB_B3_MSK
(0xffUL <<
AG903_PGP0DGC_LUTB_B3_POS
) 2112: 2113:
#define
AG903_PGP0DGC_LUTG_G0_POS
0 2114:
#define
AG903_PGP0DGC_LUTG_G0_MSK
(0xffUL <<
AG903_PGP0DGC_LUTG_G0_POS
) 2115:
#define
AG903_PGP0DGC_LUTG_G1_POS
8 2116:
#define
AG903_PGP0DGC_LUTG_G1_MSK
(0xffUL <<
AG903_PGP0DGC_LUTG_G1_POS
) 2117:
#define
AG903_PGP0DGC_LUTG_G2_POS
16 2118:
#define
AG903_PGP0DGC_LUTG_G2_MSK
(0xffUL <<
AG903_PGP0DGC_LUTG_G2_POS
) 2119:
#define
AG903_PGP0DGC_LUTG_G3_POS
24 2120:
#define
AG903_PGP0DGC_LUTG_G3_MSK
(0xffUL <<
AG903_PGP0DGC_LUTG_G3_POS
) 2121: 2122:
#define
AG903_PGP0DGC_LUTR_R0_POS
0 2123:
#define
AG903_PGP0DGC_LUTR_R0_MSK
(0xffUL <<
AG903_PGP0DGC_LUTR_R0_POS
) 2124:
#define
AG903_PGP0DGC_LUTR_R1_POS
8 2125:
#define
AG903_PGP0DGC_LUTR_R1_MSK
(0xffUL <<
AG903_PGP0DGC_LUTR_R1_POS
) 2126:
#define
AG903_PGP0DGC_LUTR_R2_POS
16 2127:
#define
AG903_PGP0DGC_LUTR_R2_MSK
(0xffUL <<
AG903_PGP0DGC_LUTR_R2_POS
) 2128:
#define
AG903_PGP0DGC_LUTR_R3_POS
24 2129:
#define
AG903_PGP0DGC_LUTR_R3_MSK
(0xffUL <<
AG903_PGP0DGC_LUTR_R3_POS
) 2130: 2131:
#define
AG903_PGP0DGCF_LUTB_B0_POS
0 2132:
#define
AG903_PGP0DGCF_LUTB_B0_MSK
(0xffUL <<
AG903_PGP0DGCF_LUTB_B0_POS
) 2133:
#define
AG903_PGP0DGCF_LUTB_B1_POS
8 2134:
#define
AG903_PGP0DGCF_LUTB_B1_MSK
(0xffUL <<
AG903_PGP0DGCF_LUTB_B1_POS
) 2135:
#define
AG903_PGP0DGCF_LUTB_B2_POS
16 2136:
#define
AG903_PGP0DGCF_LUTB_B2_MSK
(0xffUL <<
AG903_PGP0DGCF_LUTB_B2_POS
) 2137:
#define
AG903_PGP0DGCF_LUTB_B3_POS
24 2138:
#define
AG903_PGP0DGCF_LUTB_B3_MSK
(0xffUL <<
AG903_PGP0DGCF_LUTB_B3_POS
) 2139: 2140:
#define
AG903_PGP0DGCF_LUTG_G0_POS
0 2141:
#define
AG903_PGP0DGCF_LUTG_G0_MSK
(0xffUL <<
AG903_PGP0DGCF_LUTG_G0_POS
) 2142:
#define
AG903_PGP0DGCF_LUTG_G1_POS
8 2143:
#define
AG903_PGP0DGCF_LUTG_G1_MSK
(0xffUL <<
AG903_PGP0DGCF_LUTG_G1_POS
) 2144:
#define
AG903_PGP0DGCF_LUTG_G2_POS
16 2145:
#define
AG903_PGP0DGCF_LUTG_G2_MSK
(0xffUL <<
AG903_PGP0DGCF_LUTG_G2_POS
) 2146:
#define
AG903_PGP0DGCF_LUTG_G3_POS
24 2147:
#define
AG903_PGP0DGCF_LUTG_G3_MSK
(0xffUL <<
AG903_PGP0DGCF_LUTG_G3_POS
) 2148: 2149:
#define
AG903_PGP0DGCF_LUTR_R0_POS
0 2150:
#define
AG903_PGP0DGCF_LUTR_R0_MSK
(0xffUL <<
AG903_PGP0DGCF_LUTR_R0_POS
) 2151:
#define
AG903_PGP0DGCF_LUTR_R1_POS
8 2152:
#define
AG903_PGP0DGCF_LUTR_R1_MSK
(0xffUL <<
AG903_PGP0DGCF_LUTR_R1_POS
) 2153:
#define
AG903_PGP0DGCF_LUTR_R2_POS
16 2154:
#define
AG903_PGP0DGCF_LUTR_R2_MSK
(0xffUL <<
AG903_PGP0DGCF_LUTR_R2_POS
) 2155:
#define
AG903_PGP0DGCF_LUTR_R3_POS
24 2156:
#define
AG903_PGP0DGCF_LUTR_R3_MSK
(0xffUL <<
AG903_PGP0DGCF_LUTR_R3_POS
) 2157: 2158:
#define
AG903_PGP1DGC_LUTB_B0_POS
0 2159:
#define
AG903_PGP1DGC_LUTB_B0_MSK
(0xffUL <<
AG903_PGP1DGC_LUTB_B0_POS
) 2160:
#define
AG903_PGP1DGC_LUTB_B1_POS
8 2161:
#define
AG903_PGP1DGC_LUTB_B1_MSK
(0xffUL <<
AG903_PGP1DGC_LUTB_B1_POS
) 2162:
#define
AG903_PGP1DGC_LUTB_B2_POS
16 2163:
#define
AG903_PGP1DGC_LUTB_B2_MSK
(0xffUL <<
AG903_PGP1DGC_LUTB_B2_POS
) 2164:
#define
AG903_PGP1DGC_LUTB_B3_POS
24 2165:
#define
AG903_PGP1DGC_LUTB_B3_MSK
(0xffUL <<
AG903_PGP1DGC_LUTB_B3_POS
) 2166: 2167:
#define
AG903_PGP1DGC_LUTG_G0_POS
0 2168:
#define
AG903_PGP1DGC_LUTG_G0_MSK
(0xffUL <<
AG903_PGP1DGC_LUTG_G0_POS
) 2169:
#define
AG903_PGP1DGC_LUTG_G1_POS
8 2170:
#define
AG903_PGP1DGC_LUTG_G1_MSK
(0xffUL <<
AG903_PGP1DGC_LUTG_G1_POS
) 2171:
#define
AG903_PGP1DGC_LUTG_G2_POS
16 2172:
#define
AG903_PGP1DGC_LUTG_G2_MSK
(0xffUL <<
AG903_PGP1DGC_LUTG_G2_POS
) 2173:
#define
AG903_PGP1DGC_LUTG_G3_POS
24 2174:
#define
AG903_PGP1DGC_LUTG_G3_MSK
(0xffUL <<
AG903_PGP1DGC_LUTG_G3_POS
) 2175: 2176:
#define
AG903_PGP1DGC_LUTR_R0_POS
0 2177:
#define
AG903_PGP1DGC_LUTR_R0_MSK
(0xffUL <<
AG903_PGP1DGC_LUTR_R0_POS
) 2178:
#define
AG903_PGP1DGC_LUTR_R1_POS
8 2179:
#define
AG903_PGP1DGC_LUTR_R1_MSK
(0xffUL <<
AG903_PGP1DGC_LUTR_R1_POS
) 2180:
#define
AG903_PGP1DGC_LUTR_R2_POS
16 2181:
#define
AG903_PGP1DGC_LUTR_R2_MSK
(0xffUL <<
AG903_PGP1DGC_LUTR_R2_POS
) 2182:
#define
AG903_PGP1DGC_LUTR_R3_POS
24 2183:
#define
AG903_PGP1DGC_LUTR_R3_MSK
(0xffUL <<
AG903_PGP1DGC_LUTR_R3_POS
) 2184: 2185:
#define
AG903_PGP1DGCF_LUTB_B0_POS
0 2186:
#define
AG903_PGP1DGCF_LUTB_B0_MSK
(0xffUL <<
AG903_PGP1DGCF_LUTB_B0_POS
) 2187:
#define
AG903_PGP1DGCF_LUTB_B1_POS
8 2188:
#define
AG903_PGP1DGCF_LUTB_B1_MSK
(0xffUL <<
AG903_PGP1DGCF_LUTB_B1_POS
) 2189:
#define
AG903_PGP1DGCF_LUTB_B2_POS
16 2190:
#define
AG903_PGP1DGCF_LUTB_B2_MSK
(0xffUL <<
AG903_PGP1DGCF_LUTB_B2_POS
) 2191:
#define
AG903_PGP1DGCF_LUTB_B3_POS
24 2192:
#define
AG903_PGP1DGCF_LUTB_B3_MSK
(0xffUL <<
AG903_PGP1DGCF_LUTB_B3_POS
) 2193: 2194:
#define
AG903_PGP1DGCF_LUTG_G0_POS
0 2195:
#define
AG903_PGP1DGCF_LUTG_G0_MSK
(0xffUL <<
AG903_PGP1DGCF_LUTG_G0_POS
) 2196:
#define
AG903_PGP1DGCF_LUTG_G1_POS
8 2197:
#define
AG903_PGP1DGCF_LUTG_G1_MSK
(0xffUL <<
AG903_PGP1DGCF_LUTG_G1_POS
) 2198:
#define
AG903_PGP1DGCF_LUTG_G2_POS
16 2199:
#define
AG903_PGP1DGCF_LUTG_G2_MSK
(0xffUL <<
AG903_PGP1DGCF_LUTG_G2_POS
) 2200:
#define
AG903_PGP1DGCF_LUTG_G3_POS
24 2201:
#define
AG903_PGP1DGCF_LUTG_G3_MSK
(0xffUL <<
AG903_PGP1DGCF_LUTG_G3_POS
) 2202: 2203:
#define
AG903_PGP1DGCF_LUTR_R0_POS
0 2204:
#define
AG903_PGP1DGCF_LUTR_R0_MSK
(0xffUL <<
AG903_PGP1DGCF_LUTR_R0_POS
) 2205:
#define
AG903_PGP1DGCF_LUTR_R1_POS
8 2206:
#define
AG903_PGP1DGCF_LUTR_R1_MSK
(0xffUL <<
AG903_PGP1DGCF_LUTR_R1_POS
) 2207:
#define
AG903_PGP1DGCF_LUTR_R2_POS
16 2208:
#define
AG903_PGP1DGCF_LUTR_R2_MSK
(0xffUL <<
AG903_PGP1DGCF_LUTR_R2_POS
) 2209:
#define
AG903_PGP1DGCF_LUTR_R3_POS
24 2210:
#define
AG903_PGP1DGCF_LUTR_R3_MSK
(0xffUL <<
AG903_PGP1DGCF_LUTR_R3_POS
) 2211: 2212:
#endif
2213:
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