1:
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#include "AG903_common.h"
18:
#include "dmac/dmacprm.h"
19:
#include "register/AG903_dmacreg.h"
20:
21:
22:
#define DMAC_UNIT_MAX (
AG903_DMAC_UNIT_NUM)
23:
24:
25:
#define DMAC_IF_MAX (
AG903_DMAC_PORT_NUM)
26:
27:
28:
#define DMAC_EVENT_MAX (
AG903_DMAC_EVENT_NUM)
29:
30:
31:
38:
void AG903_DMACPrmGetINT(uint32_t *stat)
39: {
40:
ASSERT(stat != NULL);
41:
42: *stat = (
AG903_DMAC->
INT &
AG903_DMAC_INT_Intr_MSK)
43: >>
AG903_DMAC_INT_Intr_POS;
44: }
45:
46:
53:
void AG903_DMACPrmGetTIMECOUNT_INT(uint32_t *stat)
54: {
55:
ASSERT(stat != NULL);
56:
57: *stat = (
AG903_DMAC->TIMECOUNT_INT &
AG903_DMAC_TIMECOUNT_INT_TCIntr_MSK)
58: >>
AG903_DMAC_TIMECOUNT_INT_TCIntr_POS;
59: }
60:
61:
68:
void AG903_DMACPrmSetTIMECOUNT_INT_CLEAR(uint32_t clear)
69: {
70:
AG903_DMAC->TIMECOUNT_INT_CLEAR =
71: (clear <<
AG903_DMAC_TIMECOUNT_INT_CLEAR_TCIntrClr_POS) &
AG903_DMAC_TIMECOUNT_INT_CLEAR_TCIntrClr_MSK;
72: }
73:
74:
83:
void AG903_DMACPrmGetERR_ABORT_INT(uint32_t *err, uint32_t *wdt, uint32_t *abt)
84: {
85:
ASSERT(err != NULL);
86:
ASSERT(wdt != NULL);
87:
ASSERT(abt != NULL);
88:
89: uint32_t reg =
AG903_DMAC->ERR_ABORT_INT;
90: *err = (reg &
AG903_DMAC_ERR_ABORT_INT_ErrIntr_MSK) >>
AG903_DMAC_ERR_ABORT_INT_ErrIntr_POS;
91: *wdt = (reg &
AG903_DMAC_ERR_ABORT_INT_WdtIntr_MSK) >>
AG903_DMAC_ERR_ABORT_INT_WdtIntr_POS;
92: *abt = (reg &
AG903_DMAC_ERR_ABORT_INT_AbtIntr_MSK) >>
AG903_DMAC_ERR_ABORT_INT_AbtIntr_POS;
93: }
94:
95:
104:
void AG903_DMACPrmSetERR_ABORT_INT_CLEAR(uint32_t err, uint32_t wdt, uint32_t abt)
105: {
106: uint32_t reg = 0;
107: reg |= (err <<
AG903_DMAC_ERR_ABORT_INT_CLEAR_ErrIntrClr_POS) &
AG903_DMAC_ERR_ABORT_INT_CLEAR_ErrIntrClr_MSK;
108: reg |= (wdt <<
AG903_DMAC_ERR_ABORT_INT_CLEAR_WdtIntrClr_POS) &
AG903_DMAC_ERR_ABORT_INT_CLEAR_WdtIntrClr_MSK;
109: reg |= (abt <<
AG903_DMAC_ERR_ABORT_INT_CLEAR_AbtIntrClr_POS) &
AG903_DMAC_ERR_ABORT_INT_CLEAR_AbtIntrClr_MSK;
110:
AG903_DMAC->ERR_ABORT_INT_CLEAR = reg;
111: }
112:
113:
120:
void AG903_DMACPrmGetTIMECOUNT_STATUS(uint32_t *stat)
121: {
122:
ASSERT(stat != NULL);
123:
124: *stat = (
AG903_DMAC->TIMECOUNT_STATUS &
AG903_DMAC_TIMECOUNT_STATUS_TCStatus_MSK)
125: >>
AG903_DMAC_TIMECOUNT_STATUS_TCStatus_POS;
126: }
127:
128:
137:
void AG903_DMACPrmGetERR_ABORT_STATUS(uint32_t *err, uint32_t *wdt, uint32_t *abt)
138: {
139:
ASSERT(err != NULL);
140:
ASSERT(wdt != NULL);
141:
ASSERT(abt != NULL);
142:
143: uint32_t reg =
AG903_DMAC->ERR_ABORT_STATUS;
144: *err = (reg &
AG903_DMAC_ERR_ABORT_STATUS_ErrStatus_MSK) >>
AG903_DMAC_ERR_ABORT_STATUS_ErrStatus_POS;
145: *wdt = (reg &
AG903_DMAC_ERR_ABORT_STATUS_WdtStatus_MSK) >>
AG903_DMAC_ERR_ABORT_STATUS_WdtStatus_POS;
146: *abt = (reg &
AG903_DMAC_ERR_ABORT_STATUS_AbtStatus_MSK) >>
AG903_DMAC_ERR_ABORT_STATUS_AbtStatus_POS;
147: }
148:
149:
156:
void AG903_DMACPrmGetCHANNEL_ENABLE(uint32_t *enable)
157: {
158:
ASSERT(enable != NULL);
159:
160: *enable = (
AG903_DMAC->CHANNEL_ENABLE &
AG903_DMAC_CHANNEL_ENABLE_ChEnable_MSK)
161: >>
AG903_DMAC_CHANNEL_ENABLE_ChEnable_POS;
162: }
163:
164:
171:
void AG903_DMACPrmSetCHANNEL_ENABLE(uint32_t enable)
172: {
173:
AG903_DMAC->CHANNEL_ENABLE =
174: (enable <<
AG903_DMAC_CHANNEL_ENABLE_ChEnable_POS) &
AG903_DMAC_CHANNEL_ENABLE_ChEnable_MSK;
175: }
176:
177:
184:
void AG903_DMACPrmGetSYNC_PERI_IF(uint32_t *enable)
185: {
186:
ASSERT(enable != NULL);
187:
188: *enable = (
AG903_DMAC->SYNC_PERI_IF &
AG903_DMAC_SYNC_PERI_IF_SyncDmaReq_MSK)
189: >>
AG903_DMAC_SYNC_PERI_IF_SyncDmaReq_POS;
190: }
191:
192:
199:
void AG903_DMACPrmSetSYNC_PERI_IF(uint32_t enable)
200: {
201:
AG903_DMAC->SYNC_PERI_IF =
202: (enable <<
AG903_DMAC_SYNC_PERI_IF_SyncDmaReq_POS) &
AG903_DMAC_SYNC_PERI_IF_SyncDmaReq_MSK;
203: }
204:
205:
212:
void AG903_DMACPrmGetLOCAL_DESC_MEM_BASE(uint32_t *base)
213: {
214:
ASSERT(base != NULL);
215:
216: *base =
AG903_DMAC->LOCAL_DESC_MEM_BASE;;
217: }
218:
219:
226:
void AG903_DMACPrmSetLOCAL_DESC_MEM_BASE(uint32_t base)
227: {
228:
AG903_DMAC->LOCAL_DESC_MEM_BASE = base &
AG903_DMAC_LOCAL_DESC_MEM_BASE_LDMBase_MSK;
229: }
230:
231:
238:
void AG903_DMACPrmGetWATCHDOG_TIMER(uint32_t *wdt)
239: {
240:
ASSERT(wdt != NULL);
241:
242: *wdt = (
AG903_DMAC->WATCHDOG_TIMER &
AG903_DMAC_WATCHDOG_TIMER_WDTimer_MSK)
243: >>
AG903_DMAC_WATCHDOG_TIMER_WDTimer_POS;
244: }
245:
246:
253:
void AG903_DMACPrmSetWATCHDOG_TIMER(uint32_t wdt)
254: {
255:
AG903_DMAC->WATCHDOG_TIMER =
256: (wdt <<
AG903_DMAC_WATCHDOG_TIMER_WDTimer_POS) &
AG903_DMAC_WATCHDOG_TIMER_WDTimer_MSK;
257: }
258:
259:
266:
void AG903_DMACPrmGetGLOBAL_EVENT(uint32_t *event)
267: {
268:
ASSERT(event != NULL);
269:
270: *event = (
AG903_DMAC->GLOBAL_EVENT &
AG903_DMAC_GLOBAL_EVENT_GlbEvent_MSK)
271: >>
AG903_DMAC_GLOBAL_EVENT_GlbEvent_POS;
272: }
273:
274:
282:
void AG903_DMACPrmSetGLOBAL_EVENT(uint32_t set, uint32_t clear)
283: {
284: uint32_t reg = 0;
285: reg |= (set <<
AG903_DMAC_GLOBAL_EVENT_GlbEventSet_POS) &
AG903_DMAC_GLOBAL_EVENT_GlbEventSet_MSK;
286: reg |= (clear <<
AG903_DMAC_GLOBAL_EVENT_GlbEventClr_POS) &
AG903_DMAC_GLOBAL_EVENT_GlbEventClr_MSK;
287:
AG903_DMAC->GLOBAL_EVENT = reg;
288: }
289:
290:
297:
void AG903_DMACPrmGetPSLVERR_ENABLE(uint32_t *enable)
298: {
299:
ASSERT(enable != NULL);
300:
301: *enable = (
AG903_DMAC->PSLVERR_ENABLE &
AG903_DMAC_PSLVERR_ENABLE_PSlvErrEn_MSK)
302: >>
AG903_DMAC_PSLVERR_ENABLE_PSlvErrEn_POS;
303: }
304:
305:
312:
void AG903_DMACPrmSetPSLVERR_ENABLE(uint32_t enable)
313: {
314:
AG903_DMAC->PSLVERR_ENABLE =
315: (enable <<
AG903_DMAC_PSLVERR_ENABLE_PSlvErrEn_POS) &
AG903_DMAC_PSLVERR_ENABLE_PSlvErrEn_MSK;
316: }
317:
318:
325:
void AG903_DMACPrmGetREVISION_NUMBER(uint32_t *rev)
326: {
327:
ASSERT(rev != NULL);
328:
329: *rev =
AG903_DMAC->REVISION_NUMBER;
330: }
331:
332:
339:
void AG903_DMACPrmGetHW_FEATURE(
DMACPrmParamFEATURE *feature)
340: {
341:
ASSERT(feature != NULL);
342:
343: uint32_t reg =
AG903_DMAC->HW_FEATURE;
344: feature->ChNum = (reg &
AG903_DMAC_HW_FEATURE_ChNum_MSK ) >>
AG903_DMAC_HW_FEATURE_ChNum_POS;
345: feature->UnalignMode = (reg &
AG903_DMAC_HW_FEATURE_UnalignMode_MSK) >>
AG903_DMAC_HW_FEATURE_UnalignMode_POS;
346: feature->DWidth = (reg &
AG903_DMAC_HW_FEATURE_DWidth_MSK ) >>
AG903_DMAC_HW_FEATURE_DWidth_POS;
347: feature->SLVDWidth = (reg &
AG903_DMAC_HW_FEATURE_SLVDWidth_MSK ) >>
AG903_DMAC_HW_FEATURE_SLVDWidth_POS;
348: feature->DFDepth = (reg &
AG903_DMAC_HW_FEATURE_DFDepth_MSK ) >>
AG903_DMAC_HW_FEATURE_DFDepth_POS;
349: feature->PriOn = (reg &
AG903_DMAC_HW_FEATURE_PriOn_MSK ) >>
AG903_DMAC_HW_FEATURE_PriOn_POS;
350: feature->PriNum = (reg &
AG903_DMAC_HW_FEATURE_PriNum_MSK ) >>
AG903_DMAC_HW_FEATURE_PriNum_POS;
351: feature->LdmOn = (reg &
AG903_DMAC_HW_FEATURE_LdmOn_MSK ) >>
AG903_DMAC_HW_FEATURE_LdmOn_POS;
352: feature->LdmDepth = (reg &
AG903_DMAC_HW_FEATURE_LdmDepth_MSK ) >>
AG903_DMAC_HW_FEATURE_LdmDepth_POS;
353: feature->CmdDepth = (reg &
AG903_DMAC_HW_FEATURE_CmdDepth_MSK ) >>
AG903_DMAC_HW_FEATURE_CmdDepth_POS;
354: }
355:
356:
363:
void AG903_DMACPrmGetLOCAL_DESC_MEM_FREE_FLAG_SET_0(uint32_t *flag)
364: {
365:
ASSERT(flag != NULL);
366:
367: *flag =
AG903_DMAC->LOCAL_DESC_MEM_FREE_FLAG_SET_0;
368: }
369:
370:
377:
void AG903_DMACPrmSetLOCAL_DESC_MEM_FREE_FLAG_SET_0(uint32_t flag)
378: {
379:
AG903_DMAC->LOCAL_DESC_MEM_FREE_FLAG_SET_0 = flag;
380: }
381:
382:
389:
void AG903_DMACPrmGetLOCAL_DESC_MEM_FREE_FLAG_SET_1(uint32_t *flag)
390: {
391:
ASSERT(flag != NULL);
392:
393: *flag =
AG903_DMAC->LOCAL_DESC_MEM_FREE_FLAG_SET_1;
394: }
395:
396:
403:
void AG903_DMACPrmSetLOCAL_DESC_MEM_FREE_FLAG_SET_1(uint32_t flag)
404: {
405:
AG903_DMAC->LOCAL_DESC_MEM_FREE_FLAG_SET_1 = flag;
406: }
407:
408:
415:
void AG903_DMACPrmGetLOCAL_DESC_MEM_FREE_FLAG_SET_2(uint32_t *flag)
416: {
417:
ASSERT(flag != NULL);
418:
419: *flag =
AG903_DMAC->LOCAL_DESC_MEM_FREE_FLAG_SET_2;
420: }
421:
422:
429:
void AG903_DMACPrmSetLOCAL_DESC_MEM_FREE_FLAG_SET_2(uint32_t flag)
430: {
431:
AG903_DMAC->LOCAL_DESC_MEM_FREE_FLAG_SET_2 = flag;
432: }
433:
434:
441:
void AG903_DMACPrmGetLOCAL_DESC_MEM_FREE_FLAG_SET_3(uint32_t *flag)
442: {
443:
ASSERT(flag != NULL);
444:
445: *flag =
AG903_DMAC->LOCAL_DESC_MEM_FREE_FLAG_SET_3;
446: }
447:
448:
455:
void AG903_DMACPrmSetLOCAL_DESC_MEM_FREE_FLAG_SET_3(uint32_t flag)
456: {
457:
AG903_DMAC->LOCAL_DESC_MEM_FREE_FLAG_SET_3 = flag;
458: }
459:
460:
468:
void AG903_DMACPrmGetENDIAN_CONVERSION(uint32_t *ec, uint32_t *lmec)
469: {
470:
ASSERT(ec != NULL);
471:
ASSERT(lmec != NULL);
472:
473: uint32_t reg =
AG903_DMAC->ENDIAN_CONVERSION;
474: *ec = (reg &
AG903_DMAC_ENDIAN_CONVERSION_EndianConvert_MSK)
475: >>
AG903_DMAC_ENDIAN_CONVERSION_EndianConvert_POS;
476: *lmec = (reg &
AG903_DMAC_ENDIAN_CONVERSION_LMEC_MSK)
477: >>
AG903_DMAC_ENDIAN_CONVERSION_LMEC_POS;
478: }
479:
480:
488:
void AG903_DMACPrmSetENDIAN_CONVERSION(uint32_t ec, uint32_t lmec)
489: {
490: uint32_t reg = 0;
491: reg |= (ec <<
AG903_DMAC_ENDIAN_CONVERSION_EndianConvert_POS)
492: &
AG903_DMAC_ENDIAN_CONVERSION_EndianConvert_MSK;
493: reg |= (lmec <<
AG903_DMAC_ENDIAN_CONVERSION_LMEC_POS)
494: &
AG903_DMAC_ENDIAN_CONVERSION_LMEC_MSK;
495:
AG903_DMAC->ENDIAN_CONVERSION = reg;
496: }
497:
498:
505:
void AG903_DMACPrmGetCONSTANT_VALUE_WRITE_ONLY(uint32_t *value)
506: {
507:
ASSERT(value != NULL);
508:
509: *value =
AG903_DMAC->CONSTANT_VALUE_WRITE_ONLY;
510: }
511:
512:
519:
void AG903_DMACPrmSetCONSTANT_VALUE_WRITE_ONLY(uint32_t value)
520: {
521:
AG903_DMAC->CONSTANT_VALUE_WRITE_ONLY = value;
522: }
523:
524:
532:
void AG903_DMACPrmGetCTRL_REG(uint8_t unit,
DMACPrmParamCTRL *ctrl)
533: {
534:
ASSERT(ctrl != NULL);
535:
ASSERT(unit < DMAC_UNIT_MAX);
536:
537: uint32_t reg =
AG903_DMACn(unit)->CTRL_REG;
538: ctrl->ChWEvent = (reg &
AG903_DMACn_CTRL_REG_ChWEvent_MSK) >>
AG903_DMACn_CTRL_REG_ChWEvent_POS;
539: ctrl->WSync = (reg &
AG903_DMACn_CTRL_REG_WSync_MSK ) >>
AG903_DMACn_CTRL_REG_WSync_POS;
540: ctrl->ChSEvent = (reg &
AG903_DMACn_CTRL_REG_ChSEvent_MSK) >>
AG903_DMACn_CTRL_REG_ChSEvent_POS;
541: ctrl->SEventEn = (reg &
AG903_DMACn_CTRL_REG_SEventEn_MSK) >>
AG903_DMACn_CTRL_REG_SEventEn_POS;
542: ctrl->WEventEn = (reg &
AG903_DMACn_CTRL_REG_WEventEn_MSK) >>
AG903_DMACn_CTRL_REG_WEventEn_POS;
543: ctrl->DEn = (reg &
AG903_DMACn_CTRL_REG_DEn_MSK ) >>
AG903_DMACn_CTRL_REG_DEn_POS;
544: ctrl->ExpEn = (reg &
AG903_DMACn_CTRL_REG_ExpEn_MSK ) >>
AG903_DMACn_CTRL_REG_ExpEn_POS;
545: ctrl->ChEn = (reg &
AG903_DMACn_CTRL_REG_ChEn_MSK ) >>
AG903_DMACn_CTRL_REG_ChEn_POS;
546: ctrl->WDTEn = (reg &
AG903_DMACn_CTRL_REG_WDTEn_MSK ) >>
AG903_DMACn_CTRL_REG_WDTEn_POS;
547: ctrl->DstCtrl = (reg &
AG903_DMACn_CTRL_REG_DstCtrl_MSK ) >>
AG903_DMACn_CTRL_REG_DstCtrl_POS;
548: ctrl->SrcCtrl = (reg &
AG903_DMACn_CTRL_REG_SrcCtrl_MSK ) >>
AG903_DMACn_CTRL_REG_SrcCtrl_POS;
549: ctrl->DstWidth = (reg &
AG903_DMACn_CTRL_REG_DstWidth_MSK) >>
AG903_DMACn_CTRL_REG_DstWidth_POS;
550: ctrl->SrcWidth = (reg &
AG903_DMACn_CTRL_REG_SrcWidth_MSK) >>
AG903_DMACn_CTRL_REG_SrcWidth_POS;
551: ctrl->TCMsk = (reg &
AG903_DMACn_CTRL_REG_TCMsk_MSK ) >>
AG903_DMACn_CTRL_REG_TCMsk_POS;
552: ctrl->SrcTcnt = (reg &
AG903_DMACn_CTRL_REG_SrcTcnt_MSK ) >>
AG903_DMACn_CTRL_REG_SrcTcnt_POS;
553: }
554:
555:
563:
void AG903_DMACPrmSetCTRL_REG(uint8_t unit,
DMACPrmParamCTRL *ctrl)
564: {
565:
ASSERT(ctrl != NULL);
566:
ASSERT(unit < DMAC_UNIT_MAX);
567:
568: uint32_t reg = 0;
569: reg |= (ctrl->ChWEvent <<
AG903_DMACn_CTRL_REG_ChWEvent_POS) &
AG903_DMACn_CTRL_REG_ChWEvent_MSK;
570: reg |= (ctrl->WSync <<
AG903_DMACn_CTRL_REG_WSync_POS ) &
AG903_DMACn_CTRL_REG_WSync_MSK;
571: reg |= (ctrl->ChSEvent <<
AG903_DMACn_CTRL_REG_ChSEvent_POS) &
AG903_DMACn_CTRL_REG_ChSEvent_MSK;
572: reg |= (ctrl->SEventEn <<
AG903_DMACn_CTRL_REG_SEventEn_POS) &
AG903_DMACn_CTRL_REG_SEventEn_MSK;
573: reg |= (ctrl->WEventEn <<
AG903_DMACn_CTRL_REG_WEventEn_POS) &
AG903_DMACn_CTRL_REG_WEventEn_MSK;
574: reg |= (ctrl->DEn <<
AG903_DMACn_CTRL_REG_DEn_POS ) &
AG903_DMACn_CTRL_REG_DEn_MSK;
575: reg |= (ctrl->ExpEn <<
AG903_DMACn_CTRL_REG_ExpEn_POS ) &
AG903_DMACn_CTRL_REG_ExpEn_MSK;
576: reg |= (ctrl->ChEn <<
AG903_DMACn_CTRL_REG_ChEn_POS ) &
AG903_DMACn_CTRL_REG_ChEn_MSK;
577: reg |= (ctrl->WDTEn <<
AG903_DMACn_CTRL_REG_WDTEn_POS ) &
AG903_DMACn_CTRL_REG_WDTEn_MSK;
578: reg |= (ctrl->DstCtrl <<
AG903_DMACn_CTRL_REG_DstCtrl_POS ) &
AG903_DMACn_CTRL_REG_DstCtrl_MSK;
579: reg |= (ctrl->SrcCtrl <<
AG903_DMACn_CTRL_REG_SrcCtrl_POS ) &
AG903_DMACn_CTRL_REG_SrcCtrl_MSK;
580: reg |= (ctrl->DstWidth <<
AG903_DMACn_CTRL_REG_DstWidth_POS) &
AG903_DMACn_CTRL_REG_DstWidth_MSK;
581: reg |= (ctrl->SrcWidth <<
AG903_DMACn_CTRL_REG_SrcWidth_POS) &
AG903_DMACn_CTRL_REG_SrcWidth_MSK;
582: reg |= (ctrl->TCMsk <<
AG903_DMACn_CTRL_REG_TCMsk_POS ) &
AG903_DMACn_CTRL_REG_TCMsk_MSK;
583: reg |= (ctrl->SrcTcnt <<
AG903_DMACn_CTRL_REG_SrcTcnt_POS ) &
AG903_DMACn_CTRL_REG_SrcTcnt_MSK;
584:
AG903_DMACn(unit)->CTRL_REG = reg;
585: }
586:
587:
595:
void AG903_DMACPrmGetCFG_REG(uint8_t unit,
DMACPrmParamCFG *cfg)
596: {
597:
ASSERT(cfg != NULL);
598:
ASSERT(unit < DMAC_UNIT_MAX);
599:
600: uint32_t reg =
AG903_DMACn(unit)->CFG_REG;
601: cfg->TCIntMsk = (reg &
AG903_DMACn_CFG_REG_TCIntMsk_MSK ) >>
AG903_DMACn_CFG_REG_TCIntMsk_POS;
602: cfg->ErrIntMsk = (reg &
AG903_DMACn_CFG_REG_ErrIntMsk_MSK ) >>
AG903_DMACn_CFG_REG_ErrIntMsk_POS;
603: cfg->AbtIntMsk = (reg &
AG903_DMACn_CFG_REG_AbtIntMsk_MSK ) >>
AG903_DMACn_CFG_REG_AbtIntMsk_POS;
604: cfg->SrcRS = (reg &
AG903_DMACn_CFG_REG_SrcRS_MSK ) >>
AG903_DMACn_CFG_REG_SrcRS_POS;
605: cfg->SrcHEn = (reg &
AG903_DMACn_CFG_REG_SrcHEn_MSK ) >>
AG903_DMACn_CFG_REG_SrcHEn_POS;
606: cfg->DstRS = (reg &
AG903_DMACn_CFG_REG_DstRS_MSK ) >>
AG903_DMACn_CFG_REG_DstRS_POS;
607: cfg->DstHEn = (reg &
AG903_DMACn_CFG_REG_DstHEn_MSK ) >>
AG903_DMACn_CFG_REG_DstHEn_POS;
608: cfg->LLPCnt = (reg &
AG903_DMACn_CFG_REG_LLPCnt_MSK ) >>
AG903_DMACn_CFG_REG_LLPCnt_POS;
609: cfg->ChGntWin = (reg &
AG903_DMACn_CFG_REG_ChGntWin_MSK ) >>
AG903_DMACn_CFG_REG_ChGntWin_POS;
610: cfg->ChPri = (reg &
AG903_DMACn_CFG_REG_ChPri_MSK ) >>
AG903_DMACn_CFG_REG_ChPri_POS;
611: cfg->WOMode = (reg &
AG903_DMACn_CFG_REG_WOMode_MSK ) >>
AG903_DMACn_CFG_REG_WOMode_POS;
612: cfg->UnalignMode = (reg &
AG903_DMACn_CFG_REG_UnalignMode_MSK) >>
AG903_DMACn_CFG_REG_UnalignMode_POS;
613: }
614:
615:
623:
void AG903_DMACPrmSetCFG_REG(uint8_t unit,
DMACPrmParamCFG *cfg)
624: {
625:
ASSERT(cfg != NULL);
626:
ASSERT(unit < DMAC_UNIT_MAX);
627:
628: uint32_t reg = 0;
629: reg |= (cfg->TCIntMsk <<
AG903_DMACn_CFG_REG_TCIntMsk_POS ) &
AG903_DMACn_CFG_REG_TCIntMsk_MSK;
630: reg |= (cfg->ErrIntMsk <<
AG903_DMACn_CFG_REG_ErrIntMsk_POS ) &
AG903_DMACn_CFG_REG_ErrIntMsk_MSK;
631: reg |= (cfg->AbtIntMsk <<
AG903_DMACn_CFG_REG_AbtIntMsk_POS ) &
AG903_DMACn_CFG_REG_AbtIntMsk_MSK;
632: reg |= (cfg->SrcRS <<
AG903_DMACn_CFG_REG_SrcRS_POS ) &
AG903_DMACn_CFG_REG_SrcRS_MSK;
633: reg |= (cfg->SrcHEn <<
AG903_DMACn_CFG_REG_SrcHEn_POS ) &
AG903_DMACn_CFG_REG_SrcHEn_MSK;
634: reg |= (cfg->DstRS <<
AG903_DMACn_CFG_REG_DstRS_POS ) &
AG903_DMACn_CFG_REG_DstRS_MSK;
635: reg |= (cfg->DstHEn <<
AG903_DMACn_CFG_REG_DstHEn_POS ) &
AG903_DMACn_CFG_REG_DstHEn_MSK;
636: reg |= (cfg->LLPCnt <<
AG903_DMACn_CFG_REG_LLPCnt_POS ) &
AG903_DMACn_CFG_REG_LLPCnt_MSK;
637: reg |= (cfg->ChGntWin <<
AG903_DMACn_CFG_REG_ChGntWin_POS ) &
AG903_DMACn_CFG_REG_ChGntWin_MSK;
638: reg |= (cfg->ChPri <<
AG903_DMACn_CFG_REG_ChPri_POS ) &
AG903_DMACn_CFG_REG_ChPri_MSK;
639: reg |= (cfg->WOMode <<
AG903_DMACn_CFG_REG_WOMode_POS ) &
AG903_DMACn_CFG_REG_WOMode_MSK;
640: reg |= (cfg->UnalignMode <<
AG903_DMACn_CFG_REG_UnalignMode_POS) &
AG903_DMACn_CFG_REG_UnalignMode_MSK;
641:
AG903_DMACn(unit)->CFG_REG = reg;
642:
643: }
644:
645:
653:
void AG903_DMACPrmGetSRC_ADDR(uint8_t unit, uint32_t *addr)
654: {
655:
ASSERT(addr != NULL);
656:
ASSERT(unit < DMAC_UNIT_MAX);
657:
658: *addr =
AG903_DMACn(unit)->SRC_ADDR;
659: }
660:
661:
669:
void AG903_DMACPrmSetSRC_ADDR(uint8_t unit, uint32_t addr)
670: {
671:
ASSERT(unit < DMAC_UNIT_MAX);
672:
673:
AG903_DMACn(unit)->SRC_ADDR = addr &
AG903_DMACn_SRC_ADDR_SrcAddr_MSK;
674: }
675:
676:
684:
void AG903_DMACPrmGetDST_ADDR(uint8_t unit, uint32_t *addr)
685: {
686:
ASSERT(addr != NULL);
687:
ASSERT(unit < DMAC_UNIT_MAX);
688:
689: *addr =
AG903_DMACn(unit)->DST_ADDR;
690: }
691:
692:
700:
void AG903_DMACPrmSetDST_ADDR(uint8_t unit, uint32_t addr)
701: {
702:
ASSERT(unit < DMAC_UNIT_MAX);
703:
704:
AG903_DMACn(unit)->DST_ADDR = addr &
AG903_DMACn_DST_ADDR_DstAddr_MSK;
705: }
706:
707:
715:
void AG903_DMACPrmGetLINK_LIST_POINTER(uint8_t unit, uint32_t *addr)
716: {
717:
ASSERT(addr != NULL);
718:
ASSERT(unit < DMAC_UNIT_MAX);
719:
720: *addr =
AG903_DMACn(unit)->LINK_LIST_POINTER;
721: }
722:
723:
731:
void AG903_DMACPrmSetLINK_LIST_POINTER(uint8_t unit, uint32_t addr)
732: {
733:
ASSERT(unit < DMAC_UNIT_MAX);
734:
735:
AG903_DMACn(unit)->LINK_LIST_POINTER = addr &
AG903_DMACn_LINK_LIST_POINTER_LLP_MSK;
736: }
737:
738:
746:
void AG903_DMACPrmGetTRNS_SIZE_1D(uint8_t unit, uint32_t *cnt)
747: {
748:
ASSERT(cnt != NULL);
749:
ASSERT(unit < DMAC_UNIT_MAX);
750:
751: *cnt = (
AG903_DMACn(unit)->TRNS_SIZE_1D &
AG903_DMACn_TRNS_SIZE_1D_TCnt_MSK)
752: >>
AG903_DMACn_TRNS_SIZE_1D_TCnt_POS;
753: }
754:
755:
763:
void AG903_DMACPrmSetTRNS_SIZE_1D(uint8_t unit, uint32_t cnt)
764: {
765:
ASSERT(unit < DMAC_UNIT_MAX);
766:
767:
AG903_DMACn(unit)->TRNS_SIZE_1D =
768: (cnt <<
AG903_DMACn_TRNS_SIZE_1D_TCnt_POS) &
AG903_DMACn_TRNS_SIZE_1D_TCnt_MSK;
769: }
770:
771:
780:
void AG903_DMACPrmGetTRNS_SIZE_2D(uint8_t unit, uint32_t *x_cnt, uint32_t *y_cnt)
781: {
782:
ASSERT(x_cnt != NULL);
783:
ASSERT(y_cnt != NULL);
784:
ASSERT(unit < DMAC_UNIT_MAX);
785:
786: uint32_t reg =
AG903_DMACn(unit)->TRNS_SIZE_2D;
787: *x_cnt = (reg &
AG903_DMACn_TRNS_SIZE_2D_XTCnt_MSK) >>
AG903_DMACn_TRNS_SIZE_2D_XTCnt_POS;
788: *y_cnt = (reg &
AG903_DMACn_TRNS_SIZE_2D_YTCnt_MSK) >>
AG903_DMACn_TRNS_SIZE_2D_YTCnt_POS;
789: }
790:
791:
800:
void AG903_DMACPrmSetTRNS_SIZE_2D(uint8_t unit, uint32_t x_cnt, uint32_t y_cnt)
801: {
802:
ASSERT(unit < DMAC_UNIT_MAX);
803:
804: uint32_t reg = 0;
805: reg |= (x_cnt <<
AG903_DMACn_TRNS_SIZE_2D_XTCnt_POS) &
AG903_DMACn_TRNS_SIZE_2D_XTCnt_MSK;
806: reg |= (y_cnt <<
AG903_DMACn_TRNS_SIZE_2D_YTCnt_POS) &
AG903_DMACn_TRNS_SIZE_2D_YTCnt_MSK;
807:
AG903_DMACn(unit)->TRNS_SIZE_2D = reg;
808: }
809:
810:
819:
void AG903_DMACPrmGetSTRIDE_SRC_DST_ADDR(uint8_t unit, uint32_t *src, uint32_t *dst)
820: {
821:
ASSERT(src != NULL);
822:
ASSERT(dst != NULL);
823:
ASSERT(unit < DMAC_UNIT_MAX);
824:
825: uint32_t reg =
AG903_DMACn(unit)->STRIDE_SRC_DST_ADDR;
826: *src = (reg &
AG903_DMACn_STRIDE_SRC_DST_ADDR_SrcStride_MSK) >>
AG903_DMACn_STRIDE_SRC_DST_ADDR_SrcStride_POS;
827: *dst = (reg &
AG903_DMACn_STRIDE_SRC_DST_ADDR_DstStride_MSK) >>
AG903_DMACn_STRIDE_SRC_DST_ADDR_DstStride_POS;
828: }
829:
830:
839:
void AG903_DMACPrmSetSTRIDE_SRC_DST_ADDR(uint8_t unit, uint32_t src, uint32_t dst)
840: {
841:
ASSERT(unit < DMAC_UNIT_MAX);
842:
843: uint32_t reg = 0;
844: reg |= (src <<
AG903_DMACn_STRIDE_SRC_DST_ADDR_SrcStride_POS) &
AG903_DMACn_STRIDE_SRC_DST_ADDR_SrcStride_MSK;
845: reg |= (dst <<
AG903_DMACn_STRIDE_SRC_DST_ADDR_DstStride_POS) &
AG903_DMACn_STRIDE_SRC_DST_ADDR_DstStride_MSK;
846:
AG903_DMACn(unit)->STRIDE_SRC_DST_ADDR = reg;
847: }
848: