UART Register Definition
UART Register Definition
none
AXELL CORPORATION
2017_10_20 Auto-generated.
2019_12_27 [SDK3.0] AG903仕様書AX51903_DS06.pdfの修正を反映 (#2633)
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名前 |
説明 |
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UARTn Base Address | |
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UARTn Base Address | |
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UARTn Base Address | |
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UARTn Base Address | |
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UARTn Base Address (n=0..3) | |
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UARTnCHARINTERVAL Address (n=0..3) | |
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UARTnCHARINTERVAL TIME-bit mask | |
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UARTnCHARINTERVAL TIME-bit position | |
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UARTnCLR Address (n=0..3) | |
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UARTnCLR CTO-bit mask | |
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UARTnCLR CTO-bit position | |
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UARTnCLR RTO-bit mask | |
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UARTnCLR RTO-bit position | |
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UARTnCMD Address (n=0..3) | |
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UARTnCMD ST-bit mask | |
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UARTnCMD ST-bit position | |
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UARTnDLL Address (n=0..3) | |
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UARTnDLL DLL-bit mask | |
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UARTnDLL DLL-bit position | |
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UARTnDLM Address (n=0..3) | |
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UARTnDLM DLM-bit mask | |
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UARTnDLM DLM-bit position | |
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UARTnFCR Address (n=0..3) | |
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UARTnFCR DMA_Mode-bit mask | |
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UARTnFCR DMA_Mode-bit position | |
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UARTnFCR FIFO_Enable-bit mask | |
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UARTnFCR FIFO_Enable-bit position | |
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UARTnFCR RX_FIFO_Reset-bit mask | |
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UARTnFCR RX_FIFO_Reset-bit position | |
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UARTnFCR RXFIFO_TRGL-bit mask | |
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UARTnFCR RXFIFO_TRGL-bit position | |
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UARTnFCR TX_FIFO_Reset-bit mask | |
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UARTnFCR TX_FIFO_Reset-bit position | |
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UARTnFEATURE Address (n=0..3) | |
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UARTnFEATURE FIFO_DEPTH-bit mask | |
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UARTnFEATURE FIFO_DEPTH-bit position | |
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UARTnFEATURE IrDA_INSIDE-bit mask | |
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UARTnFEATURE IrDA_INSIDE-bit position | |
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UARTnHOLDTIME Address (n=0..3) | |
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UARTnHOLDTIME TIME-bit mask | |
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UARTnHOLDTIME TIME-bit position | |
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UARTnIER Address (n=0..3) | |
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UARTnIER CTSEn-bit mask | |
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UARTnIER CTSEn-bit position | |
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UARTnIER DSREn-bit mask | |
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UARTnIER DSREn-bit position | |
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UARTnIER DTREn-bit mask | |
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UARTnIER DTREn-bit position | |
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UARTnIER MODEM_Status-bit mask | |
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UARTnIER MODEM_Status-bit position | |
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UARTnIER Receiver_Data_Available-bit mask | |
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UARTnIER Receiver_Data_Available-bit position | |
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UARTnIER Receiver_Line_Status-bit mask | |
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UARTnIER Receiver_Line_Status-bit position | |
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UARTnIER RTSEn-bit mask | |
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UARTnIER RTSEn-bit position | |
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UARTnIER THR_Empty-bit mask | |
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UARTnIER THR_Empty-bit position | |
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UARTnIIR Address (n=0..3) | |
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UARTnIIR FIFO_mode_enable-bit mask | |
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UARTnIIR FIFO_mode_enable-bit position | |
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UARTnIIR FIFO_mode_only-bit mask | |
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UARTnIIR FIFO_mode_only-bit position | |
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UARTnIIR Interrupt_Identification_Code-bit mask | |
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UARTnIIR Interrupt_Identification_Code-bit position | |
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UARTnIIR Interrupt_Pending-bit mask | |
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UARTnIIR Interrupt_Pending-bit position | |
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UARTnIIR Tx_FIFO_full-bit mask | |
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UARTnIIR Tx_FIFO_full-bit position | |
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UARTnINTMASK Address (n=0..3) | |
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UARTnINTMASK CTO-bit mask | |
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UARTnINTMASK CTO-bit position | |
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UARTnINTMASK RTO-bit mask | |
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UARTnINTMASK RTO-bit position | |
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UARTnLCR Address (n=0..3) | |
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UARTnLCR DLAB-bit mask | |
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UARTnLCR DLAB-bit position | |
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UARTnLCR Even_Parity-bit mask | |
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UARTnLCR Even_Parity-bit position | |
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UARTnLCR Parity_Enable-bit mask | |
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UARTnLCR Parity_Enable-bit position | |
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UARTnLCR Set_Break-bit mask | |
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UARTnLCR Set_Break-bit position | |
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UARTnLCR Stick_Parity-bit mask | |
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UARTnLCR Stick_Parity-bit position | |
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UARTnLCR Stop_Bits-bit mask | |
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UARTnLCR Stop_Bits-bit position | |
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UARTnLCR WL0-bit mask | |
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UARTnLCR WL0-bit position | |
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UARTnLCR WL1-bit mask | |
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UARTnLCR WL1-bit position | |
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UARTnLSR Address (n=0..3) | |
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UARTnLSR Break_Interrupt-bit mask | |
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UARTnLSR Break_Interrupt-bit position | |
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UARTnLSR Data_Ready-bit mask | |
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UARTnLSR Data_Ready-bit position | |
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UARTnLSR FIFO_Data_Error-bit mask | |
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UARTnLSR FIFO_Data_Error-bit position | |
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UARTnLSR Framing_Error-bit mask | |
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UARTnLSR Framing_Error-bit position | |
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UARTnLSR Overrun_Error-bit mask | |
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UARTnLSR Overrun_Error-bit position | |
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UARTnLSR Parity_Error-bit mask | |
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UARTnLSR Parity_Error-bit position | |
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UARTnLSR THR_Empty-bit mask | |
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UARTnLSR THR_Empty-bit position | |
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UARTnLSR Transmitter_Empty-bit mask | |
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UARTnLSR Transmitter_Empty-bit position | |
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UARTnMCR Address (n=0..3) | |
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UARTnMCR DMAmode2-bit mask | |
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UARTnMCR DMAmode2-bit position | |
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UARTnMCR DTR-bit mask | |
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UARTnMCR DTR-bit position | |
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UARTnMCR Loop-bit mask | |
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UARTnMCR Loop-bit position | |
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UARTnMCR Out1-bit mask | |
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UARTnMCR Out1-bit position | |
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UARTnMCR Out2-bit mask | |
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UARTnMCR Out2-bit position | |
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UARTnMCR Out3-bit mask | |
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UARTnMCR Out3-bit position | |
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UARTnMCR RTS-bit mask | |
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UARTnMCR RTS-bit position | |
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UARTnMOD Address (n=0..3) | |
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UARTnMOD FC-bit mask | |
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UARTnMOD FC-bit position | |
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UARTnMOD HM-bit mask | |
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UARTnMOD HM-bit position | |
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UARTnMOD SM-bit mask | |
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UARTnMOD SM-bit position | |
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UARTnMOD TD-bit mask | |
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UARTnMOD TD-bit position | |
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UARTnMSR Address (n=0..3) | |
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UARTnMSR CTS-bit mask | |
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UARTnMSR CTS-bit position | |
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UARTnMSR DCD-bit mask | |
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UARTnMSR DCD-bit position | |
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UARTnMSR Delta_CTS-bit mask | |
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UARTnMSR Delta_CTS-bit position | |
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UARTnMSR Delta_DCD-bit mask | |
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UARTnMSR Delta_DCD-bit position | |
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UARTnMSR Delta_DSR-bit mask | |
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UARTnMSR Delta_DSR-bit position | |
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UARTnMSR DSR-bit mask | |
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UARTnMSR DSR-bit position | |
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UARTnMSR RI-bit mask | |
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UARTnMSR RI-bit position | |
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UARTnMSR Trailing_edge_R1-bit mask | |
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UARTnMSR Trailing_edge_R1-bit position | |
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UARTnPSR Address (n=0..3) | |
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UARTnPSR PSR-bit mask | |
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UARTnPSR PSR-bit position | |
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UARTnRBR Address (n=0..3) | |
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UARTnRBR RBR-bit mask | |
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UARTnRBR RBR-bit position | |
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UARTnRECEIVETIME Address (n=0..3) | |
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UARTnRECEIVETIME TIME-bit mask | |
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UARTnRECEIVETIME TIME-bit position | |
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UARTnREVD1 Address (n=0..3) | |
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UARTnREVD1 REVD1-bit mask | |
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UARTnREVD1 REVD1-bit position | |
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UARTnREVD2 Address (n=0..3) | |
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UARTnREVD2 REVD2-bit mask | |
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UARTnREVD2 REVD2-bit position | |
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UARTnREVD3 Address (n=0..3) | |
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UARTnREVD3 REVD3-bit mask | |
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UARTnREVD3 REVD3-bit position | |
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UARTnSETUPTIME Address (n=0..3) | |
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UARTnSETUPTIME TIME-bit mask | |
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UARTnSETUPTIME TIME-bit position | |
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UARTnSPR Address (n=0..3) | |
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UARTnSPR User_Data-bit mask | |
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UARTnSPR User_Data-bit position | |
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UARTnSTAT Address (n=0..3) | |
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UARTnSTAT CTO-bit mask | |
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UARTnSTAT CTO-bit position | |
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UARTnSTAT RTO-bit mask | |
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UARTnSTAT RTO-bit position | |
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UARTnTHR Address (n=0..3) | |
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UARTnTHR THR-bit mask | |
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UARTnTHR THR-bit position | |
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UARTnTIMEOUT Address (n=0..3) | |
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UARTnTIMEOUT TIME-bit mask | |
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UARTnTIMEOUT TIME-bit position | |
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UARTnTST Address (n=0..3) | |
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UARTnTST TEST_BAUDGEN-bit mask | |
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UARTnTST TEST_BAUDGEN-bit position | |
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UARTnTST TEST_CRC_ERR-bit mask | |
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UARTnTST TEST_CRC_ERR-bit position | |
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UARTnTST TEST_FRM_ERR-bit mask | |
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UARTnTST TEST_FRM_ERR-bit position | |
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UARTnTST TEST_PAR_ERR-bit mask | |
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UARTnTST TEST_PAR_ERR-bit position | |
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UARTnTST TEST_PHY_ERR-bit mask | |
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UARTnTST TEST_PHY_ERR-bit position |
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名前 |
説明 |
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UARTn Type |