/**
 * @brief           VIA Register Definition
 * @author          AXELL CORPORATION
 * @description     VIA Register Definition
 * @note            none
 * @history         2017_10_20 Auto-generated.
 */
/* DOM-IGNORE-BEGIN */
/*
 * This program was created by AXELL CORPORATION.
 * Copyright (C) 2017 AXELL CORPORATION, all rights reserved.
 */

#ifndef _AG903_VIA_REGMAP_H_
#define _AG903_VIA_REGMAP_H_
/* DOM-IGNORE-END */

#include "AG903_regmap.h"

#define AG903_VIA_SRC_SELECT                               (AG903_VIA_BASE + 0x100)                                      /** VIASRC_SELECT address */
#define AG903_VIA_SRC_FORMAT                               (AG903_VIA_BASE + 0x118)                                      /** VIASRC_FORMAT address */
#define AG903_VIA_SRC_HCYCLE                               (AG903_VIA_BASE + 0x119)                                      /** VIASRC_HCYCLE address */
#define AG903_VIA_SRC_HVALID                               (AG903_VIA_BASE + 0x11A)                                      /** VIASRC_HVALID address */
#define AG903_VIA_SRC_HDELAY                               (AG903_VIA_BASE + 0x11B)                                      /** VIASRC_HDELAY address */
#define AG903_VIA_SRC_VCYCLE                               (AG903_VIA_BASE + 0x11C)                                      /** VIASRC_VCYCLE address */
#define AG903_VIA_SRC_VVALID                               (AG903_VIA_BASE + 0x11D)                                      /** VIASRC_VVALID address */
#define AG903_VIA_SRC_VDELAY                               (AG903_VIA_BASE + 0x11E)                                      /** VIASRC_VDELAY address */
#define AG903_VIA_SRC_FRMFREQ                              (AG903_VIA_BASE + 0x11F)                                      /** VIASRC_FRMFREQ address */
#define AG903_VIA_SIG_YCS                                  (AG903_VIA_BASE + 0x146)                                      /** VIASIG_YCS address */
#define AG903_VIA_CHD_SETUP2                               (AG903_VIA_BASE + 0x14D)                                      /** VIACHD_SETUP2 address */
#define AG903_VIA_CHD_SETUP3                               (AG903_VIA_BASE + 0x14E)                                      /** VIACHD_SETUP3 address */
#define AG903_VIA_CHD_SETUP5                               (AG903_VIA_BASE + 0x150)                                      /** VIACHD_SETUP5 address */
#define AG903_VIA_OUT_LEVELY                               (AG903_VIA_BASE + 0x152)                                      /** VIAOUT_LEVELY address */
#define AG903_VIA_OUT_LEVELCB                              (AG903_VIA_BASE + 0x153)                                      /** VIAOUT_LEVELCB address */
#define AG903_VIA_OUT_LEVELCR                              (AG903_VIA_BASE + 0x154)                                      /** VIAOUT_LEVELCR address */
#define AG903_VIA_CLAMP_LEVEL                              (AG903_VIA_BASE + 0x157)                                      /** VIACLAMP_LEVEL address */
#define AG903_VIA_DET_STATUS                               (AG903_VIA_BASE + 0xE94)                                      /** VIADET_STATUS address */
#define AG903_VIA_DET_HCYCLE                               (AG903_VIA_BASE + 0xE95)                                      /** VIADET_HCYCLE address */
#define AG903_VIA_DET_VCYCLE                               (AG903_VIA_BASE + 0xE96)                                      /** VIADET_VCYCLE address */


#define AG903_VIA_SRC_SELECT_NONS_POS                      0                                                             /** VIASRC_SELECT NONS-bit position */
#define AG903_VIA_SRC_SELECT_NONS_MSK                      (0x1U << AG903_VIA_SRC_SELECT_NONS_POS)                       /** VIASRC_SELECT NONS-bit mask */
#define AG903_VIA_SRC_SELECT_NSNS_POS                      1                                                             /** VIASRC_SELECT NSNS-bit position */
#define AG903_VIA_SRC_SELECT_NSNS_MSK                      (0x1U << AG903_VIA_SRC_SELECT_NSNS_POS)                       /** VIASRC_SELECT NSNS-bit mask */
#define AG903_VIA_SRC_SELECT_NSCK_POS                      2                                                             /** VIASRC_SELECT NSCK-bit position */
#define AG903_VIA_SRC_SELECT_NSCK_MSK                      (0x1U << AG903_VIA_SRC_SELECT_NSCK_POS)                       /** VIASRC_SELECT NSCK-bit mask */
#define AG903_VIA_SRC_SELECT_GCAT_POS                      4                                                             /** VIASRC_SELECT GCAT-bit position */
#define AG903_VIA_SRC_SELECT_GCAT_MSK                      (0x1U << AG903_VIA_SRC_SELECT_GCAT_POS)                       /** VIASRC_SELECT GCAT-bit mask */

#define AG903_VIA_SRC_FORMAT_FMT_POS                       0                                                             /** VIASRC_FORMAT FMT-bit position */
#define AG903_VIA_SRC_FORMAT_FMT_MSK                       (0xfU << AG903_VIA_SRC_FORMAT_FMT_POS)                        /** VIASRC_FORMAT FMT-bit mask */

#define AG903_VIA_SRC_HCYCLE_HCYCLE_POS                    0                                                             /** VIASRC_HCYCLE HCYCLE-bit position */
#define AG903_VIA_SRC_HCYCLE_HCYCLE_MSK                    (0xfffU << AG903_VIA_SRC_HCYCLE_HCYCLE_POS)                   /** VIASRC_HCYCLE HCYCLE-bit mask */

#define AG903_VIA_SRC_HVALID_HVALID_POS                    0                                                             /** VIASRC_HVALID HVALID-bit position */
#define AG903_VIA_SRC_HVALID_HVALID_MSK                    (0xfffU << AG903_VIA_SRC_HVALID_HVALID_POS)                   /** VIASRC_HVALID HVALID-bit mask */

#define AG903_VIA_SRC_HDELAY_HDELAY_POS                    0                                                             /** VIASRC_HDELAY HDELAY-bit position */
#define AG903_VIA_SRC_HDELAY_HDELAY_MSK                    (0x7ffU << AG903_VIA_SRC_HDELAY_HDELAY_POS)                   /** VIASRC_HDELAY HDELAY-bit mask */

#define AG903_VIA_SRC_VCYCLE_VCYCLE_POS                    0                                                             /** VIASRC_VCYCLE VCYCLE-bit position */
#define AG903_VIA_SRC_VCYCLE_VCYCLE_MSK                    (0x3ffU << AG903_VIA_SRC_VCYCLE_VCYCLE_POS)                   /** VIASRC_VCYCLE VCYCLE-bit mask */

#define AG903_VIA_SRC_VVALID_VVALID_POS                    0                                                             /** VIASRC_VVALID VVALID-bit position */
#define AG903_VIA_SRC_VVALID_VVALID_MSK                    (0x3ffU << AG903_VIA_SRC_VVALID_VVALID_POS)                   /** VIASRC_VVALID VVALID-bit mask */

#define AG903_VIA_SRC_VDELAY_VDELAY_POS                    0                                                             /** VIASRC_VDELAY VDELAY-bit position */
#define AG903_VIA_SRC_VDELAY_VDELAY_MSK                    (0x3ffU << AG903_VIA_SRC_VDELAY_VDELAY_POS)                   /** VIASRC_VDELAY VDELAY-bit mask */

#define AG903_VIA_SRC_FRMFREQ_FRM_POS                      0                                                             /** VIASRC_FRMFREQ FRM-bit position */
#define AG903_VIA_SRC_FRMFREQ_FRM_MSK                      (0x1U << AG903_VIA_SRC_FRMFREQ_FRM_POS)                       /** VIASRC_FRMFREQ FRM-bit mask */

#define AG903_VIA_SIG_YCS_MONO_POS                         0                                                             /** VIASIG_YCS MONO-bit position */
#define AG903_VIA_SIG_YCS_MONO_MSK                         (0x1U << AG903_VIA_SIG_YCS_MONO_POS)                          /** VIASIG_YCS MONO-bit mask */
#define AG903_VIA_SIG_YCS_TRAP_POS                         6                                                             /** VIASIG_YCS TRAP-bit position */
#define AG903_VIA_SIG_YCS_TRAP_MSK                         (0x1U << AG903_VIA_SIG_YCS_TRAP_POS)                          /** VIASIG_YCS TRAP-bit mask */

#define AG903_VIA_CHD_SETUP2_HUE_POS                       0                                                             /** VIACHD_SETUP2 HUE-bit position */
#define AG903_VIA_CHD_SETUP2_HUE_MSK                       (0xffU << AG903_VIA_CHD_SETUP2_HUE_POS)                       /** VIACHD_SETUP2 HUE-bit mask */
#define AG903_VIA_CHD_SETUP2_BPF_POS                       8                                                             /** VIACHD_SETUP2 BPF-bit position */
#define AG903_VIA_CHD_SETUP2_BPF_MSK                       (0x1U << AG903_VIA_CHD_SETUP2_BPF_POS)                        /** VIACHD_SETUP2 BPF-bit mask */

#define AG903_VIA_CHD_SETUP3_ACCMARK_POS                   0                                                             /** VIACHD_SETUP3 ACCMARK-bit position */
#define AG903_VIA_CHD_SETUP3_ACCMARK_MSK                   (0x3fU << AG903_VIA_CHD_SETUP3_ACCMARK_POS)                   /** VIACHD_SETUP3 ACCMARK-bit mask */
#define AG903_VIA_CHD_SETUP3_ACCTC_POS                     6                                                             /** VIACHD_SETUP3 ACCTC-bit position */
#define AG903_VIA_CHD_SETUP3_ACCTC_MSK                     (0x3U << AG903_VIA_CHD_SETUP3_ACCTC_POS)                      /** VIACHD_SETUP3 ACCTC-bit mask */
#define AG903_VIA_CHD_SETUP3_ACCOV_POS                     8                                                             /** VIACHD_SETUP3 ACCOV-bit position */
#define AG903_VIA_CHD_SETUP3_ACCOV_MSK                     (0x3fU << AG903_VIA_CHD_SETUP3_ACCOV_POS)                     /** VIACHD_SETUP3 ACCOV-bit mask */
#define AG903_VIA_CHD_SETUP3_AGCEN_POS                     14                                                            /** VIACHD_SETUP3 AGCEN-bit position */
#define AG903_VIA_CHD_SETUP3_AGCEN_MSK                     (0x1U << AG903_VIA_CHD_SETUP3_AGCEN_POS)                      /** VIACHD_SETUP3 AGCEN-bit mask */

#define AG903_VIA_CHD_SETUP5_AGCOFSTEN_POS                 0                                                             /** VIACHD_SETUP5 AGCOFSTEN-bit position */
#define AG903_VIA_CHD_SETUP5_AGCOFSTEN_MSK                 (0x1U << AG903_VIA_CHD_SETUP5_AGCOFSTEN_POS)                  /** VIACHD_SETUP5 AGCOFSTEN-bit mask */
#define AG903_VIA_CHD_SETUP5_AGCGAINEN_POS                 1                                                             /** VIACHD_SETUP5 AGCGAINEN-bit position */
#define AG903_VIA_CHD_SETUP5_AGCGAINEN_MSK                 (0x1U << AG903_VIA_CHD_SETUP5_AGCGAINEN_POS)                  /** VIACHD_SETUP5 AGCGAINEN-bit mask */
#define AG903_VIA_CHD_SETUP5_AGCPAL_POS                    2                                                             /** VIACHD_SETUP5 AGCPAL-bit position */
#define AG903_VIA_CHD_SETUP5_AGCPAL_MSK                    (0x1U << AG903_VIA_CHD_SETUP5_AGCPAL_POS)                     /** VIACHD_SETUP5 AGCPAL-bit mask */
#define AG903_VIA_CHD_SETUP5_AGCPOS_POS                    3                                                             /** VIACHD_SETUP5 AGCPOS-bit position */
#define AG903_VIA_CHD_SETUP5_AGCPOS_MSK                    (0x1U << AG903_VIA_CHD_SETUP5_AGCPOS_POS)                     /** VIACHD_SETUP5 AGCPOS-bit mask */
#define AG903_VIA_CHD_SETUP5_AGCOFSTSPD_POS                4                                                             /** VIACHD_SETUP5 AGCOFSTSPD-bit position */
#define AG903_VIA_CHD_SETUP5_AGCOFSTSPD_MSK                (0x3U << AG903_VIA_CHD_SETUP5_AGCOFSTSPD_POS)                 /** VIACHD_SETUP5 AGCOFSTSPD-bit mask */
#define AG903_VIA_CHD_SETUP5_AGCGAINSPD_POS                6                                                             /** VIACHD_SETUP5 AGCGAINSPD-bit position */
#define AG903_VIA_CHD_SETUP5_AGCGAINSPD_MSK                (0x3U << AG903_VIA_CHD_SETUP5_AGCGAINSPD_POS)                 /** VIACHD_SETUP5 AGCGAINSPD-bit mask */
#define AG903_VIA_CHD_SETUP5_CBPLLULSV_POS                 8                                                             /** VIACHD_SETUP5 CBPLLULSV-bit position */
#define AG903_VIA_CHD_SETUP5_CBPLLULSV_MSK                 (0x3U << AG903_VIA_CHD_SETUP5_CBPLLULSV_POS)                  /** VIACHD_SETUP5 CBPLLULSV-bit mask */
#define AG903_VIA_CHD_SETUP5_CBPLLULTH_POS                 10                                                            /** VIACHD_SETUP5 CBPLLULTH-bit position */
#define AG903_VIA_CHD_SETUP5_CBPLLULTH_MSK                 (0x3fU << AG903_VIA_CHD_SETUP5_CBPLLULTH_POS)                 /** VIACHD_SETUP5 CBPLLULTH-bit mask */

#define AG903_VIA_OUT_LEVELY_YGAIN_POS                     0                                                             /** VIAOUT_LEVELY YGAIN-bit position */
#define AG903_VIA_OUT_LEVELY_YGAIN_MSK                     (0xffU << AG903_VIA_OUT_LEVELY_YGAIN_POS)                     /** VIAOUT_LEVELY YGAIN-bit mask */
#define AG903_VIA_OUT_LEVELY_YOFST_POS                     8                                                             /** VIAOUT_LEVELY YOFST-bit position */
#define AG903_VIA_OUT_LEVELY_YOFST_MSK                     (0xffU << AG903_VIA_OUT_LEVELY_YOFST_POS)                     /** VIAOUT_LEVELY YOFST-bit mask */

#define AG903_VIA_OUT_LEVELCB_CBGAIN_POS                   0                                                             /** VIAOUT_LEVELCB CBGAIN-bit position */
#define AG903_VIA_OUT_LEVELCB_CBGAIN_MSK                   (0xffU << AG903_VIA_OUT_LEVELCB_CBGAIN_POS)                   /** VIAOUT_LEVELCB CBGAIN-bit mask */
#define AG903_VIA_OUT_LEVELCB_CBOFST_POS                   8                                                             /** VIAOUT_LEVELCB CBOFST-bit position */
#define AG903_VIA_OUT_LEVELCB_CBOFST_MSK                   (0xffU << AG903_VIA_OUT_LEVELCB_CBOFST_POS)                   /** VIAOUT_LEVELCB CBOFST-bit mask */

#define AG903_VIA_OUT_LEVELCR_CRGAIN_POS                   0                                                             /** VIAOUT_LEVELCR CRGAIN-bit position */
#define AG903_VIA_OUT_LEVELCR_CRGAIN_MSK                   (0xffU << AG903_VIA_OUT_LEVELCR_CRGAIN_POS)                   /** VIAOUT_LEVELCR CRGAIN-bit mask */
#define AG903_VIA_OUT_LEVELCR_CROFST_POS                   8                                                             /** VIAOUT_LEVELCR CROFST-bit position */
#define AG903_VIA_OUT_LEVELCR_CROFST_MSK                   (0xffU << AG903_VIA_OUT_LEVELCR_CROFST_POS)                   /** VIAOUT_LEVELCR CROFST-bit mask */

#define AG903_VIA_CLAMP_LEVEL_CLAMPOFS_POS                 0                                                             /** VIACLAMP_LEVEL CLAMPOFS-bit position */
#define AG903_VIA_CLAMP_LEVEL_CLAMPOFS_MSK                 (0x3ffU << AG903_VIA_CLAMP_LEVEL_CLAMPOFS_POS)                /** VIACLAMP_LEVEL CLAMPOFS-bit mask */

#define AG903_VIA_DET_STATUS_NOSYNC_POS                    0                                                             /** VIADET_STATUS NOSYNC-bit position */
#define AG903_VIA_DET_STATUS_NOSYNC_MSK                    (0x1U << AG903_VIA_DET_STATUS_NOSYNC_POS)                     /** VIADET_STATUS NOSYNC-bit mask */
#define AG903_VIA_DET_STATUS_PROG_POS                      1                                                             /** VIADET_STATUS PROG-bit position */
#define AG903_VIA_DET_STATUS_PROG_MSK                      (0x1U << AG903_VIA_DET_STATUS_PROG_POS)                       /** VIADET_STATUS PROG-bit mask */
#define AG903_VIA_DET_STATUS_VTR_POS                       2                                                             /** VIADET_STATUS VTR-bit position */
#define AG903_VIA_DET_STATUS_VTR_MSK                       (0x1U << AG903_VIA_DET_STATUS_VTR_POS)                        /** VIADET_STATUS VTR-bit mask */
#define AG903_VIA_DET_STATUS_NORMAL_POS                    3                                                             /** VIADET_STATUS NORMAL-bit position */
#define AG903_VIA_DET_STATUS_NORMAL_MSK                    (0x1U << AG903_VIA_DET_STATUS_NORMAL_POS)                     /** VIADET_STATUS NORMAL-bit mask */
#define AG903_VIA_DET_STATUS_TRICK_POS                     4                                                             /** VIADET_STATUS TRICK-bit position */
#define AG903_VIA_DET_STATUS_TRICK_MSK                     (0x1U << AG903_VIA_DET_STATUS_TRICK_POS)                      /** VIADET_STATUS TRICK-bit mask */
#define AG903_VIA_DET_STATUS_CKILL_POS                     5                                                             /** VIADET_STATUS CKILL-bit position */
#define AG903_VIA_DET_STATUS_CKILL_MSK                     (0x1U << AG903_VIA_DET_STATUS_CKILL_POS)                      /** VIADET_STATUS CKILL-bit mask */
#define AG903_VIA_DET_STATUS_STD_POS                       6                                                             /** VIADET_STATUS STD-bit position */
#define AG903_VIA_DET_STATUS_STD_MSK                       (0x1U << AG903_VIA_DET_STATUS_STD_POS)                        /** VIADET_STATUS STD-bit mask */
#define AG903_VIA_DET_STATUS_TBCNO_POS                     7                                                             /** VIADET_STATUS TBCNO-bit position */
#define AG903_VIA_DET_STATUS_TBCNO_MSK                     (0x1U << AG903_VIA_DET_STATUS_TBCNO_POS)                      /** VIADET_STATUS TBCNO-bit mask */
#define AG903_VIA_DET_STATUS_FMT_POS                       8                                                             /** VIADET_STATUS FMT-bit position */
#define AG903_VIA_DET_STATUS_FMT_MSK                       (0xfU << AG903_VIA_DET_STATUS_FMT_POS)                        /** VIADET_STATUS FMT-bit mask */

#define AG903_VIA_DET_HCYCLE_HCYCLE_POS                    0                                                             /** VIADET_HCYCLE HCYCLE-bit position */
#define AG903_VIA_DET_HCYCLE_HCYCLE_MSK                    (0x7ffU << AG903_VIA_DET_HCYCLE_HCYCLE_POS)                   /** VIADET_HCYCLE HCYCLE-bit mask */

#define AG903_VIA_DET_VCYCLE_VCYCLE_POS                    0                                                             /** VIADET_VCYCLE VCYCLE-bit position */
#define AG903_VIA_DET_VCYCLE_VCYCLE_MSK                    (0x3ffU << AG903_VIA_DET_VCYCLE_VCYCLE_POS)                   /** VIADET_VCYCLE VCYCLE-bit mask */


#endif /* _AG903_VIA_REGMAP_H_ */

