******************************************************************************
    MICRO C CUBE / STANDARD, SAMPLE
    Renesas  Renesas Starter Kit for RZ/T1 CPU Board TvvO
    Copyright (c)  2015, eForce Co., Ltd. All rights reserved.
******************************************************************************

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  ̊TvÂقAXVȂǂ̏LqĂ܂B



PDTvvO̊Tv

LEDœ_łAVA|[gł͎MLN^𑗐MTv
vOłB

C^XN MainTask()
 LED0LED1500msecœ_]܂B

M^XN ComTask()
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 ꕶGR[obN܂B



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  ]{[h       : RZ/T1 Evaluation Board (RTK7910022C00000BR)
  RpC       : IAR Embedded Workbench 7.30.4 
  JTAGG~[^ : I-Jet



RD]{[h̐ݒ

@USBP[uŕ]{[hJ8PCڑ܂B]{[hSCIFA2@\PCɒ񋟂܂B
@܂APC̃foCX}l[W[̃|[giCOMLPT)ɁgCDC USB(COMxx)hǉ܂B
PC̃^[~iEG~[^Œǉꂽ|[g(COMxx)JĂB
         
  zXgPC̃^[~i\tg̐ݒ́Â悤ɂ܂B
  
  Baud rate  Data  Parity  Stop  Flow control   
  ---------  ----  ------  ----  ------------   
   115200    8bit   none   1bit   NONE          
  



SD[hW[̐


SDPD\[XEt@C̐
-------------------------------
@͂߂ɁARtBM[^(Configurator.exe)gpă\[XEt@C𐶐܂B
RtBM[^N"sample.3cf"JA[vWFNg]->[\[X]w肵
ĉL̃tH_Ƀ\[XEt@C𐶐ĂB
 (pbP[WC:\uC3ɃCXg[ꍇƂ܂)

    C:\uC3\Standard\Sample\RTK7910022C00000BR\EWARM\RAM


SDQD[hW[̃rh
---------------------------------
@IAR Embedded Workbenchɂ胍[hW[𐶐܂B

@[NXy[Xt@C sample.eww_uNbNAEWARMNƓ
[NXy[XJ܂B

@āAj[́uProjectvuMakevɂ胍[hW[sample.out𐶐܂B
@ȂAvWFNg̃rh\͈ȉpӂĂ܂B

    rh\          s    ARM/THUMB     J\t@C(ICF)
    -----------------  ------------  ------------  ----------------------------------
    ARM_SRAM_Debug      RAM1    ARM           rzt1_ram.icf
    ARM_SDRAM_Debug     SDRAM2      ARM           rzt1_sdram.icf
    TCM_Debug           TCM3        ARM           rzt1_tcm.icf
    THUMB_SRAM_Debug    RAM       THUMB         rzt1_ram.icf
    THUMB_SDRAM_Debug   SDRAM         THUMB         rzt1_sdram.icf

    1 RAM
        R[h0x24000000ԒnCf[^0x22000000ԒnɔzuB
    2 SDRAM
        R[hƃf[^0x48000000ԒnɔzuB
        SDRAM̏̓fobK}Nt@C(RZT1_SDRAM.mac)ɂčsĂ܂B
    3 TCM
        R[hƃf[^0x00000100ԒnɔzuB
        fobK}Nt@C(RZT1_RAM.mac)ɂATCMEGCgh1-waitœKh
        ݒ肵Ă܂B

SDRD⑫ƒӎ
-----------------------
@oXXe[gRg[̏̓fobK}Nt@C(RZT1_SDRAM.mac)
sĂ܂B̂߁CRtBO[^[ŊOoXRg[Ɋ֌W
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TD_E[hƎs

@I-JetPCڑA^[Qbg{[hɓd𓊓ĂB
@IAR Embedded WorkbenchɂăvWFNgJԂŁAj[́uProjectv
 u_E[hăfobOvɂA^[QbgɃrh[hW[
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@^[~iG~[^Ɏ̂悤ɕ񂪕\܂B
    
        eForce Operating System Sample Program V1.0
                Serial Port (SCIF2)
  
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UDZbgnh

@Zbgnhprst.s79̏ê͎悤ɂȂ܂B

@ECPUSYSTEM[hɐݒ肵X^bN|C^ݒ
@EMPU̐ݒƃLbVL
@ExN^e[u[xN^ɐݒ
  EFIQAUndefinedAAbortASupervisorAIRQ[h̃X^bN
    |C^ݒ
  EIARCꏉ֐ďo



VDXV

Version Information
    2015.02.19: 
        VK쐬. IAR Embedded Workbench 7.30.4ɑΉ
    2015.04.28: 
        xN^e[u
        @t@Cvect.s79ɕύX܂B
        @ZNVROOTɕύX܂B
        Zbgnh
        @t@Cprst.s79ɕύX܂B
        @MPU}bvBuffer RAM̈(0x08000000)ǉ܂B
        @IAR֐__iar_program_start?mainɕύX܂B
    2015.05.01:
        @RtBO[^gpTvƂăvWFNg\
        @̂悤ɕύX܂B
        @EhCot@C(DDR_RZT1_xxx.c,h)͖{tH_ɏo͂ꂽ̂
        @@gpB
        @EhCoRtBO[Vt@C(DDR_RZT1_xxx_cfg.h)̓RtBO[^[
        @@o͂ꂽ̂gpB
        @EIO|[g̏R[h̓RtBO[^[hw_init.cɏo͂邽߁C
        @@sample.c폜B
        @EVXȅ̓RtBO[^[kernel_cfg.cɏo͂邽߁C
        @@sample.c폜B
    2015.11.06:
        Zbgnh(prst.s79)
        @MPÜ`ύX܂B

